target/i386/mshv: use generic FPU/xcr0 state
Instead of using an mshv-specific FPU state representation we switch to the generic i386 representation of the registers. Signed-off-by: Magnus Kulke <magnuskulke@linux.microsoft.com> Link: https://lore.kernel.org/r/20260417105618.3621-3-magnuskulke@linux.microsoft.com Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Magnus Kulke committed
Apr 17, 2026 at 12:55 UTC
d564c2a296bf9dcd644273f84db9cb57daecf4e8
2 files changed
+47
-44
include/system/mshv_int.h
+1
-14
@@ -58,19 +58,6 @@ typedef struct MshvMsiControl {
58
#define mshv_vcpufd(cpu) (cpu->accel->cpufd)
59
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/* cpu */
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-typedef struct MshvFPU {
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- uint8_t fpr[8][16];
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- uint16_t fcw;
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- uint16_t fsw;
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- uint8_t ftwx;
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- uint8_t pad1;
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- uint16_t last_opcode;
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- uint64_t last_ip;
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- uint64_t last_dp;
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- uint8_t xmm[16][16];
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- uint32_t mxcsr;
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- uint32_t pad2;
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-} MshvFPU;
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typedef enum MshvVmExit {
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MshvVmExitIgnore = 0,
@@ -81,7 +68,7 @@ typedef enum MshvVmExit {
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void mshv_init_mmio_emu(void);
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int mshv_create_vcpu(int vm_fd, uint8_t vp_index, int *cpu_fd);
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void mshv_remove_vcpu(int vm_fd, int cpu_fd);
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-int mshv_configure_vcpu(const CPUState *cpu, const MshvFPU *fpu, uint64_t xcr0);
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+int mshv_configure_vcpu(const CPUState *cpu);
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int mshv_run_vcpu(int vm_fd, CPUState *cpu, hv_message *msg, MshvVmExit *exit);
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int mshv_arch_load_regs(CPUState *cpu);
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int mshv_arch_store_regs(CPUState *cpu);
target/i386/mshv/mshv-cpu.c
+46
-30
@@ -111,6 +111,9 @@ static enum hv_register_name FPU_REGISTER_NAMES[26] = {
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};
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static int set_special_regs(const CPUState *cpu);
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+static int get_generic_regs(CPUState *cpu,
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+ struct hv_register_assoc *assocs,
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+ size_t n_regs);
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static int translate_gva(const CPUState *cpu, uint64_t gva, uint64_t *gpa,
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uint64_t flags)
@@ -767,48 +770,65 @@ static int set_special_regs(const CPUState *cpu)
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return 0;
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}
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-static int set_fpu(const CPUState *cpu, const struct MshvFPU *regs)
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+static int set_fpu(const CPUState *cpu)
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{
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struct hv_register_assoc assocs[ARRAY_SIZE(FPU_REGISTER_NAMES)];
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union hv_register_value *value;
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- size_t fp_i;
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union hv_x64_fp_control_status_register *ctrl_status;
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union hv_x64_xmm_control_status_register *xmm_ctrl_status;
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int ret;
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size_t n_regs = ARRAY_SIZE(FPU_REGISTER_NAMES);
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+ X86CPU *x86cpu = X86_CPU(cpu);
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+ CPUX86State *env = &x86cpu->env;
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+ size_t i, fp_i;
784
+ bool valid;
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786
/* first 16 registers are xmm0-xmm15 */
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- for (size_t i = 0; i < 16; i++) {
787
+ for (i = 0; i < 16; i++) {
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assocs[i].name = FPU_REGISTER_NAMES[i];
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value = &assocs[i].value;
784
- memcpy(&value->reg128, ®s->xmm[i], 16);
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+ value->reg128.low_part = env->xmm_regs[i].ZMM_Q(0);
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+ value->reg128.high_part = env->xmm_regs[i].ZMM_Q(1);
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}
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/* next 8 registers are fp_mmx0-fp_mmx7 */
788
- for (size_t i = 16; i < 24; i++) {
789
- assocs[i].name = FPU_REGISTER_NAMES[i];
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+ for (i = 16; i < 24; i++) {
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fp_i = (i - 16);
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+ assocs[i].name = FPU_REGISTER_NAMES[i];
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value = &assocs[i].value;
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- memcpy(&value->reg128, ®s->fpr[fp_i], 16);
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+ value->fp.mantissa = env->fpregs[fp_i].d.low;
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+ value->fp.biased_exponent = env->fpregs[fp_i].d.high & 0x7FFF;
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+ value->fp.sign = (env->fpregs[fp_i].d.high >> 15) & 0x1;
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+ value->fp.reserved = 0;
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}
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/* last two registers are fp_control_status and xmm_control_status */
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assocs[24].name = FPU_REGISTER_NAMES[24];
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value = &assocs[24].value;
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ctrl_status = &value->fp_control_status;
799
- ctrl_status->fp_control = regs->fcw;
800
- ctrl_status->fp_status = regs->fsw;
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- ctrl_status->fp_tag = regs->ftwx;
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+
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+ ctrl_status->fp_control = env->fpuc;
811
+ /* bits 11,12,13 are the top of stack pointer */
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+ ctrl_status->fp_status = (env->fpus & ~0x3800) | ((env->fpstt & 0x7) << 11);
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+
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+ ctrl_status->fp_tag = 0;
815
+ for (i = 0; i < 8; i++) {
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+ valid = (env->fptags[i] == 0);
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+ if (valid) {
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+ ctrl_status->fp_tag |= (1u << i);
819
+ }
820
+ }
821
+
822
ctrl_status->reserved = 0;
803
- ctrl_status->last_fp_op = regs->last_opcode;
804
- ctrl_status->last_fp_rip = regs->last_ip;
823
+ ctrl_status->last_fp_op = env->fpop;
824
+ ctrl_status->last_fp_rip = env->fpip;
825
826
assocs[25].name = FPU_REGISTER_NAMES[25];
827
value = &assocs[25].value;
828
xmm_ctrl_status = &value->xmm_control_status;
809
- xmm_ctrl_status->xmm_status_control = regs->mxcsr;
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- xmm_ctrl_status->xmm_status_control_mask = 0;
811
- xmm_ctrl_status->last_fp_rdp = regs->last_dp;
829
+ xmm_ctrl_status->xmm_status_control = env->mxcsr;
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+ xmm_ctrl_status->xmm_status_control_mask = 0x0000ffff;
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+ xmm_ctrl_status->last_fp_rdp = env->fpdp;
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ret = mshv_set_generic_regs(cpu, assocs, n_regs);
834
if (ret < 0) {
@@ -819,12 +839,15 @@ static int set_fpu(const CPUState *cpu, const struct MshvFPU *regs)
839
return 0;
840
}
841
822
-static int set_xc_reg(const CPUState *cpu, uint64_t xcr0)
842
+static int set_xc_reg(const CPUState *cpu)
843
{
844
int ret;
845
+ X86CPU *x86cpu = X86_CPU(cpu);
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+ CPUX86State *env = &x86cpu->env;
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+
848
struct hv_register_assoc assoc = {
849
.name = HV_X64_REGISTER_XFEM,
827
- .value.reg64 = xcr0,
850
+ .value.reg64 = env->xcr0,
851
};
852
853
ret = mshv_set_generic_regs(cpu, &assoc, 1);
@@ -835,8 +858,7 @@ static int set_xc_reg(const CPUState *cpu, uint64_t xcr0)
858
return 0;
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}
860
838
-static int set_cpu_state(const CPUState *cpu, const MshvFPU *fpu_regs,
839
- uint64_t xcr0)
861
+static int set_cpu_state(const CPUState *cpu)
862
{
863
int ret;
864
@@ -848,11 +870,11 @@ static int set_cpu_state(const CPUState *cpu, const MshvFPU *fpu_regs,
870
if (ret < 0) {
871
return ret;
872
}
851
- ret = set_fpu(cpu, fpu_regs);
873
+ ret = set_fpu(cpu);
874
if (ret < 0) {
875
return ret;
876
}
855
- ret = set_xc_reg(cpu, xcr0);
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+ ret = set_xc_reg(cpu);
878
if (ret < 0) {
879
return ret;
880
}
@@ -1001,8 +1023,7 @@ static int setup_msrs(const CPUState *cpu)
1023
* CPUX86State *env = &x86cpu->env;
1024
* X86CPUTopoInfo *topo_info = &env->topo_info;
1025
*/
1004
-int mshv_configure_vcpu(const CPUState *cpu, const struct MshvFPU *fpu,
1005
- uint64_t xcr0)
1026
+int mshv_configure_vcpu(const CPUState *cpu)
1027
{
1028
int ret;
1029
int cpu_fd = mshv_vcpufd(cpu);
@@ -1019,7 +1040,7 @@ int mshv_configure_vcpu(const CPUState *cpu, const struct MshvFPU *fpu,
1040
return -1;
1041
}
1042
1022
- ret = set_cpu_state(cpu, fpu, xcr0);
1043
+ ret = set_cpu_state(cpu);
1044
if (ret < 0) {
1045
error_report("failed to set cpu state");
1046
return -1;
@@ -1036,14 +1057,9 @@ int mshv_configure_vcpu(const CPUState *cpu, const struct MshvFPU *fpu,
1057
1058
static int put_regs(const CPUState *cpu)
1059
{
1039
- X86CPU *x86cpu = X86_CPU(cpu);
1040
- CPUX86State *env = &x86cpu->env;
1041
- MshvFPU fpu = {0};
1060
int ret;
1061
1044
- memset(&fpu, 0, sizeof(fpu));
1045
-
1046
- ret = mshv_configure_vcpu(cpu, &fpu, env->xcr0);
1062
+ ret = mshv_configure_vcpu(cpu);
1063
if (ret < 0) {
1064
error_report("failed to configure vcpu");
1065
return ret;