906
static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist,
907
AHCICmdHdr *cmd, int64_t limit, uint64_t offset)
908
{
909
- uint16_t opts = le16_to_cpu(cmd->opts);
910
- uint16_t prdtl = le16_to_cpu(cmd->prdtl);
911
- uint64_t cfis_addr = le64_to_cpu(cmd->tbl_addr);
912
- uint64_t prdt_addr = cfis_addr + 0x80;
913
- dma_addr_t prdt_len = (prdtl * sizeof(AHCI_SG));
914
- dma_addr_t real_prdt_len = prdt_len;
909
+ uint16_t opts;
910
+ uint16_t prdtl;
911
+ uint64_t cfis_addr;
912
+ uint64_t prdt_addr;
913
+ dma_addr_t prdt_len;
914
+ dma_addr_t real_prdt_len;
915
uint8_t *prdt;
916
int i;
917
int r = 0;
923
924
trace_ahci_populate_sglist(ad->hba, ad->port_no);
925
926
+ if (!cmd) {
927
+ trace_ahci_populate_sglist_no_cmd(ad->hba, ad->port_no);
928
+ return -1;
929
+ }
930
+
931
+ opts = le16_to_cpu(cmd->opts);
932
+ prdtl = le16_to_cpu(cmd->prdtl);
933
+ cfis_addr = le64_to_cpu(cmd->tbl_addr);
934
+ prdt_addr = cfis_addr + 0x80;
935
+ prdt_len = (prdtl * sizeof(AHCI_SG));
936
+ real_prdt_len = prdt_len;
937
+
938
if (!prdtl) {
939
trace_ahci_populate_sglist_no_prdtl(ad->hba, ad->port_no, opts);
940
return -1;
1383
}
1384
1385
/* Transfer PIO data between RAM and device */
1374
-static void ahci_pio_transfer(const IDEDMA *dma)
1386
+static bool ahci_pio_transfer(const IDEDMA *dma)
1387
{
1388
AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma);
1389
IDEState *s = &ad->port.ifs[0];
1390
uint32_t size = (uint32_t)(s->data_end - s->data_ptr);
1391
/* write == ram -> device */
1380
- uint16_t opts = le16_to_cpu(ad->cur_cmd->opts);
1381
- int is_write = opts & AHCI_CMD_WRITE;
1382
- int is_atapi = opts & AHCI_CMD_ATAPI;
1392
+ uint16_t opts;
1393
+ int is_write;
1394
+ int is_atapi;
1395
int has_sglist = 0;
1396
bool pio_fis_i;
1397
1398
+ if (ad->cur_cmd == NULL) {
1399
+ trace_ahci_pio_transfer_no_cmd(ad->hba, ad->port_no);
1400
+ return false;
1401
+ }
1402
+
1403
+ opts = le16_to_cpu(ad->cur_cmd->opts);
1404
+ is_write = opts & AHCI_CMD_WRITE;
1405
+ is_atapi = opts & AHCI_CMD_ATAPI;
1406
+
1407
/* The PIO Setup FIS is received prior to transfer, but the interrupt
1408
* is only triggered after data is received.
1409
*
1451
if (pio_fis_i) {
1452
ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_PSS);
1453
}
1454
+
1455
+ return true;
1456
}
1457
1458
static void ahci_start_dma(const IDEDMA *dma, IDEState *s,
1515
{
1516
AHCIDevice *ad = DO_UPCAST(AHCIDevice, dma, dma);
1517
1518
+ if (ad->cur_cmd == NULL) {
1519
+ return;
1520
+ }
1521
+
1522
tx_bytes += le32_to_cpu(ad->cur_cmd->status);
1523
ad->cur_cmd->status = cpu_to_le32(tx_bytes);
1524
}