@samitouri / QOSamiQemu / commits / d8684f3b21

target/loongarch: Add detailed information with CPU Product ID

CPUCFG0 is LoongArch CPU Product ID, it is a combination of Vendor ID, Series ID and Product ID, here is the layout: +-------------+----------------+------------+----------------+ | Reserved | Vendor ID | Series ID | Product ID | +-------------+----------------+------------+----------------+ 31 24 23 16 15 12 11 0 Here adds detailed information with CPUCFG0, it is convenient to add such information with host or LA664 CPU type in future. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn>

Bibo Mao committed Feb 25, 2026 at 09:41 UTC d8684f3b213f3283c8d4b1d5552a35c16446cf04
2 files changed +19 -3
target/loongarch/cpu.c
+10 -2
@@ -283,8 +283,12 @@ static void loongarch_la464_initfn(Object *obj)
283 }
284
285 cpu->dtb_compatible = "loongarch,Loongson-3A5000";
286 - env->cpucfg[0] = 0x14c010; /* PRID */
286 + data = FIELD_DP32(data, CPUCFG0, PRID, 0x10);
287 + data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA464);
288 + data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
289 + env->cpucfg[0] = data;
290
291 + data = 0;
292 data = FIELD_DP32(data, CPUCFG1, ARCH, 2);
293 data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
294 data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
@@ -389,8 +393,12 @@ static void loongarch_la132_initfn(Object *obj)
393 }
394
395 cpu->dtb_compatible = "loongarch,Loongson-1C103";
392 - env->cpucfg[0] = 0x148042; /* PRID */
396 + data = FIELD_DP32(data, CPUCFG0, PRID, 0x42);
397 + data = FIELD_DP32(data, CPUCFG0, SERID, PRID_SERIES_LA132);
398 + data = FIELD_DP32(data, CPUCFG0, VENID, PRID_VENDOR_LOONGSON);
399 + env->cpucfg[0] = data;
400
401 + data = 0;
402 data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
403 data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
404 data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
target/loongarch/cpu.h
+9 -1
@@ -97,7 +97,15 @@ FIELD(FCSR0, CAUSE, 24, 5)
97 #define EXCCODE_DBP EXCODE(26, 0) /* Reserved subcode used for debug */
98
99 /* cpucfg[0] bits */
100 -FIELD(CPUCFG0, PRID, 0, 32)
100 +FIELD(CPUCFG0, PRID, 0, 12)
101 +FIELD(CPUCFG0, SERID, 12, 4)
102 +FIELD(CPUCFG0, VENID, 16, 8)
103 +#define PRID_SERIES_LA132 0x8 /* Loongson 32bit */
104 +#define PRID_SERIES_LA264 0xa /* Loongson 64bit, 2-issue */
105 +#define PRID_SERIES_LA364 0xb /* Loongson 64bit, 3-issue */
106 +#define PRID_SERIES_LA464 0xc /* Loongson 64bit, 4-issue */
107 +#define PRID_SERIES_LA664 0xd /* Loongson 64bit, 6-issue */
108 +#define PRID_VENDOR_LOONGSON 0x14
109
110 /* cpucfg[1] bits */
111 FIELD(CPUCFG1, ARCH, 0, 2)