intel_iommu: Correctly set pt bit in extended capability register
With the changes in c7b2e22bd957, the `pt` bit was set in the (wrong) capability register, instead of the (correct) extended capability register. Fixes: c7b2e22bd957 ("hw/i386/x86-iommu: Remove X86IOMMUState::pt_supported field") Signed-off-by: no92 <leo@managarm.org> Reviewed-by: Clement Mathieu--Drif <clement.mathieu--drif@bull.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-ID: <20260624103933.1793586-3-leo@managarm.org>
no92 committed
Jun 24, 2026 at 12:39 UTC
dbc0ed56223011281e14b5cb8c02453915d35d12
1 file changed
+2
-2
hw/i386/intel_iommu.c
+2
-2
@@ -4988,7 +4988,7 @@ static void vtd_cap_init(IntelIOMMUState *s)
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{
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s);
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- s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_ECAP_PT |
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+ s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND |
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VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SSLPS | VTD_CAP_DRAIN |
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VTD_CAP_ESRTPS | VTD_CAP_MGAW(s->aw_bits);
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if (x86_iommu->dma_translation) {
@@ -4999,7 +4999,7 @@ static void vtd_cap_init(IntelIOMMUState *s)
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s->cap |= VTD_CAP_SAGAW_48bit;
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}
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}
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- s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO;
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+ s->ecap = VTD_ECAP_QI | VTD_ECAP_IRO | VTD_ECAP_PT;
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if (x86_iommu_ir_supported(x86_iommu)) {
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s->ecap |= VTD_ECAP_IR | VTD_ECAP_MHMV;