target/riscv/csr.c: fix mstatus.UXL reserved value
By the priv spec the value "3" is marked as 'Reserved' for mstatus.UXL. Handle a mstatus.UXL = 3 write by writing the current 'xl' instead. Fixes: https://gitlab.com/qemu-project/qemu/-/work_items/3367 Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260514194537.2416243-3-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Daniel Henrique Barboza committed
May 14, 2026 at 16:45 UTC
ddfd33f1965804fc4a718d8d46bc150525c2f9db
1 file changed
+10
target/riscv/csr.c
+10
@@ -2045,7 +2045,17 @@ static RISCVException write_mstatus(CPURISCVState *env, int csrno,
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if (xl != MXL_RV32 || env->debugger) {
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if ((val & MSTATUS64_UXL) != 0) {
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+ uint64_t uxl = val & MSTATUS64_UXL >> 32;
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mask |= MSTATUS64_UXL;
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+
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+ /*
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+ * uxl = 3 is reserved so write the current xl instead.
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+ * In case xl = MXL_RV128 (3) write MXL_RV64.
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+ */
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+ if (uxl == 3) {
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+ uxl = xl == MXL_RV128 ? MXL_RV64 : xl;
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+ val = deposit64(val, 32, 2, uxl);
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+ }
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}
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}
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