target/arm/ptw: Flip sense of get_phys_addr_nogpc return value
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20260515142541.571911-11-peter.maydell@linaro.org
Peter Maydell committed
May 15, 2026 at 15:25 UTC
df9343271311253642b18558628a1fc98471862a
1 file changed
+16
-16
target/arm/ptw.c
+16
-16
@@ -3570,8 +3570,8 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
3570
memop, result, fi);
3571
3572
/* If S1 fails, return early. */
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- if (ret) {
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- return !ret;
3573
+ if (!ret) {
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+ return ret;
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}
3576
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ipa = result->f.phys_addr;
@@ -3601,8 +3601,8 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
3601
result->f.prot = s1_prot & result->s2prot;
3602
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/* If S2 fails, return early. */
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- if (ret) {
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- return !ret;
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+ if (!ret) {
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+ return ret;
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}
3607
3608
/*
@@ -3683,7 +3683,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
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case ARMMMUIdx_Phys_Root:
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case ARMMMUIdx_Phys_Realm:
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/* Checking Phys early avoids special casing later vs regime_el. */
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- return !get_phys_addr_disabled(env, ptw, address, access_type,
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+ return get_phys_addr_disabled(env, ptw, address, access_type,
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result, fi);
3688
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case ARMMMUIdx_Stage1_E0:
@@ -3724,7 +3724,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
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ptw->in_mmu_idx = mmu_idx = s1_mmu_idx;
3725
if (arm_feature(env, ARM_FEATURE_EL2) &&
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!regime_translation_disabled(env, ARMMMUIdx_Stage2, ptw->in_space)) {
3727
- return !get_phys_addr_twostage(env, ptw, address, access_type,
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+ return get_phys_addr_twostage(env, ptw, address, access_type,
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memop, result, fi);
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}
3730
/* fall through */
@@ -3756,15 +3756,15 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
3756
3757
if (arm_feature(env, ARM_FEATURE_V8)) {
3758
/* PMSAv8 */
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- ret = !get_phys_addr_pmsav8(env, ptw, address, access_type,
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+ ret = get_phys_addr_pmsav8(env, ptw, address, access_type,
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result, fi);
3761
} else if (arm_feature(env, ARM_FEATURE_V7)) {
3762
/* PMSAv7 */
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- ret = !get_phys_addr_pmsav7(env, ptw, address, access_type,
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+ ret = get_phys_addr_pmsav7(env, ptw, address, access_type,
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result, fi);
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} else {
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/* Pre-v7 MPU */
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- ret = !get_phys_addr_pmsav5(env, ptw, address, access_type,
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+ ret = get_phys_addr_pmsav5(env, ptw, address, access_type,
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result, fi);
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}
3770
qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32
@@ -3772,7 +3772,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
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access_type == MMU_DATA_LOAD ? "reading" :
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(access_type == MMU_DATA_STORE ? "writing" : "execute"),
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(uint32_t)address, mmu_idx,
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- ret ? "Miss" : "Hit",
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+ ret ? "Hit" : "Miss",
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result->f.prot & PAGE_READ ? 'r' : '-',
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result->f.prot & PAGE_WRITE ? 'w' : '-',
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result->f.prot & PAGE_EXEC ? 'x' : '-');
@@ -3783,18 +3783,18 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
3783
/* Definitely a real MMU, not an MPU */
3784
3785
if (regime_translation_disabled(env, mmu_idx, ptw->in_space)) {
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- return !get_phys_addr_disabled(env, ptw, address, access_type,
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+ return get_phys_addr_disabled(env, ptw, address, access_type,
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result, fi);
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}
3789
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if (regime_using_lpae_format(env, mmu_idx)) {
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- return !get_phys_addr_lpae(env, ptw, address, access_type,
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+ return get_phys_addr_lpae(env, ptw, address, access_type,
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memop, result, fi);
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} else if (arm_feature(env, ARM_FEATURE_V7) ||
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regime_sctlr(env, mmu_idx) & SCTLR_XP) {
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- return !get_phys_addr_v6(env, ptw, address, access_type, result, fi);
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+ return get_phys_addr_v6(env, ptw, address, access_type, result, fi);
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} else {
3797
- return !get_phys_addr_v5(env, ptw, address, access_type, result, fi);
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+ return get_phys_addr_v5(env, ptw, address, access_type, result, fi);
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}
3799
}
3800
@@ -3804,7 +3804,7 @@ static bool get_phys_addr_gpc(CPUARMState *env, S1Translate *ptw,
3804
GetPhysAddrResult *result,
3805
ARMMMUFaultInfo *fi)
3806
{
3807
- if (get_phys_addr_nogpc(env, ptw, address, access_type,
3807
+ if (!get_phys_addr_nogpc(env, ptw, address, access_type,
3808
memop, result, fi)) {
3809
return true;
3810
}
@@ -3851,7 +3851,7 @@ bool get_phys_addr_for_at(CPUARMState *env, vaddr address,
3851
* check is handled or bypassed by .in_prot_check) and "memop = MO_8"
3852
* bypasses any alignment check.
3853
*/
3854
- return get_phys_addr_nogpc(env, &ptw, address,
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+ return !get_phys_addr_nogpc(env, &ptw, address,
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MMU_DATA_LOAD, MO_8, result, fi);
3856
}
3857