@samitouri / QOSamiQemu / commits / df9c6d6396

hw/hexagon: extract get_reg_value/set_reg_value stubs in globalreg

Route the globalreg read/write accessors through new get_reg_value()/set_reg_value() helpers instead of touching s->regs[reg] directly. This will be exploited by a subsequent patch that redirects VID/VID1 accesses to the L2VIC. Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Link: https://lore.kernel.org/qemu-devel/20260806042723.3785369-9-brian.cain@oss.qualcomm.com Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>

Brian Cain committed Aug 5, 2026 at 21:27 UTC df9c6d6396d08204674da2a81dfdc03b28bfda19
1 file changed +18 -5
hw/hexagon/hexagon_globalreg.c
+18 -5
@@ -135,6 +135,17 @@ static inline uint32_t apply_write_mask(uint32_t new_val, uint32_t cur_val,
135 return new_val;
136 }
137
138 +static uint32_t get_reg_value(HexagonGlobalRegState *s, uint32_t reg)
139 +{
140 + return s->regs[reg];
141 +}
142 +
143 +static void set_reg_value(HexagonGlobalRegState *s, uint32_t reg,
144 + uint32_t value)
145 +{
146 + s->regs[reg] = value;
147 +}
148 +
149 uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg,
150 uint32_t htid)
151 {
@@ -146,7 +157,7 @@ uint32_t hexagon_globalreg_read(HexagonGlobalRegState *s, uint32_t reg,
157 g_assert(reg < NUM_SREGS);
158 g_assert(reg >= HEX_SREG_GLB_START);
159
149 - value = s->regs[reg];
160 + value = get_reg_value(s, reg);
161
162 trace_hexagon_globalreg_read(htid, get_sreg_name(reg), value);
163 return value;
@@ -160,7 +171,7 @@ void hexagon_globalreg_write(HexagonGlobalRegState *s, uint32_t reg,
171 }
172 g_assert(reg < NUM_SREGS);
173 g_assert(reg >= HEX_SREG_GLB_START);
163 - s->regs[reg] = value;
174 + set_reg_value(s, reg, value);
175 trace_hexagon_globalreg_write(htid, get_sreg_name(reg), value);
176 }
177
@@ -168,6 +179,7 @@ uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t reg,
179 uint32_t value)
180 {
181 uint32_t reg_mask;
182 + uint32_t cur_val;
183
184 if (!s) {
185 return value;
@@ -175,9 +187,10 @@ uint32_t hexagon_globalreg_masked_value(HexagonGlobalRegState *s, uint32_t reg,
187 g_assert(reg < NUM_SREGS);
188 g_assert(reg >= HEX_SREG_GLB_START);
189 reg_mask = global_sreg_immut_masks[reg];
190 + cur_val = get_reg_value(s, reg);
191 return reg_mask == IMMUTABLE ?
179 - s->regs[reg] :
180 - apply_write_mask(value, s->regs[reg], reg_mask);
192 + cur_val :
193 + apply_write_mask(value, cur_val, reg_mask);
194 }
195
196 void hexagon_globalreg_write_masked(HexagonGlobalRegState *s, uint32_t reg,
@@ -186,7 +199,7 @@ void hexagon_globalreg_write_masked(HexagonGlobalRegState *s, uint32_t reg,
199 if (!s) {
200 return;
201 }
189 - s->regs[reg] = hexagon_globalreg_masked_value(s, reg, value);
202 + set_reg_value(s, reg, hexagon_globalreg_masked_value(s, reg, value));
203 }
204
205 uint64_t hexagon_globalreg_get_pcycle_base(HexagonGlobalRegState *s)