target/mips: add Octeon CRC COP2 helpers
Add helper support for the Octeon COP2 CRC register interface. This covers normal and reflected CRC state handling, byte/halfword/word/ doubleword/variable-width update selectors, and the reflected IV readback operation. Register moves that can be represented as direct TCG loads/stores do not need helpers. Add only the side-effecting CRC helper implementation here. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260608-mips-octeon-missing-insns-v2-v16-3-daef7a0d8b04@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
James Hilliard committed
Jun 8, 2026 at 12:59 UTC
e1ac6b277591a2e00233fad10d8736a97f07598e
2 files changed
+145
target/mips/helper.h
+14
@@ -25,6 +25,20 @@ DEF_HELPER_3(crc32, tl, tl, tl, i32)
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DEF_HELPER_3(crc32c, tl, tl, tl, i32)
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DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32, i32, i32)
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+/* Octeon COP2 selector operation helpers. */
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+DEF_HELPER_1(octeon_cp2_mf_crc_iv_reflect, i64, env)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_iv_reflect, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_byte, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_half, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_word, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_byte_reflect, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_half_reflect, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_word_reflect, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_dword, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_var, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_dword_reflect, void, env, i64)
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+DEF_HELPER_2(octeon_cp2_mt_crc_write_var_reflect, void, env, i64)
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+
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/* microMIPS functions */
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DEF_HELPER_4(lwm, void, env, tl, tl, i32)
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DEF_HELPER_4(swm, void, env, tl, tl, i32)
target/mips/tcg/octeon_crypto.c
+131
@@ -14,3 +14,134 @@
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#include "crypto/sm4.h"
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#include "qemu/bitops.h"
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#include "qemu/host-utils.h"
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+
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+static uint32_t octeon_crc_reflect32_by_byte(uint32_t v)
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+{
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+ return bswap32(revbit32(v));
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+}
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+
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+static uint32_t octeon_crc_state_reflect(const MIPSOcteonCryptoState *crypto)
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+{
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+ return octeon_crc_reflect32_by_byte(crypto->crc_iv);
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+}
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+
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+static void octeon_crc_set_state_reflect(MIPSOcteonCryptoState *crypto,
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+ uint32_t state)
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+{
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+ crypto->crc_iv = octeon_crc_reflect32_by_byte(state);
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+}
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+
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+static void octeon_crc_update_normal(MIPSOcteonCryptoState *crypto,
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+ uint64_t value, unsigned int bytes)
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+{
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+ uint32_t crc = crypto->crc_iv;
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+ uint32_t poly = crypto->crc_poly;
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+
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+ for (unsigned int i = 0; i < bytes; i++) {
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+ uint8_t byte = value >> ((bytes - 1 - i) * 8);
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+
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+ crc ^= (uint32_t)byte << 24;
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+ for (int bit = 0; bit < 8; bit++) {
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+ if (crc & 0x80000000U) {
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+ crc = (crc << 1) ^ poly;
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+ } else {
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+ crc <<= 1;
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+ }
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+ }
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+ }
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+
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+ crypto->crc_iv = crc;
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+}
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+
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+static void octeon_crc_update_reflect(MIPSOcteonCryptoState *crypto,
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+ uint64_t value, unsigned int bytes)
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+{
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+ uint32_t crc = octeon_crc_state_reflect(crypto);
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+ uint32_t poly = bswap32(crypto->crc_poly);
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+
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+ for (unsigned int i = 0; i < bytes; i++) {
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+ uint8_t byte = value >> ((bytes - 1 - i) * 8);
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+
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+ crc ^= byte;
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+ for (int bit = 0; bit < 8; bit++) {
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+ if (crc & 1U) {
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+ crc = (crc >> 1) ^ poly;
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+ } else {
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+ crc >>= 1;
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+ }
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+ }
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+ }
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+
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+ octeon_crc_set_state_reflect(crypto, crc);
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+}
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+
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+uint64_t helper_octeon_cp2_mf_crc_iv_reflect(CPUMIPSState *env)
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+{
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+ return octeon_crc_reflect32_by_byte(env->octeon_crypto.crc_iv);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_iv_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ env->octeon_crypto.crc_iv =
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+ octeon_crc_reflect32_by_byte((uint32_t)value);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_byte(CPUMIPSState *env, uint64_t value)
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+{
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+ octeon_crc_update_normal(&env->octeon_crypto, value, 1);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_half(CPUMIPSState *env, uint64_t value)
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+{
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+ octeon_crc_update_normal(&env->octeon_crypto, value, 2);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_word(CPUMIPSState *env, uint64_t value)
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+{
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+ octeon_crc_update_normal(&env->octeon_crypto, value, 4);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_dword(CPUMIPSState *env, uint64_t value)
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+{
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+ octeon_crc_update_normal(&env->octeon_crypto, value, 8);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_var(CPUMIPSState *env, uint64_t value)
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+{
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+ MIPSOcteonCryptoState *crypto = &env->octeon_crypto;
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+
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+ octeon_crc_update_normal(crypto, value, MIN(8U, crypto->crc_len & 0xf));
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_byte_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ octeon_crc_update_reflect(&env->octeon_crypto, value, 1);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_half_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ octeon_crc_update_reflect(&env->octeon_crypto, value, 2);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_word_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ octeon_crc_update_reflect(&env->octeon_crypto, value, 4);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_dword_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ octeon_crc_update_reflect(&env->octeon_crypto, value, 8);
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+}
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+
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+void helper_octeon_cp2_mt_crc_write_var_reflect(CPUMIPSState *env,
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+ uint64_t value)
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+{
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+ MIPSOcteonCryptoState *crypto = &env->octeon_crypto;
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+
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+ octeon_crc_update_reflect(crypto, value, MIN(8U, crypto->crc_len & 0xf));
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+}