@samitouri / QOSamiQemu / commits / e26e53b4ab

target/riscv: move riscv_cpu_set_nmi() to tcg-cpu.c

This function is related to Smrnmi and non-masked interrupts, firing up interrupts via env->rnmip from riscv_cpu_local_irq_pending(). This is all TCG only code. Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260703180538.3346781-13-daniel.barboza@oss.qualcomm.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Daniel Henrique Barboza committed Jul 3, 2026 at 15:05 UTC e26e53b4abdaab47c2a055833f27e79704c78abe

2 files changed +7 -8

target/riscv/cpu.c

-8

@@ -1180,11 +1180,6 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level)

1180 g_assert_not_reached();

1181 }

1182 }

1183 -

1184 -static void riscv_cpu_set_nmi(void *opaque, int irq, int level)

1185 -{

1186 - riscv_cpu_set_rnmi(RISCV_CPU(opaque), irq, level);

1187 -}

1183 #endif /* CONFIG_USER_ONLY */

1184

1185 static bool riscv_cpu_is_dynamic(Object *cpu_obj)

@@ -1203,9 +1198,6 @@ static void riscv_cpu_init(Object *obj)

1198 #ifndef CONFIG_USER_ONLY

1199 qdev_init_gpio_in(DEVICE(obj), riscv_cpu_set_irq,

1200 IRQ_LOCAL_MAX + IRQ_LOCAL_GUEST_MAX);

1206 - qdev_init_gpio_in_named(DEVICE(cpu), riscv_cpu_set_nmi,

1207 - "riscv.cpu.rnmi", RNMI_MAX);

1208 -

1201 if (mcc->def->num_triggers) {

1202 env->num_triggers = mcc->def->num_triggers;

1203 }

target/riscv/tcg/tcg-cpu.c

@@ -1662,6 +1662,11 @@ static void riscv_register_custom_csrs(RISCVCPU *cpu, const RISCVCSR *csr_list)

1662 }

1663 }

1664 }

1665 +

1666 +static inline void riscv_cpu_set_nmi(void *opaque, int irq, int level)

1667 +{

1668 + riscv_cpu_set_rnmi(RISCV_CPU(opaque), irq, level);

1669 +}

1670 #endif

1671

1672 static void riscv_tcg_cpu_instance_init(CPUState *cs)

@@ -1674,6 +1679,8 @@ static void riscv_tcg_cpu_instance_init(CPUState *cs)

1679 if (mcc->def->custom_csrs) {

1680 riscv_register_custom_csrs(cpu, mcc->def->custom_csrs);

1681 }

1682 + qdev_init_gpio_in_named(DEVICE(cpu), riscv_cpu_set_nmi,

1683 + "riscv.cpu.rnmi", RNMI_MAX);

1684 #endif

1685

1686 misa_ext_user_opts = g_hash_table_new(NULL, g_direct_equal);