@samitouri / QOSamiQemu / commits / e31f57e96b

hw/misc/aspeed_scu: Add AST1040 A0 silicon revision ID

Add the AST1040 A0 silicon revision definition and register it in the supported Aspeed silicon revision table. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260525053036.3305181-6-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>

Jamin Lin committed May 25, 2026 at 05:30 UTC e31f57e96bbdcd89f94a0316e8ca3d6b749aa9fb
2 files changed +2
hw/misc/aspeed_scu.c
+1
@@ -562,6 +562,7 @@ static uint32_t aspeed_silicon_revs[] = {
562 AST1060_A2_SILICON_REV,
563 AST2700_A1_SILICON_REV,
564 AST2700_A2_SILICON_REV,
565 + AST1040_A0_SILICON_REV,
566 };
567
568 bool is_supported_silicon_rev(uint32_t silicon_rev)
include/hw/misc/aspeed_scu.h
+1
@@ -46,6 +46,7 @@ struct AspeedSCUState {
46 #define AST2600_A3_SILICON_REV 0x05030303U
47 #define AST1030_A1_SILICON_REV 0x80010000U
48 #define AST1060_A2_SILICON_REV 0xA0030000U
49 +#define AST1040_A0_SILICON_REV 0x81000000U
50 #define AST2700_A1_SILICON_REV 0x06010103U
51 #define AST2700_A2_SILICON_REV 0x06020103U
52