@samitouri / QOSamiQemu / commits / e59bd5cdb7

target/riscv: Introduce externally facing CSR access functions

Convert riscv_csr_[read|write]() into target_ulong angnostic CSR access functions that can be safely used from outside of target/ without knowledge of the target register size. Replace the 4 existing CSR accesses in hw/ and linux-user/. Signed-off-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20260520125406.28693-25-anjo@rev.ng> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Anton Johansson committed May 20, 2026 at 14:54 UTC e59bd5cdb7d28a8ea0ee0b3ddabad17b296386a5
5 files changed +27 -20
hw/riscv/riscv_hart.c
+3 -4
@@ -67,12 +67,11 @@ static void csr_call(char *cmd, uint64_t cpu_num, int csrno, uint64_t *val)
67 RISCVCPU *cpu = RISCV_CPU(cpu_by_arch_id(cpu_num));
68 CPURISCVState *env = &cpu->env;
69
70 - int ret = RISCV_EXCP_NONE;
70 + RISCVException ret = RISCV_EXCP_NONE;
71 if (strcmp(cmd, "get_csr") == 0) {
72 - ret = riscv_csrr(env, csrno, (target_ulong *)val);
72 + ret = riscv_csr_read_i64(env, csrno, val);
73 } else if (strcmp(cmd, "set_csr") == 0) {
74 - ret = riscv_csrrw(env, csrno, NULL, *(target_ulong *)val,
75 - MAKE_64BIT_MASK(0, TARGET_LONG_BITS), 0);
74 + ret = riscv_csr_write_i64(env, csrno, *val);
75 }
76
77 g_assert(ret == RISCV_EXCP_NONE);
linux-user/riscv/signal.c
+3 -2
@@ -90,7 +90,8 @@ static void setup_sigcontext(struct target_sigcontext *sc, CPURISCVState *env)
90 __put_user(env->fpr[i], &sc->fpr[i]);
91 }
92
93 - uint32_t fcsr = riscv_csr_read(env, CSR_FCSR);
93 + uint64_t fcsr;
94 + riscv_csr_read_i64(env, CSR_FCSR, &fcsr);
95 __put_user(fcsr, &sc->fcsr);
96 }
97
@@ -159,7 +160,7 @@ static void restore_sigcontext(CPURISCVState *env, struct target_sigcontext *sc)
160
161 uint32_t fcsr;
162 __get_user(fcsr, &sc->fcsr);
162 - riscv_csr_write(env, CSR_FCSR, fcsr);
163 + riscv_csr_write_i64(env, CSR_FCSR, fcsr);
164 }
165
166 static void restore_ucontext(CPURISCVState *env, struct target_ucontext *uc)
target/riscv/cpu.h
+6 -1
@@ -905,7 +905,12 @@ RISCVPmPmm riscv_pm_get_pmm(CPURISCVState *env);
905 RISCVPmPmm riscv_pm_get_vm_ldst_pmm(CPURISCVState *env);
906 uint32_t riscv_pm_get_pmlen(RISCVPmPmm pmm);
907
908 -#include "target/riscv/csr.h"
908 +/*
909 + * Externally facing CSR access functions, wrappers around riscv_csr*().
910 + */
911 +
912 +RISCVException riscv_csr_write_i64(CPURISCVState *env, int csrno, uint64_t val);
913 +RISCVException riscv_csr_read_i64(CPURISCVState *env, int csrn, uint64_t *res);
914
915 /*
916 * The event id are encoded based on the encoding specified in the
target/riscv/csr.c
+15
@@ -5751,6 +5751,21 @@ RISCVException riscv_csrrw(CPURISCVState *env, int csrno,
5751 return riscv_csrrw_do64(env, csrno, ret_value, new_value, write_mask, ra);
5752 }
5753
5754 +RISCVException riscv_csr_write_i64(CPURISCVState *env, int csrno, uint64_t val)
5755 +{
5756 + return riscv_csrrw(env, csrno, NULL, val,
5757 + MAKE_64BIT_MASK(0, TARGET_LONG_BITS), 0);
5758 +}
5759 +
5760 +RISCVException riscv_csr_read_i64(CPURISCVState *env, int csrno, uint64_t *res)
5761 +{
5762 + RISCVException ret;
5763 + target_ulong val = 0;
5764 + ret = riscv_csrr(env, csrno, &val);
5765 + *res = val;
5766 + return ret;
5767 +}
5768 +
5769 static RISCVException riscv_csrrw_do128(CPURISCVState *env, int csrno,
5770 Int128 *ret_value,
5771 Int128 new_value,
target/riscv/csr.h
-13
@@ -26,19 +26,6 @@ RISCVException riscv_csrrw_debug(CPURISCVState *env, int csrno,
26 target_ulong new_value,
27 target_ulong write_mask);
28
29 -static inline void riscv_csr_write(CPURISCVState *env, int csrno,
30 - target_ulong val)
31 -{
32 - riscv_csrrw(env, csrno, NULL, val, MAKE_64BIT_MASK(0, TARGET_LONG_BITS), 0);
33 -}
34 -
35 -static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno)
36 -{
37 - target_ulong val = 0;
38 - riscv_csrr(env, csrno, &val);
39 - return val;
40 -}
41 -
29 typedef RISCVException (*riscv_csr_predicate_fn)(CPURISCVState *env,
30 int csrno);
31 typedef RISCVException (*riscv_csr_read_fn)(CPURISCVState *env, int csrno,