@samitouri / QOSamiQemu / commits / ea5ecf8e61

target/hppa: Inline UNALIGN() macro

Directly access DisasContext::mo_align in place. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Helge Deller <deller@gmx.de> Message-Id: <20260513074323.10616-3-philmd@linaro.org>

Philippe Mathieu-Daudé committed May 13, 2026 at 09:40 UTC ea5ecf8e61c867fc5a6cd0671a278cef9e34851c
1 file changed +9 -7
target/hppa/translate.c
+9 -7
@@ -95,10 +95,8 @@ typedef struct DisasContext {
95 } DisasContext;
96
97 #ifdef CONFIG_USER_ONLY
98 -#define UNALIGN(C) ((C)->mo_align)
98 #define MMU_DISABLED(C) false
99 #else
101 -#define UNALIGN(C) ((C)->mo_align)
100 #define MMU_DISABLED(C) MMU_IDX_MMU_DISABLED((C)->mmu_idx)
101 #endif
102
@@ -1603,10 +1601,11 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
1601 /* Caller uses nullify_over/nullify_end. */
1602 assert(ctx->null_cond.c == TCG_COND_NEVER);
1603
1604 + mop |= ctx->mo_align;
1605 mop |= mo_endian(ctx);
1606 form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
1607 MMU_DISABLED(ctx));
1609 - tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
1608 + tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop);
1609 if (modify) {
1610 save_gpr(ctx, rb, ofs);
1611 }
@@ -1622,10 +1621,11 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
1621 /* Caller uses nullify_over/nullify_end. */
1622 assert(ctx->null_cond.c == TCG_COND_NEVER);
1623
1624 + mop |= ctx->mo_align;
1625 mop |= mo_endian(ctx);
1626 - form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
1626 + form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
1627 MMU_DISABLED(ctx));
1628 - tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
1628 + tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop);
1629 if (modify) {
1630 save_gpr(ctx, rb, ofs);
1631 }
@@ -1641,10 +1641,11 @@ static void do_store_32(DisasContext *ctx, TCGv_i32 src, unsigned rb,
1641 /* Caller uses nullify_over/nullify_end. */
1642 assert(ctx->null_cond.c == TCG_COND_NEVER);
1643
1644 + mop |= ctx->mo_align;
1645 mop |= mo_endian(ctx);
1646 form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
1647 MMU_DISABLED(ctx));
1647 - tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
1648 + tcg_gen_qemu_st_i32(src, addr, ctx->mmu_idx, mop);
1649 if (modify) {
1650 save_gpr(ctx, rb, ofs);
1651 }
@@ -1660,10 +1661,11 @@ static void do_store_64(DisasContext *ctx, TCGv_i64 src, unsigned rb,
1661 /* Caller uses nullify_over/nullify_end. */
1662 assert(ctx->null_cond.c == TCG_COND_NEVER);
1663
1664 + mop |= ctx->mo_align;
1665 mop |= mo_endian(ctx);
1666 form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
1667 MMU_DISABLED(ctx));
1666 - tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
1668 + tcg_gen_qemu_st_i64(src, addr, ctx->mmu_idx, mop);
1669 if (modify) {
1670 save_gpr(ctx, rb, ofs);
1671 }