@samitouri / QOSamiQemu / commits / ea87cc5e3c

hw/pci-host: Split PowerNV PHB5 code from PHB4 files

Separate Power10/11 PHB5 implementation from Power9 PHB4 code for better maintainability and clarity. This is a pure code movement with no functional changes. Signed-off-by: Jishnu Warrier <jishnuvw@linux.ibm.com> Reviewed-by: Aditya Gupta <adityag@linux.ibm.com> Link: https://lore.kernel.org/qemu-devel/20260608093430.2729688-1-jishnuvw@linux.ibm.com Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>

Jishnu Warrier committed Jun 8, 2026 at 15:04 UTC ea87cc5e3cec916ebf3f7bd320ea585913121ad3
5 files changed +102 -64
hw/pci-host/meson.build
+2
@@ -44,5 +44,7 @@ specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files(
44 'pnv_phb3_pbcq.c',
45 'pnv_phb4.c',
46 'pnv_phb4_pec.c',
47 + 'pnv_phb5.c',
48 + 'pnv_phb5_pec.c',
49 'pnv_phb.c',
50 ))
hw/pci-host/pnv_phb4.c
-6
@@ -1721,11 +1721,6 @@ static const TypeInfo pnv_phb4_type_info = {
1721 }
1722 };
1723
1724 -static const TypeInfo pnv_phb5_type_info = {
1725 - .name = TYPE_PNV_PHB5,
1726 - .parent = TYPE_PNV_PHB4,
1727 - .instance_size = sizeof(PnvPHB4),
1728 -};
1724
1725 static void pnv_phb4_root_bus_get_prop(Object *obj, Visitor *v,
1726 const char *name,
@@ -1794,7 +1789,6 @@ static void pnv_phb4_register_types(void)
1789 {
1790 type_register_static(&pnv_phb4_root_bus_info);
1791 type_register_static(&pnv_phb4_type_info);
1797 - type_register_static(&pnv_phb5_type_info);
1792 type_register_static(&pnv_phb4_iommu_memory_region_info);
1793 }
1794
hw/pci-host/pnv_phb4_pec.c
-58
@@ -394,67 +394,9 @@ static const TypeInfo pnv_pec_type_info = {
394 }
395 };
396
397 -/*
398 - * POWER10 definitions
399 - */
400 -static uint32_t pnv_phb5_pec_xscom_cplt_base(PnvPhb4PecState *pec)
401 -{
402 - return PNV10_XSCOM_PEC_NEST_CPLT_BASE + XPEC_PCI_CPLT_OFFSET * pec->index;
403 -}
404 -
405 -static uint32_t pnv_phb5_pec_xscom_pci_base(PnvPhb4PecState *pec)
406 -{
407 - return PNV10_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
408 -}
409 -
410 -static uint32_t pnv_phb5_pec_xscom_nest_base(PnvPhb4PecState *pec)
411 -{
412 - /* index goes down ... */
413 - return PNV10_XSCOM_PEC_NEST_BASE - 0x1000000 * pec->index;
414 -}
415 -
416 -/*
417 - * PEC0 -> 3 stacks
418 - * PEC1 -> 3 stacks
419 - */
420 -static const uint32_t pnv_phb5_pec_num_stacks[] = { 3, 3 };
421 -
422 -static void pnv_phb5_pec_class_init(ObjectClass *klass, const void *data)
423 -{
424 - PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
425 - static const char compat[] = "ibm,power10-pbcq";
426 - static const char stk_compat[] = "ibm,power10-phb-stack";
427 -
428 - pecc->xscom_cplt_base = pnv_phb5_pec_xscom_cplt_base;
429 - pecc->xscom_nest_base = pnv_phb5_pec_xscom_nest_base;
430 - pecc->xscom_pci_base = pnv_phb5_pec_xscom_pci_base;
431 - pecc->xscom_nest_size = PNV10_XSCOM_PEC_NEST_SIZE;
432 - pecc->xscom_pci_size = PNV10_XSCOM_PEC_PCI_SIZE;
433 - pecc->compat = compat;
434 - pecc->compat_size = sizeof(compat);
435 - pecc->stk_compat = stk_compat;
436 - pecc->stk_compat_size = sizeof(stk_compat);
437 - pecc->version = PNV_PHB5_VERSION;
438 - pecc->phb_type = TYPE_PNV_PHB5;
439 - pecc->num_phbs = pnv_phb5_pec_num_stacks;
440 -}
441 -
442 -static const TypeInfo pnv_phb5_pec_type_info = {
443 - .name = TYPE_PNV_PHB5_PEC,
444 - .parent = TYPE_PNV_PHB4_PEC,
445 - .instance_size = sizeof(PnvPhb4PecState),
446 - .class_init = pnv_phb5_pec_class_init,
447 - .class_size = sizeof(PnvPhb4PecClass),
448 - .interfaces = (const InterfaceInfo[]) {
449 - { TYPE_PNV_XSCOM_INTERFACE },
450 - { }
451 - }
452 -};
453 -
397 static void pnv_pec_register_types(void)
398 {
399 type_register_static(&pnv_pec_type_info);
457 - type_register_static(&pnv_phb5_pec_type_info);
400 }
401
402 type_init(pnv_pec_register_types);
hw/pci-host/pnv_phb5.c new
+23
@@ -0,0 +1,23 @@
1 +/*
2 + * QEMU PowerPC PowerNV (POWER10) PHB5 model
3 + *
4 + * Copyright (c) 2018-2026, IBM Corporation.
5 + *
6 + * SPDX-License-Identifier: GPL-2.0-or-later
7 + */
8 +
9 +#include "qemu/osdep.h"
10 +#include "hw/pci-host/pnv_phb4.h"
11 +
12 +static const TypeInfo pnv_phb5_type_info = {
13 + .name = TYPE_PNV_PHB5,
14 + .parent = TYPE_PNV_PHB4,
15 + .instance_size = sizeof(PnvPHB4),
16 +};
17 +
18 +static void pnv_phb5_register_types(void)
19 +{
20 + type_register_static(&pnv_phb5_type_info);
21 +}
22 +
23 +type_init(pnv_phb5_register_types);
hw/pci-host/pnv_phb5_pec.c new
+77
@@ -0,0 +1,77 @@
1 +/*
2 + * QEMU PowerPC PowerNV (POWER10) PHB5 PEC model
3 + *
4 + * Copyright (c) 2018-2026, IBM Corporation.
5 + *
6 + * SPDX-License-Identifier: GPL-2.0-or-later
7 + */
8 +
9 +#include "qemu/osdep.h"
10 +#include "hw/pci-host/pnv_phb4.h"
11 +#include "hw/ppc/pnv_xscom.h"
12 +
13 +#define XPEC_PCI_CPLT_OFFSET 0x1000000ULL
14 +
15 +/*
16 + * POWER10 definitions
17 + */
18 +static uint32_t pnv_phb5_pec_xscom_cplt_base(PnvPhb4PecState *pec)
19 +{
20 + return PNV10_XSCOM_PEC_NEST_CPLT_BASE + XPEC_PCI_CPLT_OFFSET * pec->index;
21 +}
22 +
23 +static uint32_t pnv_phb5_pec_xscom_pci_base(PnvPhb4PecState *pec)
24 +{
25 + return PNV10_XSCOM_PEC_PCI_BASE + 0x1000000 * pec->index;
26 +}
27 +
28 +static uint32_t pnv_phb5_pec_xscom_nest_base(PnvPhb4PecState *pec)
29 +{
30 + /* index goes down ... */
31 + return PNV10_XSCOM_PEC_NEST_BASE - 0x1000000 * pec->index;
32 +}
33 +
34 +/*
35 + * PEC0 -> 3 stacks
36 + * PEC1 -> 3 stacks
37 + */
38 +static const uint32_t pnv_phb5_pec_num_stacks[] = { 3, 3 };
39 +
40 +static void pnv_phb5_pec_class_init(ObjectClass *klass, const void *data)
41 +{
42 + PnvPhb4PecClass *pecc = PNV_PHB4_PEC_CLASS(klass);
43 + static const char compat[] = "ibm,power10-pbcq";
44 + static const char stk_compat[] = "ibm,power10-phb-stack";
45 +
46 + pecc->xscom_cplt_base = pnv_phb5_pec_xscom_cplt_base;
47 + pecc->xscom_nest_base = pnv_phb5_pec_xscom_nest_base;
48 + pecc->xscom_pci_base = pnv_phb5_pec_xscom_pci_base;
49 + pecc->xscom_nest_size = PNV10_XSCOM_PEC_NEST_SIZE;
50 + pecc->xscom_pci_size = PNV10_XSCOM_PEC_PCI_SIZE;
51 + pecc->compat = compat;
52 + pecc->compat_size = sizeof(compat);
53 + pecc->stk_compat = stk_compat;
54 + pecc->stk_compat_size = sizeof(stk_compat);
55 + pecc->version = PNV_PHB5_VERSION;
56 + pecc->phb_type = TYPE_PNV_PHB5;
57 + pecc->num_phbs = pnv_phb5_pec_num_stacks;
58 +}
59 +
60 +static const TypeInfo pnv_phb5_pec_type_info = {
61 + .name = TYPE_PNV_PHB5_PEC,
62 + .parent = TYPE_PNV_PHB4_PEC,
63 + .instance_size = sizeof(PnvPhb4PecState),
64 + .class_init = pnv_phb5_pec_class_init,
65 + .class_size = sizeof(PnvPhb4PecClass),
66 + .interfaces = (const InterfaceInfo[]) {
67 + { TYPE_PNV_XSCOM_INTERFACE },
68 + { }
69 + }
70 +};
71 +
72 +static void pnv_phb5_pec_register_types(void)
73 +{
74 + type_register_static(&pnv_phb5_pec_type_info);
75 +}
76 +
77 +type_init(pnv_phb5_pec_register_types);