hw/scsi/vmw_pvscsi: add a comment to explain the endianness
Add a comment to explain the endianness of the pvscsi device. We have no information about the endianness should be little-endian or CPU native endian because the current driver code is designed to work only on x86 and is not endianness aware. We assume that the pvscsi device is implicitly little-endian. Signed-off-by: Miao Wang <shankerwangmiao@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-ID: <20260710-pvscsi-endianness-v3-2-27fe1c4d1f6e@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Miao Wang committed
Jul 10, 2026 at 03:21 UTC
ecc569639aeb5b702f1098d3eb5b28d3168604c8
1 file changed
+14
hw/scsi/vmw_pvscsi.h
+14
@@ -108,6 +108,20 @@ enum PVSCSICommands {
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#define PVSCSI_COMMAND_PROCESSING_FAILED (-1)
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#define PVSCSI_COMMAND_NOT_ENOUGH_DATA (-2)
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+/*
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+ * About endianess for the below structs:
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+ *
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+ * These structs are used to describe the data that is exchanged between the
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+ * guest and the PVSCSI device. The endianess of the fields in these structs
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+ * is not defined by any standard. The current implemented drivers are designed
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+ * to only work on x86 architecture, so there is no endianess awareness in the
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+ * drivers and thus we have no idea whether the fields should be in little-
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+ * endian or target native endian format.
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+ *
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+ * Considering the above, we assume that PVSCSI is implicitly little-endian and
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+ * expect the fields in these structs to be in little-endian format.
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+ */
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+
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/*
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* Command descriptor for PVSCSI_CMD_RESET_DEVICE --
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*/