hw/arm/aspeed_ast27x0: Move SCU link into AST27x0 coprocessors
The SCU link is only needed by the AST27x0 SSP/TSP coprocessors for their AST2700-specific SCU alias window. Move the link property from the common AspeedCoprocessorState into Aspeed27x0CoprocessorState, so the generic coprocessor model no longer contains an AST2700-specific dependency. Also validate that the SCU link has been provided during device realize before accessing it. No functional change. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Link: https://lore.kernel.org/qemu-devel/20260717084559.3477061-4-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Jamin Lin committed
Jul 17, 2026 at 08:46 UTC
ee3f2ace6fc8c9e079fd49b78ea6f71edb225fdd
4 files changed
+35
-12
hw/arm/aspeed_ast27x0-ssp.c
+16
-4
@@ -167,6 +167,12 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
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return;
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}
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+ if (!a->scu) {
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+ error_setg(errp, TYPE_ASPEED27X0SSP_COPROCESSOR
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+ ": 'scu' link is not set");
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+ return;
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+ }
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+
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/* AST27X0 SSP Core */
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armv7m = DEVICE(&a->armv7m);
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qdev_prop_set_uint32(armv7m, "num-irq", 256);
@@ -195,11 +201,11 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
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&s->sram_alias);
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/* SCU */
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- memory_region_init_alias(&s->scu_alias, OBJECT(s), "scu.alias",
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- &s->scu->iomem, 0,
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- memory_region_size(&s->scu->iomem));
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+ memory_region_init_alias(&a->scu_alias, OBJECT(a), "scu.alias",
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+ &a->scu->parent_obj.iomem, 0,
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+ memory_region_size(&a->scu->parent_obj.iomem));
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memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
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- &s->scu_alias);
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+ &a->scu_alias);
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/* INTC */
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if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
@@ -275,6 +281,11 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
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sc->memmap[ASPEED_DEV_OTP], 0x800);
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}
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+static const Property aspeed_27x0_coprocessor_properties[] = {
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+ DEFINE_PROP_LINK("scu", Aspeed27x0CoprocessorState, scu,
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+ TYPE_ASPEED_2700_SCU, Aspeed2700SCUState *),
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+};
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+
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static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass,
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const void *data)
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{
@@ -288,6 +299,7 @@ static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass,
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/* Reason: The Aspeed Coprocessor can only be instantiated from a board */
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dc->user_creatable = false;
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dc->realize = aspeed_soc_ast27x0ssp_realize;
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+ device_class_set_props(dc, aspeed_27x0_coprocessor_properties);
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sc->valid_cpu_types = valid_cpu_types;
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sc->irqmap = aspeed_soc_ast27x0ssp_irqmap;
hw/arm/aspeed_ast27x0-tsp.c
+16
-4
@@ -167,6 +167,12 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
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return;
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}
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+ if (!a->scu) {
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+ error_setg(errp, TYPE_ASPEED27X0TSP_COPROCESSOR
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+ ": 'scu' link is not set");
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+ return;
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+ }
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+
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/* AST27X0 TSP Core */
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armv7m = DEVICE(&a->armv7m);
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qdev_prop_set_uint32(armv7m, "num-irq", 256);
@@ -195,11 +201,11 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
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&s->sram_alias);
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/* SCU */
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- memory_region_init_alias(&s->scu_alias, OBJECT(s), "scu.alias",
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- &s->scu->iomem, 0,
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- memory_region_size(&s->scu->iomem));
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+ memory_region_init_alias(&a->scu_alias, OBJECT(a), "scu.alias",
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+ &a->scu->parent_obj.iomem, 0,
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+ memory_region_size(&a->scu->parent_obj.iomem));
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memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
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- &s->scu_alias);
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+ &a->scu_alias);
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/* INTC */
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if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
@@ -275,6 +281,11 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
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sc->memmap[ASPEED_DEV_OTP], 0x800);
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}
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+static const Property aspeed_27x0_coprocessor_properties[] = {
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+ DEFINE_PROP_LINK("scu", Aspeed27x0CoprocessorState, scu,
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+ TYPE_ASPEED_2700_SCU, Aspeed2700SCUState *),
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+};
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+
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static void aspeed_soc_ast27x0tsp_class_init(ObjectClass *klass,
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const void *data)
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{
@@ -288,6 +299,7 @@ static void aspeed_soc_ast27x0tsp_class_init(ObjectClass *klass,
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/* Reason: The Aspeed Coprocessor can only be instantiated from a board */
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dc->user_creatable = false;
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dc->realize = aspeed_soc_ast27x0tsp_realize;
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+ device_class_set_props(dc, aspeed_27x0_coprocessor_properties);
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sc->valid_cpu_types = valid_cpu_types;
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sc->irqmap = aspeed_soc_ast27x0tsp_irqmap;
hw/arm/aspeed_coprocessor_common.c
-2
@@ -27,8 +27,6 @@ static const Property aspeed_coprocessor_properties[] = {
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TYPE_MEMORY_REGION, MemoryRegion *),
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DEFINE_PROP_LINK("sram", AspeedCoprocessorState, sram, TYPE_MEMORY_REGION,
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MemoryRegion *),
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- DEFINE_PROP_LINK("scu", AspeedCoprocessorState, scu, TYPE_ASPEED_SCU,
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- AspeedSCUState *),
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DEFINE_PROP_LINK("uart", AspeedCoprocessorState, uart, TYPE_SERIAL_MM,
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SerialMM *),
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DEFINE_PROP_INT32("uart-dev", AspeedCoprocessorState, uart_dev, 0),
include/hw/arm/aspeed_coprocessor.h
+3
-2
@@ -20,10 +20,8 @@ struct AspeedCoprocessorState {
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MemoryRegion *sram;
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MemoryRegion sram_alias;
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MemoryRegion uart_alias;
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- MemoryRegion scu_alias;
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Clock *sysclk;
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- AspeedSCUState *scu;
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AspeedSCUState scuio;
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AspeedTimerCtrlState timerctrl;
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SerialMM *uart;
@@ -52,6 +50,9 @@ struct Aspeed27x0CoprocessorState {
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UnimplementedDeviceState otp;
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ARMv7MState armv7m;
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+
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+ MemoryRegion scu_alias;
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+ Aspeed2700SCUState *scu;
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};
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#define TYPE_ASPEED27X0SSP_COPROCESSOR "aspeed27x0ssp-coprocessor"