target/hexagon: Add PC to raise_exception, use fTRAP() helper
Add PC to raise_exception helper Replace the fGEN_TCG_J2_trap0 macro override with the fTRAP()-generated system helper instead. Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain committed
Jun 22, 2026 at 15:28 UTC
eebc37677384e15d53fa17632e2b223d9548e91b
4 files changed
+21
-19
target/hexagon/gen_tcg.h
-7
@@ -1349,13 +1349,6 @@
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#define fGEN_TCG_S2_storew_rl_st_vi(SHORTCODE) SHORTCODE
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#define fGEN_TCG_S4_stored_rl_st_vi(SHORTCODE) SHORTCODE
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-#define fGEN_TCG_J2_trap0(SHORTCODE) \
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- do { \
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- uiV = uiV; \
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- tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt.pc); \
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- TCGv excp = tcg_constant_tl(HEX_EVENT_TRAP0); \
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- gen_helper_raise_exception(tcg_env, excp); \
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- } while (0)
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#endif
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1354
#define fGEN_TCG_A2_nop(SHORTCODE) do { } while (0)
target/hexagon/helper.h
+1
-1
@@ -18,7 +18,7 @@
18
#include "internal.h"
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#include "helper_protos_generated.h.inc"
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-DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32)
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+DEF_HELPER_FLAGS_3(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32, i32)
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DEF_HELPER_2(commit_store, void, env, int)
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DEF_HELPER_3(gather_store, void, env, i32, int)
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DEF_HELPER_1(commit_hvx_stores, void, env)
target/hexagon/op_helper.c
+4
-6
@@ -66,15 +66,13 @@ G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env,
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uint32_t exception,
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uintptr_t pc)
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{
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- CPUState *cs = env_cpu(env);
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- qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
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- cs->exception_index = exception;
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- cpu_loop_exit_restore(cs, pc);
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+ do_raise_exception(env, exception, pc, 0);
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}
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-G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp)
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+G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp,
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+ uint32_t PC)
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{
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- hexagon_raise_exception_err(env, excp, 0);
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+ hexagon_raise_exception_err(env, excp, PC);
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}
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void log_store32(CPUHexagonState *env, target_ulong addr,
target/hexagon/translate.c
+16
-5
@@ -126,12 +126,19 @@ intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regnum,
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return offset;
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}
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-static void gen_exception_raw(int excp)
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+static void gen_exception(int excp, uint32_t PC)
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{
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- gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp));
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+ gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp),
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+ tcg_constant_i32(PC));
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}
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#ifndef CONFIG_USER_ONLY
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+static inline void gen_precise_exception(int excp, uint32_t PC)
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+{
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+ tcg_gen_movi_i32(hex_cause_code, excp);
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+ gen_exception(HEX_EVENT_PRECISE, PC);
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+}
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+
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static void gen_pcycle_counters(DisasContext *ctx)
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{
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if (ctx->pcycle_enabled) {
@@ -140,6 +147,7 @@ static void gen_pcycle_counters(DisasContext *ctx)
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}
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#endif
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+
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static void gen_exec_counters(DisasContext *ctx)
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{
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tcg_gen_addi_tl(hex_gpr[HEX_REG_QEMU_PKT_CNT],
@@ -211,8 +219,11 @@ static void gen_end_tb(DisasContext *ctx)
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void hex_gen_exception_end_tb(DisasContext *ctx, int excp)
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{
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gen_exec_counters(ctx);
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- tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);
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- gen_exception_raw(excp);
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+#ifdef CONFIG_USER_ONLY
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+ gen_exception(excp, ctx->pkt.pc);
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+#else
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+ gen_precise_exception(excp, ctx->pkt.pc);
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+#endif
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ctx->base.is_jmp = DISAS_NORETURN;
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}
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@@ -226,7 +237,7 @@ static void gen_exception_decode_fail(DisasContext *ctx, int nwords, int excp)
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gen_exec_counters(ctx);
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tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], fail_pc);
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- gen_exception_raw(excp);
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+ gen_exception(excp, fail_pc);
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ctx->base.is_jmp = DISAS_NORETURN;
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ctx->base.pc_next = fail_pc;
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}