@samitouri / QOSamiQemu / commits / eebc376773

target/hexagon: Add PC to raise_exception, use fTRAP() helper

Add PC to raise_exception helper Replace the fGEN_TCG_J2_trap0 macro override with the fTRAP()-generated system helper instead. Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>

Brian Cain committed Jun 22, 2026 at 15:28 UTC eebc37677384e15d53fa17632e2b223d9548e91b
4 files changed +21 -19
target/hexagon/gen_tcg.h
-7
@@ -1349,13 +1349,6 @@
1349 #define fGEN_TCG_S2_storew_rl_st_vi(SHORTCODE) SHORTCODE
1350 #define fGEN_TCG_S4_stored_rl_st_vi(SHORTCODE) SHORTCODE
1351
1352 -#define fGEN_TCG_J2_trap0(SHORTCODE) \
1353 - do { \
1354 - uiV = uiV; \
1355 - tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->pkt.pc); \
1356 - TCGv excp = tcg_constant_tl(HEX_EVENT_TRAP0); \
1357 - gen_helper_raise_exception(tcg_env, excp); \
1358 - } while (0)
1352 #endif
1353
1354 #define fGEN_TCG_A2_nop(SHORTCODE) do { } while (0)
target/hexagon/helper.h
+1 -1
@@ -18,7 +18,7 @@
18 #include "internal.h"
19 #include "helper_protos_generated.h.inc"
20
21 -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32)
21 +DEF_HELPER_FLAGS_3(raise_exception, TCG_CALL_NO_RETURN, noreturn, env, i32, i32)
22 DEF_HELPER_2(commit_store, void, env, int)
23 DEF_HELPER_3(gather_store, void, env, i32, int)
24 DEF_HELPER_1(commit_hvx_stores, void, env)
target/hexagon/op_helper.c
+4 -6
@@ -66,15 +66,13 @@ G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env,
66 uint32_t exception,
67 uintptr_t pc)
68 {
69 - CPUState *cs = env_cpu(env);
70 - qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
71 - cs->exception_index = exception;
72 - cpu_loop_exit_restore(cs, pc);
69 + do_raise_exception(env, exception, pc, 0);
70 }
71
75 -G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp)
72 +G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp,
73 + uint32_t PC)
74 {
77 - hexagon_raise_exception_err(env, excp, 0);
75 + hexagon_raise_exception_err(env, excp, PC);
76 }
77
78 void log_store32(CPUHexagonState *env, target_ulong addr,
target/hexagon/translate.c
+16 -5
@@ -126,12 +126,19 @@ intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regnum,
126 return offset;
127 }
128
129 -static void gen_exception_raw(int excp)
129 +static void gen_exception(int excp, uint32_t PC)
130 {
131 - gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp));
131 + gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp),
132 + tcg_constant_i32(PC));
133 }
134
135 #ifndef CONFIG_USER_ONLY
136 +static inline void gen_precise_exception(int excp, uint32_t PC)
137 +{
138 + tcg_gen_movi_i32(hex_cause_code, excp);
139 + gen_exception(HEX_EVENT_PRECISE, PC);
140 +}
141 +
142 static void gen_pcycle_counters(DisasContext *ctx)
143 {
144 if (ctx->pcycle_enabled) {
@@ -140,6 +147,7 @@ static void gen_pcycle_counters(DisasContext *ctx)
147 }
148 #endif
149
150 +
151 static void gen_exec_counters(DisasContext *ctx)
152 {
153 tcg_gen_addi_tl(hex_gpr[HEX_REG_QEMU_PKT_CNT],
@@ -211,8 +219,11 @@ static void gen_end_tb(DisasContext *ctx)
219 void hex_gen_exception_end_tb(DisasContext *ctx, int excp)
220 {
221 gen_exec_counters(ctx);
214 - tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);
215 - gen_exception_raw(excp);
222 +#ifdef CONFIG_USER_ONLY
223 + gen_exception(excp, ctx->pkt.pc);
224 +#else
225 + gen_precise_exception(excp, ctx->pkt.pc);
226 +#endif
227 ctx->base.is_jmp = DISAS_NORETURN;
228 }
229
@@ -226,7 +237,7 @@ static void gen_exception_decode_fail(DisasContext *ctx, int nwords, int excp)
237
238 gen_exec_counters(ctx);
239 tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], fail_pc);
229 - gen_exception_raw(excp);
240 + gen_exception(excp, fail_pc);
241 ctx->base.is_jmp = DISAS_NORETURN;
242 ctx->base.pc_next = fail_pc;
243 }