target/hexagon: Fix badva reference, delete CAUSE
The BADVA reg is referred to with the wrong identifier. The CAUSE reg field of SSR is not yet modeled, we will dump the SSR in a subsequent commit. Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain committed
Jun 22, 2026 at 15:27 UTC
ef259446d157299c259ae57ae5987280b7f97f0f
1 file changed
+9
-2
target/hexagon/cpu.c
+9
-2
@@ -110,6 +110,14 @@ static void print_reg(FILE *f, CPUHexagonState *env, int regnum)
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hexagon_regnames[regnum], value);
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}
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+#ifndef CONFIG_USER_ONLY
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+static void print_t_sreg(FILE *f, const CPUHexagonState *env, int regnum)
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+{
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+ qemu_fprintf(f, " %s = 0x" TARGET_FMT_lx "\n",
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+ hexagon_sregnames[regnum], env->t_sreg[regnum]);
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+}
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+#endif
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+
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static void print_vreg(FILE *f, CPUHexagonState *env, int regnum,
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bool skip_if_zero)
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{
@@ -209,8 +217,7 @@ static void hexagon_dump(CPUHexagonState *env, FILE *f, int flags)
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qemu_fprintf(f, " cs0 = 0x00000000\n");
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qemu_fprintf(f, " cs1 = 0x00000000\n");
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#else
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- print_reg(f, env, HEX_REG_CAUSE);
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- print_reg(f, env, HEX_REG_BADVA);
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+ print_t_sreg(f, env, HEX_SREG_BADVA);
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print_reg(f, env, HEX_REG_CS0);
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print_reg(f, env, HEX_REG_CS1);
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#endif