target/hexagon: Add TCG overrides for transfer insts
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
Brian Cain committed
Jun 22, 2026 at 15:28 UTC
f2a2ccf48f1e40c0a74e260fe28251da56eb4f57
1 file changed
+25
target/hexagon/gen_tcg_sys.h
+25
@@ -95,6 +95,31 @@
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gen_helper_stop(tcg_env); \
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} while (0)
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+#define fGEN_TCG_Y2_tfrscrr(SHORTCODE) \
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+ tcg_gen_mov_tl(RdV, SsV)
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+
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+#define fGEN_TCG_Y2_tfrsrcr(SHORTCODE) \
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+ tcg_gen_mov_tl(SdV, RsV)
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+
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+#define fGEN_TCG_Y4_tfrscpp(SHORTCODE) \
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+ tcg_gen_mov_i64(RddV, SssV)
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+
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+#define fGEN_TCG_Y4_tfrspcp(SHORTCODE) \
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+ tcg_gen_mov_i64(SddV, RssV)
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+
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+#define fGEN_TCG_G4_tfrgcrr(SHORTCODE) \
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+ tcg_gen_mov_tl(RdV, GsV)
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+
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+#define fGEN_TCG_G4_tfrgrcr(SHORTCODE) \
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+ tcg_gen_mov_tl(GdV, RsV)
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+
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+#define fGEN_TCG_G4_tfrgcpp(SHORTCODE) \
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+ tcg_gen_mov_i64(RddV, GssV)
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+
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+#define fGEN_TCG_G4_tfrgpcp(SHORTCODE) \
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+ tcg_gen_mov_i64(GddV, RssV)
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+
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+
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/*
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* rte (return from exception)
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* Clear the EX bit in SSR