@samitouri / QOSamiQemu / commits / f5541f51cf

hw/dma/soc_dma: Remove unused mem.base, paddr fields

Now that transfer_mem2mem() uses physical_memory_map(), the soc_dma_ch_s::paddr field is unused; remove it, and the code that set it, and the memmap_entry_s::mem.base and the soc_dma_port_add_mem() phys_base argument that were passing around host pointers to use for setting paddr. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Message-id: 20260710105907.2570621-8-peter.maydell@linaro.org

Peter Maydell committed Jul 20, 2026 at 19:05 UTC f5541f51cf0782485c3e77e05f1a5adc73b1d692
3 files changed +5 -17
hw/arm/omap1.c
+2 -4
@@ -3799,10 +3799,8 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram,
3799 s->port[tipb_mpui].addr_valid = omap_validate_tipb_mpui_addr;
3800
3801 /* Register SDRAM and SRAM DMA ports for fast transfers. */
3802 - soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(dram),
3803 - OMAP_EMIFF_BASE, s->sdram_size);
3804 - soc_dma_port_add_mem(s->dma, memory_region_get_ram_ptr(&s->imif_ram),
3805 - OMAP_IMIF_BASE, s->sram_size);
3802 + soc_dma_port_add_mem(s->dma, OMAP_EMIFF_BASE, s->sdram_size);
3803 + soc_dma_port_add_mem(s->dma, OMAP_IMIF_BASE, s->sram_size);
3804
3805 s->timer[0] = omap_mpu_timer_init(system_memory, 0xfffec500,
3806 qdev_get_gpio_in(s->ih[0], OMAP_INT_TIMER1),
hw/dma/soc_dma.c
+1 -8
@@ -85,7 +85,6 @@ struct dma_s {
85 enum soc_dma_port_type type;
86 hwaddr addr;
87 struct {
88 - void *base;
88 size_t size;
89 } mem;
90 } *memmap;
@@ -154,10 +153,6 @@ static inline enum soc_dma_port_type soc_dma_ch_update_type(
153 if (ch->type[port] != soc_dma_access_const)
154 return soc_dma_port_other;
155
157 - ch->paddr[port] = (uint8_t *) entry->mem.base +
158 - (ch->vaddr[port] - entry->addr);
159 - /* TODO: save bytes left to the end of the mapping somewhere so we
160 - * can check we're not reading beyond it. */
156 return soc_dma_port_mem;
157 } else
158 return soc_dma_port_other;
@@ -245,8 +240,7 @@ struct soc_dma_s *soc_dma_init(int n)
240 return &s->soc;
241 }
242
248 -void soc_dma_port_add_mem(struct soc_dma_s *soc, uint8_t *phys_base,
249 - hwaddr virt_base, size_t size)
243 +void soc_dma_port_add_mem(struct soc_dma_s *soc, hwaddr virt_base, size_t size)
244 {
245 struct memmap_entry_s *entry;
246 struct dma_s *dma = (struct dma_s *) soc;
@@ -293,7 +287,6 @@ void soc_dma_port_add_mem(struct soc_dma_s *soc, uint8_t *phys_base,
287
288 entry->addr = virt_base;
289 entry->type = soc_dma_port_mem;
296 - entry->mem.base = phys_base;
290 entry->mem.size = size;
291 }
292
include/hw/arm/soc_dma.h
+2 -5
@@ -53,8 +53,6 @@ struct soc_dma_ch_s {
53 /* Initialised by the DMA module, call soc_dma_ch_update after writing. */
54 enum soc_dma_access_type type[2];
55 hwaddr vaddr[2]; /* Updated by .transfer_fn(). */
56 - /* Private */
57 - void *paddr[2];
56
57 int running;
58 soc_dma_transfer_t transfer_fn;
@@ -83,7 +81,6 @@ void soc_dma_set_request(struct soc_dma_ch_s *ch, int level);
81 * calling soc_dma_set_request(ch, 1):
82 * ch->type[0...1],
83 * ch->vaddr[0...1],
86 - * ch->paddr[0...1],
84 * or after a soc_dma_port_add_mem().
85 */
86 void soc_dma_ch_update(struct soc_dma_ch_s *ch);
@@ -92,7 +89,7 @@ void soc_dma_ch_update(struct soc_dma_ch_s *ch);
89 void soc_dma_reset(struct soc_dma_s *s);
90 struct soc_dma_s *soc_dma_init(int n);
91
95 -void soc_dma_port_add_mem(struct soc_dma_s *dma, uint8_t *phys_base,
96 - hwaddr virt_base, size_t size);
92 +void soc_dma_port_add_mem(struct soc_dma_s *dma,
93 + hwaddr virt_base, size_t size);
94
95 #endif