hw/ssi: npcm7xx_fiu: Correct the dummy cycle emulation logic
Change send_dummy_bits() to send_dummy_bytes() as the FIU register fields are programmed from spi_mem_op.dummy.nbytes, so they already describe byte transfers. Verified the changes by booting OpenBMC image on `gbs` machine all the way to the Linux login shell: $ qemu-system-arm -machine quanta-gbs-bmc -nographic \ -drive file=image.mtd,if=mtd,bus=0,unit=0,format=raw Fixes: b821242c7b3b ("hw/ssi: NPCM7xx Flash Interface Unit device model") Signed-off-by: Bin Meng <bin.meng@processmission.com> Tested-by: Cédric Le Goater <clg@redhat.com> Message-ID: <20260707083431.219671-6-bin.meng@processmission.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Bin Meng committed
Jul 7, 2026 at 16:34 UTC
f641d3bed2a042b4a898be8c49485f99e258a1f1
1 file changed
+8
-17
hw/ssi/npcm7xx_fiu.c
+8
-17
@@ -150,7 +150,7 @@ static uint64_t npcm7xx_fiu_flash_read(void *opaque, hwaddr addr,
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NPCM7xxFIUState *fiu = f->fiu;
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uint64_t value = 0;
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uint32_t drd_cfg;
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- int dummy_cycles;
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+ int dummy_bytes;
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int i;
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if (fiu->active_cs != -1) {
@@ -180,10 +180,8 @@ static uint64_t npcm7xx_fiu_flash_read(void *opaque, hwaddr addr,
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break;
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}
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- /* Flash chip model expects one transfer per dummy bit, not byte */
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- dummy_cycles =
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- (FIU_DRD_CFG_DBW(drd_cfg) * 8) >> FIU_DRD_CFG_ACCTYPE(drd_cfg);
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- for (i = 0; i < dummy_cycles; i++) {
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+ dummy_bytes = FIU_DRD_CFG_DBW(drd_cfg);
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+ for (i = 0; i < dummy_bytes; i++) {
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ssi_transfer(fiu->spi, 0);
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}
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@@ -305,20 +303,13 @@ static void send_address(SSIBus *spi, unsigned int addsiz, uint32_t addr)
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}
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}
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-/* Send the number of dummy bits specified in the UMA config register. */
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-static void send_dummy_bits(SSIBus *spi, uint32_t uma_cfg, uint32_t uma_cmd)
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+/* Send the number of dummy bytes specified in the UMA config register */
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+static void send_dummy_bytes(SSIBus *spi, uint32_t uma_cfg)
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{
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- unsigned int bits_per_clock = 1U << FIU_UMA_CFG_DBPCK(uma_cfg);
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unsigned int i;
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for (i = 0; i < FIU_UMA_CFG_DBSIZ(uma_cfg); i++) {
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- /* Use bytes 0 and 1 first, then keep repeating byte 2 */
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- unsigned int field = (i < 2) ? ((i + 1) * 8) : 24;
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- unsigned int j;
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-
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- for (j = 0; j < 8; j += bits_per_clock) {
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- ssi_transfer(spi, extract32(uma_cmd, field + j, bits_per_clock));
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- }
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+ ssi_transfer(spi, 0);
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}
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}
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@@ -354,8 +345,8 @@ static void npcm7xx_fiu_uma_transaction(NPCM7xxFIUState *s)
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ssi_transfer(s->spi, extract32(s->regs[reg], field, 8));
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}
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- /* Send dummy bits, if present. */
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- send_dummy_bits(s->spi, uma_cfg, s->regs[NPCM7XX_FIU_UMA_CMD]);
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+ /* Send dummy bytes, if present */
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+ send_dummy_bytes(s->spi, uma_cfg);
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/* Read data, if present. */
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for (i = 0; i < FIU_UMA_CFG_RDATSIZ(uma_cfg); i++) {