@samitouri / QOSamiQemu / commits / fc88b5f359

hw/tpm: Add TPM CRB chunking fields

- Add new fields to the CRB Interface Identifier and the CRB Control Start registers. - CRB_CTRL_START now has 2 new settings, that can be toggled using the nextChunk and crbRspRetry bits. - CapCRBChunk bit (10) was Reserved1 previously. The field is reused in this revision of the specification. Refer to section 6.4.2.2 of [1] - Add hw_compat global property called cap-chunk because the chunking feature is only supported for machine type 11.1 and higher. [1] https://trustedcomputinggroup.org/wp-content/uploads/PC-Client-Specific-Platform-TPM-Profile-for-TPM-2p0-v1p07_Pub.pdf Signed-off-by: Arun Menon <armenon@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Link: https://lore.kernel.org/qemu-devel/20260506075813.120781-2-armenon@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>

Arun Menon committed May 6, 2026 at 13:28 UTC fc88b5f3596354f6c3676636abf749f6f4a4dd02
3 files changed +11 -1
hw/core/machine.c
+1
@@ -41,6 +41,7 @@
41
42 GlobalProperty hw_compat_11_0[] = {
43 { "chardev-vc", "encoding", "cp437" },
44 + { "tpm-crb", "cap-chunk", "off" },
45 };
46 const size_t hw_compat_11_0_len = G_N_ELEMENTS(hw_compat_11_0);
47
hw/tpm/tpm_crb.c
+6
@@ -44,6 +44,8 @@ struct CRBState {
44 size_t be_buffer_size;
45
46 TPMPPI ppi;
47 +
48 + bool cap_chunk;
49 };
50 typedef struct CRBState CRBState;
51
@@ -58,6 +60,7 @@ DECLARE_INSTANCE_CHECKER(CRBState, CRB,
60 #define CRB_INTF_CAP_FIFO_NOT_SUPPORTED 0b0
61 #define CRB_INTF_CAP_CRB_SUPPORTED 0b1
62 #define CRB_INTF_IF_SELECTOR_CRB 0b1
63 +#define CRB_INTF_CAP_CRB_CHUNK 0b1
64
65 #define CRB_CTRL_CMD_SIZE (TPM_CRB_ADDR_SIZE - A_CRB_DATA_BUFFER)
66
@@ -227,6 +230,7 @@ static const VMStateDescription vmstate_tpm_crb = {
230
231 static const Property tpm_crb_properties[] = {
232 DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe),
233 + DEFINE_PROP_BOOL("cap-chunk", CRBState, cap_chunk, true),
234 };
235
236 static void tpm_crb_reset(void *dev)
@@ -258,6 +262,8 @@ static void tpm_crb_reset(void *dev)
262 CapCRB, CRB_INTF_CAP_CRB_SUPPORTED);
263 ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID,
264 InterfaceSelector, CRB_INTF_IF_SELECTOR_CRB);
265 + ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID,
266 + CapCRBChunk, s->cap_chunk ? CRB_INTF_CAP_CRB_CHUNK : 0);
267 ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID,
268 RID, 0b0000);
269 ARRAY_FIELD_DP32(s->regs, CRB_INTF_ID2,
include/hw/acpi/tpm.h
+4 -1
@@ -150,7 +150,7 @@ REG32(CRB_INTF_ID, 0x30)
150 FIELD(CRB_INTF_ID, InterfaceVersion, 4, 4)
151 FIELD(CRB_INTF_ID, CapLocality, 8, 1)
152 FIELD(CRB_INTF_ID, CapCRBIdleBypass, 9, 1)
153 - FIELD(CRB_INTF_ID, Reserved1, 10, 1)
153 + FIELD(CRB_INTF_ID, CapCRBChunk, 10, 1)
154 FIELD(CRB_INTF_ID, CapDataXferSizeSupport, 11, 2)
155 FIELD(CRB_INTF_ID, CapFIFO, 13, 1)
156 FIELD(CRB_INTF_ID, CapCRB, 14, 1)
@@ -169,6 +169,9 @@ REG32(CRB_CTRL_STS, 0x44)
169 FIELD(CRB_CTRL_STS, tpmIdle, 1, 1)
170 REG32(CRB_CTRL_CANCEL, 0x48)
171 REG32(CRB_CTRL_START, 0x4C)
172 + FIELD(CRB_CTRL_START, Start, 0, 1)
173 + FIELD(CRB_CTRL_START, crbRspRetry, 1, 1)
174 + FIELD(CRB_CTRL_START, nextChunk, 2, 1)
175 REG32(CRB_INT_ENABLED, 0x50)
176 REG32(CRB_INT_STS, 0x54)
177 REG32(CRB_CTRL_CMD_SIZE, 0x58)