disas/riscv: Tidy dec initialization in disasm_inst
Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20260812223142.349142-4-richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Richard Henderson committed
Aug 12, 2026 at 15:30 UTC
fcb7ec69d85e947b6a66b3f7891816dc53670fd5
1 file changed
+5
-4
disas/riscv.c
+5
-4
@@ -5441,10 +5441,11 @@ static void decode_inst_decompress(rv_decode *dec, rv_isa isa)
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static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst,
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const RISCVCPUConfig *cfg)
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{
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- rv_decode dec = { 0 };
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- dec.pc = pc;
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- dec.inst = inst;
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- dec.cfg = cfg;
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+ rv_decode dec = {
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+ .pc = pc,
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+ .inst = inst,
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+ .cfg = cfg,
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+ };
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static const struct {
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bool (*guard_func)(const RISCVCPUConfig *);