target/arm: Implement SVE reverse doublewords (zeroing)
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20260604234852.573178-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson committed
Jun 4, 2026 at 16:48 UTC
ff32ab1cd8c683ffd982d5abc0d0124d3b3eaaf4
3 files changed
+7
target/arm/tcg/sve.decode
+1
@@ -734,6 +734,7 @@ REVB_z 00000101 .. 1001 00 101 ... ..... ..... @rd_pg_rn
734
REVH_z 00000101 .. 1001 01 101 ... ..... ..... @rd_pg_rn
735
REVW_z 00000101 .. 1001 10 101 ... ..... ..... @rd_pg_rn
736
RBIT_z 00000101 .. 1001 11 101 ... ..... ..... @rd_pg_rn
737
+REVD_z 00000101 00 1011 10 101 ... ..... ..... @rd_pg_rn_e0
738
739
# SVE vector splice (predicated, destructive)
740
SPLICE 00000101 .. 101 100 100 ... ..... ..... @rdn_pg_rm
target/arm/tcg/sve_helper.c
+4
@@ -971,6 +971,7 @@ DO_ZPZ_D(sve_revw_d, uint64_t, wswap64)
971
void HELPER(sme_revd_q)(void *vd, void *vn, void *vg, uint32_t desc)
972
{
973
intptr_t i, opr_sz = simd_oprsz(desc) / 8;
974
+ bool zeroing = simd_data(desc) & 1;
975
uint64_t *d = vd, *n = vn;
976
uint8_t *pg = vg;
977
@@ -980,6 +981,9 @@ void HELPER(sme_revd_q)(void *vd, void *vn, void *vg, uint32_t desc)
981
uint64_t n1 = n[i + 1];
982
d[i + 0] = n1;
983
d[i + 1] = n0;
984
+ } else if (zeroing) {
985
+ d[i + 0] = 0;
986
+ d[i + 1] = 0;
987
}
988
}
989
}
target/arm/tcg/translate-sve.c
+2
@@ -3089,6 +3089,8 @@ TRANS_FEAT(REVW_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
3089
3090
TRANS_FEAT(REVD_m, aa64_sme_or_sve2p1, gen_gvec_ool_arg_zpz,
3091
gen_helper_sme_revd_q, a, 0)
3092
+TRANS_FEAT(REVD_z, aa64_sme2p2_or_sve2p2, gen_gvec_ool_arg_zpz,
3093
+ gen_helper_sme_revd_q, a, 1)
3094
3095
TRANS_FEAT(SPLICE, aa64_sme_or_sve, gen_gvec_ool_arg_zpzz,
3096
gen_helper_sve_splice, a, a->esz)