A high-throughput and memory-efficient inference and serving engine for LLMs
Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git
Synced Nov 14, 05:30 UTC
Add glm4.5v tp2,4 fp8 config on H100_80GB (#23443)
Co-authored-by: Chenxi Yang <cxyang@meta.com>
Chenxi Yang committed
Aug 22, 2025 at 19:54 UTC
308fa287a84a16ec5d81f662ca219ff5dc8929f5
2 files changed
+236
vllm/model_executor/layers/fused_moe/configs/E=128,N=352,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8.json
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+122
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+{
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+ "2": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 64,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "4": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "8": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "16": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "32": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "64": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "128": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 5
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+ },
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+ "256": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "512": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 8,
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+ "num_stages": 3
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+ },
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+ "1024": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 8,
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+ "num_stages": 3
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+ },
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+ "2048": {
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+ "BLOCK_SIZE_M": 128,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 8,
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+ "num_stages": 4
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+ },
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+ "3072": {
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+ "BLOCK_SIZE_M": 128,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 8,
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+ "num_stages": 4
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+ },
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+ "4096": {
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+ "BLOCK_SIZE_M": 128,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 8,
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+ "num_stages": 4
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+ },
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+ "8192": {
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+ "BLOCK_SIZE_M": 128,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "16384": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 32,
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+ "num_warps": 8,
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+ "num_stages": 2
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+ }
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+}
vllm/model_executor/layers/fused_moe/configs/E=128,N=704,device_name=NVIDIA_H100_80GB_HBM3,dtype=fp8_w8a8.json
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+114
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+{
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+ "2": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 64,
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+ "num_warps": 4,
8
+ "num_stages": 5
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+ },
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+ "4": {
11
+ "BLOCK_SIZE_M": 16,
12
+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2
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+ },
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+ "8": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "16": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "32": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "64": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 4
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+ },
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+ "128": {
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+ "BLOCK_SIZE_M": 16,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 256,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 8,
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+ "num_stages": 4
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+ },
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+ "256": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 64,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "512": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "1024": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 3
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+ },
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+ "2048": {
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+ "BLOCK_SIZE_M": 128,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 8,
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+ "num_stages": 3
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+ },
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+ "4096": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 128,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2
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+ },
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+ "8192": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 1,
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+ "num_warps": 4,
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+ "num_stages": 2
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+ },
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+ "16384": {
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+ "BLOCK_SIZE_M": 64,
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+ "BLOCK_SIZE_N": 256,
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+ "BLOCK_SIZE_K": 128,
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+ "GROUP_SIZE_M": 16,
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+ "num_warps": 4,
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+ "num_stages": 2
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+ }
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+}