@tduncan / Nvidia-Optimization-Stack-VLLM Mirror · read-only / commits / 5d5146eee3
Fork 0

A high-throughput and memory-efficient inference and serving engine for LLMs

Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git

Synced Nov 14, 05:30 UTC

[CI/Build] Conditionally register cutlass_fp4_group_mm to fix building on Hopper (#26138)

Signed-off-by: mgoin <mgoin64@gmail.com>

Michael Goin committed Oct 2, 2025 at 23:32 UTC 5d5146eee35a989f14de6f4203cabd77174fa1ba
2 files changed +7 -1
csrc/quantization/fp4/nvfp4_blockwise_moe_kernel.cu
+6
@@ -14,6 +14,8 @@
14 * limitations under the License.
15 */
16
17 +#include "core/registration.h"
18 +
19 #include <torch/all.h>
20 #include <cutlass/arch/arch.h>
21
@@ -418,3 +420,7 @@ void cutlass_fp4_group_mm(
420 "12.8 or above.");
421 #endif
422 }
423 +
424 +TORCH_LIBRARY_IMPL_EXPAND(TORCH_EXTENSION_NAME, CUDA, m) {
425 + m.impl("cutlass_fp4_group_mm", &cutlass_fp4_group_mm);
426 +}
csrc/torch_bindings.cpp
+1 -1
@@ -397,7 +397,7 @@ TORCH_LIBRARY_EXPAND(TORCH_EXTENSION_NAME, ops) {
397 " Tensor a_blockscale, Tensor b_blockscales, Tensor alphas,"
398 " Tensor problem_sizes, Tensor expert_offsets, Tensor sf_offsets) -> ()",
399 {stride_tag});
400 - ops.impl("cutlass_fp4_group_mm", torch::kCUDA, &cutlass_fp4_group_mm);
400 + // conditionally compiled so impl registration is in source file
401
402 // CUTLASS w8a8 GEMM, supporting symmetric per-tensor or per-row/column
403 // quantization, as well as bias