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A high-throughput and memory-efficient inference and serving engine for LLMs

Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git

Synced Nov 6, 19:15 UTC

[XPU] Support LoRA via torch.compile on XPU platform (#36962)

Signed-off-by: chzhang <chaojun.zhang@intel.com>

Chaojun Zhang committed Mar 13, 2026 at 18:34 UTC 82f836d976f37657586a749372ea9fa432a62fce
1 file changed +1 -3
vllm/platforms/xpu.py
+1 -3
@@ -167,7 +167,7 @@ class XPUPlatform(Platform):
167 cache_config.block_size = 64
168
169 # lazy import to avoid circular import
170 - from vllm.config import CompilationMode, CUDAGraphMode
170 + from vllm.config import CUDAGraphMode
171
172 compilation_config = vllm_config.compilation_config
173 if compilation_config.compile_sizes is None:
@@ -200,8 +200,6 @@ class XPUPlatform(Platform):
200 "falling back to PIECEWISE graph mode on XPU platform."
201 )
202
203 - if vllm_config.lora_config is not None:
204 - compilation_config.mode = CompilationMode.NONE
203 # check and update parallel config
204 parallel_config = vllm_config.parallel_config
205 # Only override worker_cls if it's still the default "auto"