A high-throughput and memory-efficient inference and serving engine for LLMs
[XPU] Fix FP8 block-scaled scheme selection on non-CUDA platforms (#43958)
Signed-off-by: Lai, Yejing <yejing.lai@intel.com> Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>
Yejing Lai committed
Jun 18, 2026 at 10:16 UTC
8dd8b6ed78a33dfec9edb0ff85fcd069cb7e045d
2 files changed
+2
-1
tests/quantization/test_compressed_tensors.py
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@@ -480,6 +480,7 @@ def test_compressed_tensors_fp8_block_enabled(vllm_runner):
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assert input_quant_op._forward_method in (
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input_quant_op.forward_cuda,
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input_quant_op.forward_hip,
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+ input_quant_op.forward_xpu,
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)
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llm.apply_model(check_model)
vllm/model_executor/layers/quantization/compressed_tensors/compressed_tensors.py
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-1
@@ -396,7 +396,7 @@ class CompressedTensorsConfig(QuantizationConfig):
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)
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return supported
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else:
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- return False
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+ return not match_exact
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@staticmethod
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def _is_nvfp4_format(quant_args: QuantizationArgs):