A high-throughput and memory-efficient inference and serving engine for LLMs
Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git
Synced Nov 8, 12:30 UTC
[XPU][9/N] clean up existing ipex code/doc (#34111)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Kunshang Ji committed
Feb 11, 2026 at 16:27 UTC
cb9574eb8528fca1ecd13ef4cb81cd30a643dbb9
10 files changed
+16
-50
docker/Dockerfile.cpu
-1
@@ -134,7 +134,6 @@ WORKDIR /vllm-workspace
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# Copy test requirements
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COPY requirements/test.in requirements/cpu-test.in
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-# TODO: Update to 2.9.0 when there is a new build for intel_extension_for_pytorch for that version
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RUN \
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sed -i '/mamba_ssm/d' requirements/cpu-test.in && \
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remove_packages_not_supported_on_aarch64() { \
docs/getting_started/installation/gpu.xpu.inc.md
+5
-4
@@ -6,10 +6,11 @@ vLLM initially supports basic model inference and serving on Intel GPU platform.
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# --8<-- [start:requirements]
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- Supported Hardware: Intel Data Center GPU, Intel ARC GPU
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-- OneAPI requirements: oneAPI 2025.1
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+- OneAPI requirements: oneAPI 2025.3
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+- Dependency: [vllm-xpu-kernels](https://github.com/vllm-project/vllm-xpu-kernels): a package provide all necessary vllm custom kernel when running vLLM on Intel GPU platform,
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- Python: 3.12
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!!! warning
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- The provided IPEX whl is Python3.12 specific so this version is a MUST.
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+ The provided vllm-xpu-kernels whl is Python3.12 specific so this version is a MUST.
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# --8<-- [end:requirements]
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# --8<-- [start:set-up-using-python]
@@ -24,7 +25,7 @@ Currently, there are no pre-built XPU wheels.
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# --8<-- [end:pre-built-wheels]
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# --8<-- [start:build-wheel-from-source]
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-- First, install required [driver](https://dgpu-docs.intel.com/driver/installation.html#installing-gpu-drivers) and [Intel OneAPI](https://www.intel.com/content/www/us/en/developer/tools/oneapi/base-toolkit.html) 2025.1 or later.
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+- First, install required [driver](https://dgpu-docs.intel.com/driver/installation.html#installing-gpu-drivers) and [Intel OneAPI](https://www.intel.com/content/www/us/en/developer/tools/oneapi/base-toolkit.html) 2025.3 or later.
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- Second, install Python packages for vLLM XPU backend building:
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```bash
@@ -37,7 +38,7 @@ pip install -v -r requirements/xpu.txt
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- Then, build and install vLLM XPU backend:
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```bash
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-VLLM_TARGET_DEVICE=xpu python setup.py install
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+VLLM_TARGET_DEVICE=xpu pip install --no-build-isolation -e . -v
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```
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# --8<-- [end:build-wheel-from-source]
tests/quantization/test_cpu_wna16.py
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-1
@@ -17,7 +17,7 @@ DTYPE = ["bfloat16"]
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@pytest.mark.parametrize("model", MODELS)
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@pytest.mark.parametrize("dtype", DTYPE)
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-def test_ipex_quant(vllm_runner, model, dtype):
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+def test_cpu_quant(vllm_runner, model, dtype):
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with vllm_runner(model, dtype=dtype) as llm:
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output = llm.generate_greedy(["The capital of France is"], max_tokens=32)
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assert output
tests/quantization/test_ipex_quant.py
deleted
-32
@@ -1,32 +0,0 @@
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-# SPDX-License-Identifier: Apache-2.0
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-# SPDX-FileCopyrightText: Copyright contributors to the vLLM project
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-"""Test model set-up and inference for quantized HF models supported
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-on the CPU/GPU backend using IPEX (including AWQ/GPTQ).
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-
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-Validating the configuration and printing results for manual checking.
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-
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-Run `pytest tests/quantization/test_ipex_quant.py`.
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-"""
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-
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-import pytest
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-
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-from vllm.platforms import current_platform
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-
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-MODELS = [
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- "AMead10/Llama-3.2-1B-Instruct-AWQ",
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- "shuyuej/Llama-3.2-1B-Instruct-GPTQ", # with g_idx
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-]
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-DTYPE = ["bfloat16"]
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-
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-
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-@pytest.mark.skipif(
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- not current_platform.is_cpu() and not current_platform.is_xpu(),
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- reason="only supports Intel CPU/XPU backend.",
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-)
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-@pytest.mark.parametrize("model", MODELS)
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-@pytest.mark.parametrize("dtype", DTYPE)
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-def test_ipex_quant(vllm_runner, model, dtype):
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- with vllm_runner(model, dtype=dtype, enforce_eager=True) as llm:
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- output = llm.generate_greedy(["The capital of France is"], max_tokens=4)
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- assert output
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- print(output)
vllm/_xpu_ops.py
renamed
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@@ -53,7 +53,7 @@ if hasattr(torch.ops._xpu_C, "int4_gemm_w4a16"):
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return torch.empty((M, N), dtype=input.dtype, device=input.device)
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-class ipex_ops:
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+class xpu_ops:
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@staticmethod
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def flash_attn_varlen_func(
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q: torch.Tensor,
@@ -73,7 +73,7 @@ class ipex_ops:
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cu_seqlens_k: torch.Tensor | None = None,
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# passed in qwen vl
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dropout_p: float = 0.0,
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- # The following parameters are not used in ipex kernel currently,
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+ # The following parameters are not used in xpu kernel currently,
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# we keep API compatible to CUDA's.
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scheduler_metadata=None,
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fa_version: int = 2,
@@ -153,6 +153,6 @@ class ipex_ops:
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sm_margin=0, # Can be tuned if some SMs are used for communication
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) -> None:
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logger.warning_once(
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- "get_scheduler_metadata is not implemented for ipex_ops, returning None."
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+ "get_scheduler_metadata is not implemented for xpu_ops, returning None."
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)
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return None
vllm/model_executor/layers/quantization/mxfp4.py
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-1
@@ -160,7 +160,7 @@ def get_mxfp4_backend(with_lora_support: bool) -> Mxfp4Backend:
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logger.info_once("Using Triton backend")
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return Mxfp4Backend.TRITON
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elif current_platform.is_xpu():
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- logger.info_once("Using ipex marlin backend on XPU")
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+ logger.info_once("Using xpu backend on XPU")
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return Mxfp4Backend.MARLIN
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elif current_platform.is_rocm() and has_triton_kernels():
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logger.info_once("Using Triton backend")
vllm/model_executor/layers/sparse_attn_indexer.py
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@@ -20,7 +20,7 @@ from vllm.v1.worker.workspace import current_workspace_manager
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if current_platform.is_cuda_alike():
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from vllm import _custom_ops as ops
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elif current_platform.is_xpu():
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- from vllm._ipex_ops import ipex_ops as ops
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+ from vllm._xpu_ops import xpu_ops as ops
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logger = init_logger(__name__)
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vllm/platforms/cpu.py
-1
@@ -345,7 +345,6 @@ class CpuPlatform(Platform):
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ld_preload_str += pytorch_libgomp_so
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os.environ["LD_PRELOAD"] = ld_preload_str
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- # To hint IPEX uses shared memory based AllReduce
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os.environ["LOCAL_WORLD_SIZE"] = str(
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vllm_config.parallel_config.tensor_parallel_size
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)
vllm/v1/attention/backends/fa_utils.py
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@@ -23,12 +23,11 @@ if current_platform.is_cuda():
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elif current_platform.is_xpu():
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from vllm import _custom_ops as ops
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+ from vllm._xpu_ops import xpu_ops
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reshape_and_cache_flash = ops.reshape_and_cache_flash
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- from vllm._ipex_ops import ipex_ops
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-
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- flash_attn_varlen_func = ipex_ops.flash_attn_varlen_func # type: ignore[assignment]
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- get_scheduler_metadata = ipex_ops.get_scheduler_metadata # type: ignore[assignment]
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+ flash_attn_varlen_func = xpu_ops.flash_attn_varlen_func # type: ignore[assignment]
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+ get_scheduler_metadata = xpu_ops.get_scheduler_metadata # type: ignore[assignment]
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elif current_platform.is_rocm():
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try:
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from flash_attn import flash_attn_varlen_func # type: ignore[no-redef]
@@ -153,7 +152,7 @@ def is_flash_attn_varlen_func_available() -> bool:
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Platform-specific sources:
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- CUDA: vllm.vllm_flash_attn.flash_attn_varlen_func
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- - XPU: ipex_ops.flash_attn_varlen_func
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+ - XPU: xpu_ops.flash_attn_varlen_func
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- ROCm: upstream flash_attn.flash_attn_varlen_func (if available)
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Note: This is separate from the AITER flash attention backend (rocm_aiter_fa.py)
vllm/v1/attention/ops/paged_attn.py
+1
-1
@@ -9,7 +9,7 @@ from vllm.platforms import current_platform
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if current_platform.is_cuda_alike():
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from vllm import _custom_ops as ops
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elif current_platform.is_xpu():
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- from vllm._ipex_ops import ipex_ops as ops # type: ignore[no-redef]
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+ from vllm._xpu_ops import xpu_ops as ops # type: ignore[no-redef]
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class PagedAttention: