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A high-throughput and memory-efficient inference and serving engine for LLMs

Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git

Synced Nov 4, 18:45 UTC

[XPU] disable fusion pattern support on XPU platform (#39789)

Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com> Co-authored-by: Kunshang Ji <kunshang.ji@intel.com>

Chaojun Zhang committed Apr 23, 2026 at 10:07 UTC ccaf5ffaa3e1fb2a081b2c9e403ac0e4dfc142c8
1 file changed +20
vllm/platforms/xpu.py
+20
@@ -213,6 +213,26 @@ class XPUPlatform(Platform):
213 "falling back to PIECEWISE graph mode on XPU platform."
214 )
215
216 + # Disable fusion passes not yet supported on XPU.
217 + pass_config = compilation_config.pass_config
218 + fusion_passes_to_disable = {
219 + "enable_sp": "Sequence parallelism",
220 + "fuse_gemm_comms": "Async TP",
221 + "fuse_allreduce_rms": "AllReduce + RMSNorm fusion",
222 + "fuse_norm_quant": "RMSNorm + quant fusion",
223 + "fuse_act_quant": "Activation + quant fusion",
224 + "fuse_attn_quant": "Attention + quant fusion",
225 + "fuse_act_padding": "Activation + padding fusion",
226 + "fuse_rope_kvcache": "RoPE + KV cache fusion",
227 + }
228 + for flag, feature_name in fusion_passes_to_disable.items():
229 + if getattr(pass_config, flag):
230 + logger.warning(
231 + "Feature %r is not yet supported on XPU and will be disabled.",
232 + feature_name,
233 + )
234 + setattr(pass_config, flag, False)
235 +
236 # check and update parallel config
237 parallel_config = vllm_config.parallel_config
238 # Only override worker_cls if it's still the default "auto"