A high-throughput and memory-efficient inference and serving engine for LLMs
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[XPU][Triton]add xpu config in triton_reshape_and_cache_flash (#25643)
Signed-off-by: Kunshang Ji <kunshang.ji@intel.com>
Kunshang Ji committed
Sep 25, 2025 at 20:38 UTC
d2af67441ddf5965aaebf129802a0a9d38f0e225
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vllm/attention/ops/triton_reshape_and_cache_flash.py
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@@ -137,7 +137,7 @@ def triton_reshape_and_cache_flash(
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# heuristics instead of autotuning
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TILE_SIZE = min(2048, triton.next_power_of_2(n))
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- if torch.version.hip:
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+ if torch.version.hip or torch.version.xpu:
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num_stages = 4
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num_warps = 8
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else: # cuda