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A high-throughput and memory-efficient inference and serving engine for LLMs

Mirrored from https://github.com/tduncan-lum/Nvidia-Optimization-Stack---VLLM.git

Synced Nov 7, 16:30 UTC

[Hardware][Powerpc]Enable prefix caching and chunked prefill for ppc64le (#35081)

Signed-off-by: Akash kaothalkar <akash.kaothalkar@ibm.com> Co-authored-by: Akash kaothalkar <akash.kaothalkar@ibm.com>

Akash kaothalkar committed Feb 26, 2026 at 15:51 UTC e03ddcfbd4d686c91f6509c5451546437bbbf3e5
1 file changed +5 -6
vllm/engine/arg_utils.py
+5 -6
@@ -2076,20 +2076,19 @@ class EngineArgs:
2076 )
2077
2078 # Disable chunked prefill and prefix caching for:
2079 - # POWER (ppc64le)/RISCV CPUs in V1
2079 + # RISCV CPUs in V1
2080 if current_platform.is_cpu() and current_platform.get_cpu_architecture() in (
2081 - CpuArchEnum.POWERPC,
2081 CpuArchEnum.RISCV,
2082 ):
2083 logger.info(
2085 - "Chunked prefill is not supported for POWER, "
2086 - "and RISC-V CPUs; "
2084 + "Chunked prefill is not supported for"
2085 + "RISC-V CPUs; "
2086 "disabling it for V1 backend."
2087 )
2088 self.enable_chunked_prefill = False
2089 logger.info(
2091 - "Prefix caching is not supported for POWER, "
2092 - "and RISC-V CPUs; "
2090 + "Prefix caching is not supported for "
2091 + "RISC-V CPUs; "
2092 "disabling it for V1 backend."
2093 )
2094 self.enable_prefix_caching = False