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export interface ManualChapter { |
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id: string; |
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chapterNumber: number; |
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title: string; |
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subtitle: string; |
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paragraphs: string[]; |
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steps?: { |
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stepLabel: string; |
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action: string; |
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details: string; |
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caution?: string; |
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verification?: string; |
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}[]; |
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} |
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export interface VoltageRailSpec { |
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rail: string; |
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voltage: string; |
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tolerance: string; |
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location: string; |
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normalImpedance: string; |
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description: string; |
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} |
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export interface FastenerTorqueSpec { |
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location: string; |
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screwType: string; |
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size: string; |
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torque: string; |
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threadLock: string; |
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} |
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export interface TechnicalManual { |
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id: string; |
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category: "hardware" | "software" | "cleaning" | "upgrades"; |
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title: string; |
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code: string; |
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fileSize: string; |
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pages: number; |
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author: string; |
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lastUpdated: string; |
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summary: string; |
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keyTopics: string[]; |
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safetyDirectives: string[]; |
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recommendedTools: string[]; |
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chapters?: ManualChapter[]; |
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voltageRails?: VoltageRailSpec[]; |
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fastenerTorqueTable?: FastenerTorqueSpec[]; |
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} |
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export const TECHNICAL_MANUALS: TechnicalManual[] = [ |
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// 1. HARDWARE MANUAL 1: Universal Laptop Teardown & Torque Spec |
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53
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{ |
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id: "man-hw-01", |
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55
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category: "hardware", |
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56
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title: "Universal Laptop Teardown & Screw Torque Specification Manual", |
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57
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code: "DOC-HW-TEARDOWN-2026", |
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58
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fileSize: "3.4 MB PDF", |
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59
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pages: 42, |
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60
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author: "JCR Bench Engineering Group", |
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61
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lastUpdated: "2026 Revision 4.2", |
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62
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summary: "Standard chassis screw torque limits, eDP ribbon connector zero-insertion-force (ZIF) latch protocols, and magnesium frame unibody separation techniques.", |
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63
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keyTopics: [ |
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64
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"Thread engagement limits for M2/M2.5 chassis standoffs", |
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65
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"eDP 30-pin and 40-pin ribbon cable pinout safety", |
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66
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"Trackpad grounding tape and haptic sensor calibration", |
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67
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"Antenna routing channels and RF isolation shields" |
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68
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], |
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safetyDirectives: [ |
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"Always disconnect battery power harness before lifting motherboard", |
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71
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"Maintain grounded ESD wrist strap under 1 megohm resistance", |
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72
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"Never reuse stripped Torx screws on hinge anchors" |
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73
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], |
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recommendedTools: ["Torx T4/T5/T6", "Phillips #00", "Plastic Spudger Kit", "Torque Screwdriver (0.2-0.5 Nm)"], |
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fastenerTorqueTable: [ |
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{ location: "Bottom Cover Perimeter (Magnesium / Aluminum)", screwType: "Torx T5", size: "M2.0 x 3.5mm", torque: "0.20 - 0.25 Nm", threadLock: "Blue Loctite 242 (Low)" }, |
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77
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{ location: "Display Hinge Anchor Brackets into Palmrest Standoffs", screwType: "Phillips #00", size: "M2.5 x 5.0mm", torque: "0.45 - 0.50 Nm", threadLock: "Pre-applied Nylon patch" }, |
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78
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{ location: "CPU/GPU Heatsink Spring-Loaded Captive Screws (X-Pattern)", screwType: "Phillips #00", size: "M2.0 x 3.0mm Captive", torque: "0.25 Nm (Stop at thread bottom)", threadLock: "None" }, |
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79
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{ location: "NVMe M.2 2280 Standoff Retainer", screwType: "Phillips #0", size: "M2.0 x 2.5mm Flat Head", torque: "0.15 Nm", threadLock: "None" }, |
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80
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{ location: "Internal Battery Perimeter Screws", screwType: "Phillips #00", size: "M2.0 x 4.0mm Waist", torque: "0.18 - 0.20 Nm", threadLock: "None" }, |
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81
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{ location: "Motherboard Logic Board Retaining Screws", screwType: "Phillips #00", size: "M2.0 x 3.0mm Silver", torque: "0.20 Nm", threadLock: "None" } |
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82
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], |
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83
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voltageRails: [ |
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84
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{ rail: "+19V_DCIN / +20V_USB_PD", voltage: "19.5V - 20.0V", tolerance: "±5%", location: "DC-In Jack / Dual Input MOSFETs", normalImpedance: "> 100 kΩ", description: "Primary unregulated DC supply directly after power brick/USB-C negotiation." }, |
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85
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{ rail: "+3.3V_ALW (Always-On)", voltage: "3.32V", tolerance: "±2%", location: "Coil PL301 near TPS51285", normalImpedance: "> 15 kΩ", description: "Powers Super I/O EC controller, power button circuit, and BIOS flash chip." }, |
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86
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{ rail: "+5.0V_ALW (Always-On)", voltage: "5.05V", tolerance: "±2%", location: "Coil PL302", normalImpedance: "> 20 kΩ", description: "Powers USB 5V VBUS switches and audio codec standby circuits." }, |
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87
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{ rail: "+1.8V_PRIM / +1.8V_AUX", voltage: "1.80V", tolerance: "±3%", location: "Coil PL501 near PCH", normalImpedance: "> 800 Ω", description: "Low-voltage system I/O, SPI BIOS ROM buffer, and PCH clock rails." } |
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88
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], |
|
89
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chapters: [ |
|
90
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{ |
|
91
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id: "ch-1", |
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92
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chapterNumber: 1, |
|
93
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title: "Chassis Fastener Management & Torque Standards", |
|
94
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subtitle: "Preventing stripped threads and stripped plastic boss standoffs", |
|
95
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paragraphs: [ |
|
96
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"Modern ultrabooks utilize CNC-milled aluminum or injection-molded magnesium alloy shells with pressed-in brass knurled inserts. Exceeding 0.35 Nm of torque on M2.0 chassis screws will instantly fracture the polycarbonate boss surrounding the brass insert.", |
|
97
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"Always organize fasteners using a magnetized magnetic project grid partitioned into A1-D4 quadrants matching the perimeter layout of the underside." |
|
98
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], |
|
99
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steps: [ |
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100
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{ stepLabel: "1.1", action: "Perimeter Loosening", details: "Loosen all perimeter fasteners in an outside-in counterclockwise sequence before fully removing any individual screw to equalize internal chassis clip tension." }, |
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101
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{ stepLabel: "1.2", action: "Prying Tool Engagement", details: "Insert a POM plastic pry blade at the rear vent seam. Never pry from the front audio jack or thin speaker grille openings." } |
|
102
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] |
|
103
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}, |
|
104
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{ |
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105
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id: "ch-2", |
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106
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chapterNumber: 2, |
|
107
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title: "ZIF and eDP Micro-Connector Handling", |
|
108
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subtitle: "Zero-Insertion-Force ribbon latches and high-speed display flex cables", |
|
109
|
paragraphs: [ |
|
110
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"Zero-Insertion-Force (ZIF) connectors utilize a pivoting plastic locking lever. Never yank the ribbon cable while the actuator flap is in the locked down position.", |
|
111
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"eDP 40-pin connectors carry both 3.3V logic signaling and high-voltage 19V backlight power (BL_PWR). Pulling the connector at an angle can cause the 19V pin to bridge to an adjacent 3.3V data line, immediately blowing the SOC GPU display controller." |
|
112
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] |
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113
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} |
|
114
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] |
|
115
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}, |
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116
|
|
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117
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// 2. HARDWARE MANUAL 2: Motherboard Power Delivery & VRM |
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118
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{ |
|
119
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id: "man-hw-02", |
|
120
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category: "hardware", |
|
121
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title: "Motherboard Power Delivery & DC-In VRM Diagnostic Schematic", |
|
122
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code: "SCHEM-HW-PWR-VRM", |
|
123
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fileSize: "4.8 MB PDF", |
|
124
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pages: 28, |
|
125
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author: "JCR Micro-soldering Team", |
|
126
|
lastUpdated: "2026 Revision 2.0", |
|
127
|
summary: "Detailed 19V / 20V USB-C Power Delivery handshake verification, 3.3V/5V always-on buck converter testing, and MOSFET short detection.", |
|
128
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keyTopics: [ |
|
129
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"USB-C Power Delivery CC1/CC2 communication triggers", |
|
130
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"High-side and low-side switching MOSFET gate measurements", |
|
131
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"Thermal camera hot-spot analysis for shorted SMD capacitors", |
|
132
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"RTC battery discharge circuits and CMOS reset sequences" |
|
133
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], |
|
134
|
safetyDirectives: [ |
|
135
|
"Use current-limited DC bench power supply when injecting 1V into shorted rails", |
|
136
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"Do not bypass thermal fuses or PPTC resettable fuses" |
|
137
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], |
|
138
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recommendedTools: ["Digital Multimeter (True RMS)", "DC Bench Power Supply", "Thermal Camera", "Hot Air Rework Station"], |
|
139
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voltageRails: [ |
|
140
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{ rail: "+19V_DCIN / +20V_USB_PD", voltage: "19.5V - 20.0V", tolerance: "±5%", location: "DC-In Jack / Dual Input MOSFETs", normalImpedance: "> 100 kΩ", description: "Primary unregulated DC supply directly after power brick/USB-C negotiation." }, |
|
141
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{ rail: "+3.3V_ALW (Always-On)", voltage: "3.32V", tolerance: "±2%", location: "Coil PL301 near TPS51285", normalImpedance: "> 15 kΩ", description: "Powers Super I/O EC controller, power button circuit, and BIOS flash chip." }, |
|
142
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{ rail: "+5.0V_ALW (Always-On)", voltage: "5.05V", tolerance: "±2%", location: "Coil PL302", normalImpedance: "> 20 kΩ", description: "Powers USB 5V VBUS switches and audio codec standby circuits." }, |
|
143
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{ rail: "+1.05V_VCCST / VCCSA", voltage: "1.05V", tolerance: "±2%", location: "Coil PL701 near CPU Socket", normalImpedance: "15 - 45 Ω", description: "System Agent and sustained CPU boot sequence rail." }, |
|
144
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{ rail: "+VCORE (CPU Core)", voltage: "0.75V - 1.35V Dynamic", tolerance: "±1.5%", location: "Multi-phase inductors surrounding CPU", normalImpedance: "1.2 - 8.5 Ω (Low normal)", description: "Dynamic VCORE supplied by PWM controller via high-speed DrMOS power stages." }, |
|
145
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{ rail: "+V_GFX (Integrated GPU)", voltage: "0.80V - 1.15V Dynamic", tolerance: "±2%", location: "PL901 / PL902", normalImpedance: "3.0 - 12.0 Ω", description: "Supplies integrated display rendering core." }, |
|
146
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{ rail: "+1.2V / +1.1V DDR (RAM)", voltage: "1.10V (DDR5) / 1.20V (DDR4)", tolerance: "±2%", location: "Coil PL401 near SO-DIMM", normalImpedance: "80 - 250 Ω", description: "Main memory module supply rail." } |
|
147
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], |
|
148
|
chapters: [ |
|
149
|
{ |
|
150
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id: "vrm-1", |
|
151
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chapterNumber: 1, |
|
152
|
title: "Power-On Sequence & S0/S3/S5 State Transitions", |
|
153
|
subtitle: "Tracing standby rails from DC plug insertion to CPU_PWRGD", |
|
154
|
paragraphs: [ |
|
155
|
"When DC power is connected, the Embedded Controller (EC) boots first from +3.3V_ALW. It verifies the AC_PRESENT signal and waits for the power button pulse (NBSWON#) to drop low for at least 150ms.", |
|
156
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"Upon button release, EC asserts PM_SLP_S5# and PM_SLP_S3# to enable main VRM converters in sequential order: +1.8V -> DDR -> VCCSA -> VCORE." |
|
157
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] |
|
158
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} |
|
159
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] |
|
160
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}, |
|
161
|
|
|
162
|
// 3. SOFTWARE MANUAL 1: BSOD & Kernel Minidump Manual |
|
163
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{ |
|
164
|
id: "man-sw-01", |
|
165
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category: "software", |
|
166
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title: "Windows Kernel Minidump & BSOD Stop-Code Resolution Manual", |
|
167
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code: "MAN-SW-BSOD-WIN11", |
|
168
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fileSize: "2.8 MB PDF", |
|
169
|
pages: 36, |
|
170
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author: "JCR OS Systems Architecture", |
|
171
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lastUpdated: "2026 Revision 3.1", |
|
172
|
summary: "Systematic resolution for WHEA_UNCORRECTABLE_ERROR, CRITICAL_PROCESS_DIED, IRQL_NOT_LESS_OR_EQUAL, and DPC_WATCHDOG_VIOLATION.", |
|
173
|
keyTopics: [ |
|
174
|
"WinDbg Preview symbol path setup and '!analyze -v' stack triage", |
|
175
|
"PCIe AER (Advanced Error Reporting) WHEA bus crash diagnosis", |
|
176
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"Kernel memory dump conversion and pagefile corruption fix", |
|
177
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"DISM /RestoreHealth and SFC /scannow CBS.log triage" |
|
178
|
], |
|
179
|
safetyDirectives: [ |
|
180
|
"Always backup BitLocker recovery keys prior to BCD and EFI partition repairs", |
|
181
|
"Never disable driver signature verification in production environments" |
|
182
|
], |
|
183
|
recommendedTools: ["WinDbg Preview", "BluescreenView", "Driver Verifier (verifier.exe)", "DISM / SFC CLI"], |
|
184
|
chapters: [ |
|
185
|
{ |
|
186
|
id: "bsod-1", |
|
187
|
chapterNumber: 1, |
|
188
|
title: "WinDbg Kernel Minidump Triage Protocol", |
|
189
|
subtitle: "Configuring Microsoft Symbol Server and deciphering exception codes", |
|
190
|
paragraphs: [ |
|
191
|
"Copy minidump files from C:\\Windows\\Minidump to a local scratch folder. Open WinDbg as Administrator and execute '!analyze -v'. Look for FAILURE_BUCKET_ID and MODULE_NAME.", |
|
192
|
"If the offending module is ntoskrnl.exe or hal.dll, examine the Arg1 memory pointer: 0x00000000 indicates a null pointer dereference, while 0xFFFFF80... indicates a kernel driver address space crash." |
|
193
|
] |
|
194
|
} |
|
195
|
] |
|
196
|
}, |
|
197
|
|
|
198
|
// 4. SOFTWARE MANUAL 2: UEFI Firmware Recovery Manual |
|
199
|
{ |
|
200
|
id: "man-sw-02", |
|
201
|
category: "software", |
|
202
|
title: "Blind UEFI/BIOS Crisis Recovery & SPI Flashing Guide", |
|
203
|
code: "MAN-SW-UEFI-CRISIS", |
|
204
|
fileSize: "3.1 MB PDF", |
|
205
|
pages: 24, |
|
206
|
author: "JCR Firmware Security Lab", |
|
207
|
lastUpdated: "2026 Revision 2.5", |
|
208
|
summary: "Crisis key combinations (Fn+R, Win+B, Fn+Esc), FAT32 USB crisis file naming conventions, and external CH341A 3.3V/1.8V SPI clip programming.", |
|
209
|
keyTopics: [ |
|
210
|
"Dell / HP / Lenovo blind USB flash rescue trigger combinations", |
|
211
|
"Extracting HDR/CAP/ROM images from OEM executable installers", |
|
212
|
"CH341A SPI hardware flashing with NeoProgrammer / Flashrom", |
|
213
|
"Clearing Intel ME (Management Engine) region for clean PCH initialization" |
|
214
|
], |
|
215
|
safetyDirectives: [ |
|
216
|
"Ensure CH341A programmer jumper is set to 3.3V or 1.8V (never supply 5V to SPI ROM)", |
|
217
|
"Always take 2 identical SPI dumps and MD5 hash verify before writing" |
|
218
|
], |
|
219
|
recommendedTools: ["CH341A SPI Programmer", "SOIC8 Test Clip", "NeoProgrammer 2.2", "FAT32 8GB USB Flash Drive"], |
|
220
|
chapters: [ |
|
221
|
{ |
|
222
|
id: "uefi-1", |
|
223
|
chapterNumber: 1, |
|
224
|
title: "OEM Blind Crisis Flash Triggers", |
|
225
|
subtitle: "Key combinations to force boot-block crisis mode", |
|
226
|
paragraphs: [ |
|
227
|
"HP: Power OFF -> Hold Win + B (or Win + V) -> Hold Power for 3 seconds -> Release Power but keep Win + B held for 15 seconds.", |
|
228
|
"Dell: Unplug AC -> Hold Ctrl + Esc -> Plug in AC -> Release keys when power LED blinks 3 amber 3 white.", |
|
229
|
"Lenovo ThinkPad: Unplug AC and Battery -> Hold Fn + R -> Plug in AC -> Press Power once." |
|
230
|
] |
|
231
|
} |
|
232
|
] |
|
233
|
}, |
|
234
|
|
|
235
|
// 5. CLEANING MANUAL 1: Cleanroom Laptop Decontamination |
|
236
|
{ |
|
237
|
id: "man-cl-01", |
|
238
|
category: "cleaning", |
|
239
|
title: "Cleanroom Laptop Decontamination & Ultrasonic Board Cleaning Protocol", |
|
240
|
code: "SOP-CL-CLEAN-2026", |
|
241
|
fileSize: "2.1 MB PDF", |
|
242
|
pages: 18, |
|
243
|
author: "JCR Environmental & Cleanroom Ops", |
|
244
|
lastUpdated: "2026 Revision 1.9", |
|
245
|
summary: "Isolating liquid ingress corrosion, ultrasonic bath temperature / chemistry parameters, and 99.9% anhydrous isopropyl alcohol dehydration.", |
|
246
|
keyTopics: [ |
|
247
|
"Electrochemical migration (dendrite growth) under BGA balls", |
|
248
|
"Ultrasonic tank frequency (40kHz vs 80kHz) and Branson EC chemistry", |
|
249
|
"Baking board in convection oven at 65°C for 4 hours post-wash", |
|
250
|
"Replacing corroded 0402 SMD passives and tinning oxidized pads" |
|
251
|
], |
|
252
|
safetyDirectives: [ |
|
253
|
"Never immerse microphones, speakers, cameras, or touchpad click mechanisms in ultrasonic bath", |
|
254
|
"Operate isopropyl alcohol baths in a well-ventilated fume extraction enclosure" |
|
255
|
], |
|
256
|
recommendedTools: ["Digital Heated Ultrasonic Cleaner", "99.9% Isopropyl Alcohol", "Anti-static Soft ESD Brushes", "PCB Preheater / Drying Oven"], |
|
257
|
chapters: [ |
|
258
|
{ |
|
259
|
id: "clean-1", |
|
260
|
chapterNumber: 1, |
|
261
|
title: "Liquid Damage Triage & Ultrasonic Cycle", |
|
262
|
subtitle: "Step-by-step chemical neutralization of sugar, salt, and acidic corrosion", |
|
263
|
paragraphs: [ |
|
264
|
"Liquid spills cause galvanic corrosion when power is applied. First, photograph all component markings.", |
|
265
|
"Submerge stripped motherboard in ultrasonic bath containing 90% distilled water + 10% Branson EC cleaner at 50°C for 8 minutes. Rinse with pure distilled water, then flush with 99.9% IPA to absorb moisture, and bake at 65°C for 4 hours." |
|
266
|
] |
|
267
|
} |
|
268
|
] |
|
269
|
}, |
|
270
|
|
|
271
|
// 6. CLEANING MANUAL 2: Thermal Interface & Vapor Chamber |
|
272
|
{ |
|
273
|
id: "man-cl-02", |
|
274
|
category: "cleaning", |
|
275
|
title: "Thermal Interface Material & Phase-Change (PTM7950) Application Standard", |
|
276
|
code: "STD-CL-THERMAL-2026", |
|
277
|
fileSize: "2.6 MB PDF", |
|
278
|
pages: 22, |
|
279
|
author: "JCR Thermal Engineering Lab", |
|
280
|
lastUpdated: "2026 Revision 3.0", |
|
281
|
summary: "Surface flatness measurement, Honeywell PTM7950 phase-change pad application, thermal putty (Upsiren U6 Pro) gap fill, and heatsink mounting tension.", |
|
282
|
keyTopics: [ |
|
283
|
"Comparing standard paste vs Liquid Metal vs PTM7950 phase-change pad", |
|
284
|
"Preventing pump-out effect on direct-die bare silicon laptop CPUs", |
|
285
|
"Thermal putty viscosity and compression for VRAM / VRM chokes", |
|
286
|
"Delta T thermal dissipation benchmarks under Prime95 + FurMark" |
|
287
|
], |
|
288
|
safetyDirectives: [ |
|
289
|
"If using Liquid Metal (Galinstan), apply Conformal Coating (MG Chemicals 422C) and high-density foam barrier around SMD capacitors", |
|
290
|
"Never scrape bare copper coldplates with steel razor blades" |
|
291
|
], |
|
292
|
recommendedTools: ["Honeywell PTM7950 (0.25mm)", "Upsiren U6 Pro Thermal Putty", "ArctiClean 1 & 2 Emulsifier", "Torque Driver (0.25 Nm)"], |
|
293
|
chapters: [ |
|
294
|
{ |
|
295
|
id: "therm-1", |
|
296
|
chapterNumber: 1, |
|
297
|
title: "PTM7950 Application Protocol", |
|
298
|
subtitle: "Eliminating pump-out effect on direct-die gaming laptops", |
|
299
|
paragraphs: [ |
|
300
|
"Honeywell PTM7950 is solid below 45°C and transitions into a viscous gel at operating temperatures, filling micro-voids without pumping out over thermal cycles.", |
|
301
|
"Chill the PTM7950 sheet in a refrigerator for 5 minutes before cutting to silicon die dimensions. Peel back one protective plastic film, apply to silicon, rub lightly with finger, then peel top film before mounting heatsink." |
|
302
|
] |
|
303
|
} |
|
304
|
] |
|
305
|
}, |
|
306
|
|
|
307
|
// 7. UPGRADES MANUAL 1: NVMe & PCIe Gen 5 Storage Retrofit |
|
308
|
{ |
|
309
|
id: "man-up-01", |
|
310
|
category: "upgrades", |
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311
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title: "High-Performance NVMe PCIe 4.0/5.0 SSD Retrofitting & Migration Guide", |
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312
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code: "GDE-UP-NVME-2026", |
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313
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fileSize: "3.7 MB PDF", |
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314
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pages: 30, |
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315
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author: "JCR Storage Solutions Group", |
|
316
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lastUpdated: "2026 Revision 2.8", |
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317
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summary: "Single-sided vs double-sided 2280 compatibility, thermal pad thickness matching, cloning boot drives with Macrium / Clonezilla, and 4K sector alignment.", |
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318
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keyTopics: [ |
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319
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"Checking M.2 slot lane bifurcation (x2 vs x4 PCIe lanes)", |
|
320
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"Bare-metal cloning sector-by-sector vs intelligent file copy", |
|
321
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"Fixing INACCESSIBLE_BOOT_DEVICE post-NVMe migration", |
|
322
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"Enabling TRIM and Host Memory Buffer (HMB) in Windows & Linux" |
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323
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], |
|
324
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safetyDirectives: [ |
|
325
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"Ensure laptop battery is disconnected prior to inserting NVMe into M.2 key slot", |
|
326
|
"Do not compress thick 1.5mm thermal pads onto thin 0.5mm clearance laptops" |
|
327
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], |
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328
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recommendedTools: ["Macrium Reflect / Clonezilla Bootable USB", "M.2 NVMe USB-C Enclosure", "Kaisi Thermal Pad Assortment (0.5mm - 1.5mm)"], |
|
329
|
chapters: [ |
|
330
|
{ |
|
331
|
id: "nvme-1", |
|
332
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chapterNumber: 1, |
|
333
|
title: "Drive Migration & Sector Realignment", |
|
334
|
subtitle: "Zero-downtime OS migration without re-installing Windows", |
|
335
|
paragraphs: [ |
|
336
|
"Connect replacement NVMe SSD via USB 3.2 Gen 2 enclosure. Launch Macrium Reflect, select source OS drive, and click 'Clone this disk'.", |
|
337
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"Ensure partitions are proportionally resized to occupy full replacement capacity. Ensure EFI System Partition (ESP) remains at 100-260MB and 4K sector alignment is checked." |
|
338
|
] |
|
339
|
} |
|
340
|
] |
|
341
|
}, |
|
342
|
|
|
343
|
// 8. UPGRADES MANUAL 2: High-Density DDR5 & SO-DIMM Architecture |
|
344
|
{ |
|
345
|
id: "man-up-02", |
|
346
|
category: "upgrades", |
|
347
|
title: "High-Density DDR5/LPDDR5 Memory Architecture & Retrofit Guide", |
|
348
|
code: "GDE-UP-RAM-DDR5", |
|
349
|
fileSize: "2.4 MB PDF", |
|
350
|
pages: 20, |
|
351
|
author: "JCR Memory Testing Laboratory", |
|
352
|
lastUpdated: "2026 Revision 1.5", |
|
353
|
summary: "1Rx8 vs 1Rx16 sub-channel ranks, on-die ECC functionality, SPD profile flashing, and memory training POST delays on Intel 13th/14th Gen & AMD 7000/8000.", |
|
354
|
keyTopics: [ |
|
355
|
"Understanding DDR5 dual 32-bit subchannels per channel", |
|
356
|
"Recognizing normal 2-3 minute first-boot Memory Training behavior", |
|
357
|
"SO-DIMM latch tension and copper EMI shield re-installation", |
|
358
|
"MemTest86 4-pass zero-error verification standard" |
|
359
|
], |
|
360
|
safetyDirectives: [ |
|
361
|
"Allow laptop to sit with power disconnected for 60 seconds to drain PMIC capacitors on DDR5 modules", |
|
362
|
"Never touch gold fingers directly to avoid skin oil oxidation" |
|
363
|
], |
|
364
|
recommendedTools: ["MemTest86 Pro USB", "Plastic Pry Pick", "Kapton Tape", "Anti-Static Wrist Strap"], |
|
365
|
chapters: [ |
|
366
|
{ |
|
367
|
id: "ram-1", |
|
368
|
chapterNumber: 1, |
|
369
|
title: "DDR5 Memory Training & First Boot Protocol", |
|
370
|
subtitle: "Why the screen stays black for 120 seconds after installing new RAM", |
|
371
|
paragraphs: [ |
|
372
|
"DDR5 features an onboard Power Management IC (PMIC) and executes internal signal calibration (Memory Training) on first power-on with new DIMMs.", |
|
373
|
"The power LED may pulse for up to 180 seconds while the BIOS tests sub-timings. Do NOT power cycle the machine during this phase, or you risk corrupting the BIOS NVRAM." |
|
374
|
] |
|
375
|
} |
|
376
|
] |
|
377
|
} |
|
378
|
]; |
|
379
|
|
|
380
|
export function getManualById(id: string): TechnicalManual | undefined { |
|
381
|
return TECHNICAL_MANUALS.find(m => m.id === id); |
|
382
|
} |
|
383
|
|
|
384
|
export function getManualsByCategory(category: string): TechnicalManual[] { |
|
385
|
return TECHNICAL_MANUALS.filter(m => m.category === category); |
|
386
|
} |