| 1 | /* |
| 2 | * Internal memory barrier helpers for QEMU (target agnostic) |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * SPDX-License-Identifier: LGPL-2.1-or-later |
| 7 | */ |
| 8 | |
| 9 | #ifndef ACCEL_TCG_BACKEND_LDST_H |
| 10 | #define ACCEL_TCG_BACKEND_LDST_H |
| 11 | |
| 12 | #include "tcg-target-mo.h" |
| 13 | |
| 14 | /** |
| 15 | * tcg_req_mo: |
| 16 | * @guest_mo: Guest default memory order |
| 17 | * @type: TCGBar |
| 18 | * |
| 19 | * Filter @type to the barrier that is required for the guest |
| 20 | * memory ordering vs the host memory ordering. A non-zero |
| 21 | * result indicates that some barrier is required. |
| 22 | */ |
| 23 | #define tcg_req_mo(guest_mo, type) \ |
| 24 | ((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO) |
| 25 | |
| 26 | /** |
| 27 | * cpu_req_mo: |
| 28 | * @cpu: CPUState |
| 29 | * @type: TCGBar |
| 30 | * |
| 31 | * If tcg_req_mo indicates a barrier for @type is required |
| 32 | * for the guest memory model, issue a host memory barrier. |
| 33 | */ |
| 34 | #define cpu_req_mo(cpu, type) \ |
| 35 | do { \ |
| 36 | if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \ |
| 37 | smp_mb(); \ |
| 38 | } \ |
| 39 | } while (0) |
| 40 | |
| 41 | #endif |