| 1 | /* |
| 2 | * User emulator execution |
| 3 | * |
| 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2.1 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | #include "qemu/osdep.h" |
| 20 | #include "accel/tcg/cpu-ops.h" |
| 21 | #include "disas/disas.h" |
| 22 | #include "exec/vaddr.h" |
| 23 | #include "exec/tlb-flags.h" |
| 24 | #include "tcg/tcg.h" |
| 25 | #include "qemu/bitops.h" |
| 26 | #include "qemu/rcu.h" |
| 27 | #include "accel/tcg/cpu-ldst-common.h" |
| 28 | #include "accel/tcg/cpu-loop.h" |
| 29 | #include "accel/tcg/helper-retaddr.h" |
| 30 | #include "accel/tcg/probe.h" |
| 31 | #include "user/cpu_loop.h" |
| 32 | #include "user/guest-host.h" |
| 33 | #include "qemu/main-loop.h" |
| 34 | #include "user/page-protection.h" |
| 35 | #include "exec/page-protection.h" |
| 36 | #include "exec/helper-proto-common.h" |
| 37 | #include "qemu/atomic128.h" |
| 38 | #include "qemu/bswap.h" |
| 39 | #include "qemu/int128.h" |
| 40 | #include "trace.h" |
| 41 | #include "tcg/tcg-ldst.h" |
| 42 | #include "tcg-accel-ops.h" |
| 43 | #include "backend-ldst.h" |
| 44 | #include "internal-common.h" |
| 45 | #include "tb-internal.h" |
| 46 | |
| 47 | __thread uintptr_t helper_retaddr; |
| 48 | |
| 49 | //#define DEBUG_SIGNAL |
| 50 | |
| 51 | void qemu_cpu_kick(CPUState *cpu) |
| 52 | { |
| 53 | tcg_kick_vcpu_thread(cpu); |
| 54 | } |
| 55 | |
| 56 | void qemu_process_cpu_events(CPUState *cpu) |
| 57 | { |
| 58 | qatomic_set(&cpu->exit_request, false); |
| 59 | process_queued_cpu_work(cpu); |
| 60 | } |
| 61 | |
| 62 | /* |
| 63 | * Adjust the pc to pass to cpu_restore_state; return the memop type. |
| 64 | */ |
| 65 | MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) |
| 66 | { |
| 67 | switch (helper_retaddr) { |
| 68 | default: |
| 69 | /* |
| 70 | * Fault during host memory operation within a helper function. |
| 71 | * The helper's host return address, saved here, gives us a |
| 72 | * pointer into the generated code that will unwind to the |
| 73 | * correct guest pc. |
| 74 | */ |
| 75 | *pc = helper_retaddr; |
| 76 | break; |
| 77 | |
| 78 | case 0: |
| 79 | /* |
| 80 | * Fault during host memory operation within generated code. |
| 81 | * (Or, a unrelated bug within qemu, but we can't tell from here). |
| 82 | * |
| 83 | * We take the host pc from the signal frame. However, we cannot |
| 84 | * use that value directly. Within cpu_restore_state_from_tb, we |
| 85 | * assume PC comes from GETPC(), as used by the helper functions, |
| 86 | * so we adjust the address by -GETPC_ADJ to form an address that |
| 87 | * is within the call insn, so that the address does not accidentally |
| 88 | * match the beginning of the next guest insn. However, when the |
| 89 | * pc comes from the signal frame it points to the actual faulting |
| 90 | * host memory insn and not the return from a call insn. |
| 91 | * |
| 92 | * Therefore, adjust to compensate for what will be done later |
| 93 | * by cpu_restore_state_from_tb. |
| 94 | */ |
| 95 | *pc += GETPC_ADJ; |
| 96 | break; |
| 97 | |
| 98 | case 1: |
| 99 | /* |
| 100 | * Fault during host read for translation, or loosely, "execution". |
| 101 | * |
| 102 | * The guest pc is already pointing to the start of the TB for which |
| 103 | * code is being generated. If the guest translator manages the |
| 104 | * page crossings correctly, this is exactly the correct address |
| 105 | * (and if the translator doesn't handle page boundaries correctly |
| 106 | * there's little we can do about that here). Therefore, do not |
| 107 | * trigger the unwinder. |
| 108 | */ |
| 109 | *pc = 0; |
| 110 | return MMU_INST_FETCH; |
| 111 | } |
| 112 | |
| 113 | return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; |
| 114 | } |
| 115 | |
| 116 | /** |
| 117 | * handle_sigsegv_accerr_write: |
| 118 | * @cpu: the cpu context |
| 119 | * @old_set: the sigset_t from the signal ucontext_t |
| 120 | * @host_pc: the host pc, adjusted for the signal |
| 121 | * @guest_addr: the guest address of the fault |
| 122 | * |
| 123 | * Return true if the write fault has been handled, and should be re-tried. |
| 124 | * |
| 125 | * Note that it is important that we don't call page_unprotect() unless |
| 126 | * this is really a "write to nonwritable page" fault, because |
| 127 | * page_unprotect() assumes that if it is called for an access to |
| 128 | * a page that's writable this means we had two threads racing and |
| 129 | * another thread got there first and already made the page writable; |
| 130 | * so we will retry the access. If we were to call page_unprotect() |
| 131 | * for some other kind of fault that should really be passed to the |
| 132 | * guest, we'd end up in an infinite loop of retrying the faulting access. |
| 133 | */ |
| 134 | bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set, |
| 135 | uintptr_t host_pc, vaddr guest_addr) |
| 136 | { |
| 137 | switch (page_unprotect(cpu, guest_addr, host_pc)) { |
| 138 | case 0: |
| 139 | /* |
| 140 | * Fault not caused by a page marked unwritable to protect |
| 141 | * cached translations, must be the guest binary's problem. |
| 142 | */ |
| 143 | return false; |
| 144 | case 1: |
| 145 | /* |
| 146 | * Fault caused by protection of cached translation; TBs |
| 147 | * invalidated, so resume execution. |
| 148 | */ |
| 149 | return true; |
| 150 | case 2: |
| 151 | /* |
| 152 | * Fault caused by protection of cached translation, and the |
| 153 | * currently executing TB was modified and must be exited immediately. |
| 154 | */ |
| 155 | sigprocmask(SIG_SETMASK, old_set, NULL); |
| 156 | cpu_loop_exit_noexc(cpu); |
| 157 | /* NORETURN */ |
| 158 | default: |
| 159 | g_assert_not_reached(); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | typedef struct PageFlagsNode { |
| 164 | struct rcu_head rcu; |
| 165 | IntervalTreeNode itree; |
| 166 | int flags; |
| 167 | } PageFlagsNode; |
| 168 | |
| 169 | static IntervalTreeRoot pageflags_root; |
| 170 | |
| 171 | static PageFlagsNode *pageflags_find(vaddr start, vaddr last) |
| 172 | { |
| 173 | IntervalTreeNode *n; |
| 174 | |
| 175 | n = interval_tree_iter_first(&pageflags_root, start, last); |
| 176 | return n ? container_of(n, PageFlagsNode, itree) : NULL; |
| 177 | } |
| 178 | |
| 179 | static PageFlagsNode *pageflags_next(PageFlagsNode *p, vaddr start, vaddr last) |
| 180 | { |
| 181 | IntervalTreeNode *n; |
| 182 | |
| 183 | n = interval_tree_iter_next(&p->itree, start, last); |
| 184 | return n ? container_of(n, PageFlagsNode, itree) : NULL; |
| 185 | } |
| 186 | |
| 187 | int walk_memory_regions(void *priv, walk_memory_regions_fn fn) |
| 188 | { |
| 189 | IntervalTreeNode *n; |
| 190 | int rc = 0; |
| 191 | |
| 192 | mmap_lock(); |
| 193 | for (n = interval_tree_iter_first(&pageflags_root, 0, -1); |
| 194 | n != NULL; |
| 195 | n = interval_tree_iter_next(n, 0, -1)) { |
| 196 | PageFlagsNode *p = container_of(n, PageFlagsNode, itree); |
| 197 | |
| 198 | rc = fn(priv, n->start, n->last + 1, p->flags); |
| 199 | if (rc != 0) { |
| 200 | break; |
| 201 | } |
| 202 | } |
| 203 | mmap_unlock(); |
| 204 | |
| 205 | return rc; |
| 206 | } |
| 207 | |
| 208 | static int dump_region(void *opaque, vaddr start, vaddr end, int prot) |
| 209 | { |
| 210 | FILE *f = opaque; |
| 211 | uint64_t mask; |
| 212 | int width; |
| 213 | |
| 214 | if (guest_addr_max <= UINT32_MAX) { |
| 215 | mask = UINT32_MAX, width = 8; |
| 216 | } else { |
| 217 | mask = UINT64_MAX, width = 16; |
| 218 | } |
| 219 | |
| 220 | fprintf(f, "%0*" PRIx64 "-%0*" PRIx64 " %0*" PRIx64 " %c%c%c\n", |
| 221 | width, start & mask, |
| 222 | width, end & mask, |
| 223 | width, (end - start) & mask, |
| 224 | ((prot & PAGE_READ) ? 'r' : '-'), |
| 225 | ((prot & PAGE_WRITE) ? 'w' : '-'), |
| 226 | ((prot & PAGE_EXEC) ? 'x' : '-')); |
| 227 | return 0; |
| 228 | } |
| 229 | |
| 230 | /* dump memory mappings */ |
| 231 | void page_dump(FILE *f) |
| 232 | { |
| 233 | int width = guest_addr_max <= UINT32_MAX ? 8 : 16; |
| 234 | |
| 235 | fprintf(f, "%-*s %-*s %-*s %s\n", |
| 236 | width, "start", width, "end", width, "size", "prot"); |
| 237 | walk_memory_regions(f, dump_region); |
| 238 | } |
| 239 | |
| 240 | int page_get_flags(vaddr address) |
| 241 | { |
| 242 | PageFlagsNode *p; |
| 243 | |
| 244 | RCU_READ_LOCK_GUARD(); |
| 245 | |
| 246 | /* |
| 247 | * See util/interval-tree.c re lockless lookups: no false positives but |
| 248 | * there are false negatives. If we find nothing, retry with the mmap |
| 249 | * lock acquired. |
| 250 | */ |
| 251 | p = pageflags_find(address, address); |
| 252 | if (p) { |
| 253 | return p->flags; |
| 254 | } |
| 255 | if (have_mmap_lock()) { |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | mmap_lock(); |
| 260 | p = pageflags_find(address, address); |
| 261 | mmap_unlock(); |
| 262 | return p ? p->flags : 0; |
| 263 | } |
| 264 | |
| 265 | /* A subroutine of page_set_flags: insert a new node for [start,last]. */ |
| 266 | static void pageflags_create(vaddr start, vaddr last, int flags) |
| 267 | { |
| 268 | PageFlagsNode *p = g_new(PageFlagsNode, 1); |
| 269 | |
| 270 | p->itree.start = start; |
| 271 | p->itree.last = last; |
| 272 | p->flags = flags; |
| 273 | interval_tree_insert(&p->itree, &pageflags_root); |
| 274 | } |
| 275 | |
| 276 | /* |
| 277 | * A subroutine of page_set_flags: nothing overlaps [start,last], |
| 278 | * but check adjacent mappings and maybe merge into a single range. |
| 279 | */ |
| 280 | static void pageflags_create_merge(vaddr start, vaddr last, int flags) |
| 281 | { |
| 282 | PageFlagsNode *next = NULL, *prev = NULL; |
| 283 | |
| 284 | if (start > 0) { |
| 285 | prev = pageflags_find(start - 1, start - 1); |
| 286 | if (prev) { |
| 287 | if (prev->flags == flags) { |
| 288 | interval_tree_remove(&prev->itree, &pageflags_root); |
| 289 | } else { |
| 290 | prev = NULL; |
| 291 | } |
| 292 | } |
| 293 | } |
| 294 | if (last + 1 != 0) { |
| 295 | next = pageflags_find(last + 1, last + 1); |
| 296 | if (next) { |
| 297 | if (next->flags == flags) { |
| 298 | interval_tree_remove(&next->itree, &pageflags_root); |
| 299 | } else { |
| 300 | next = NULL; |
| 301 | } |
| 302 | } |
| 303 | } |
| 304 | |
| 305 | if (prev) { |
| 306 | if (next) { |
| 307 | pageflags_create(prev->itree.start, next->itree.last, flags); |
| 308 | g_free_rcu(next, rcu); |
| 309 | } else { |
| 310 | pageflags_create(prev->itree.start, last, flags); |
| 311 | } |
| 312 | g_free_rcu(prev, rcu); |
| 313 | } else if (next) { |
| 314 | pageflags_create(start, next->itree.last, flags); |
| 315 | g_free_rcu(next, rcu); |
| 316 | } else { |
| 317 | pageflags_create(start, last, flags); |
| 318 | } |
| 319 | } |
| 320 | |
| 321 | /* A subroutine of page_set_flags: add flags to [start,last]. */ |
| 322 | static bool pageflags_set_clear(vaddr start, vaddr last, |
| 323 | int set_flags, int clear_flags) |
| 324 | { |
| 325 | PageFlagsNode *p; |
| 326 | vaddr p_start, p_last; |
| 327 | int p_flags, merge_flags; |
| 328 | bool inval_tb = false; |
| 329 | |
| 330 | restart: |
| 331 | p = pageflags_find(start, last); |
| 332 | if (!p) { |
| 333 | if (set_flags & PAGE_VALID) { |
| 334 | pageflags_create_merge(start, last, set_flags); |
| 335 | } |
| 336 | goto done; |
| 337 | } |
| 338 | |
| 339 | p_start = p->itree.start; |
| 340 | p_last = p->itree.last; |
| 341 | p_flags = p->flags; |
| 342 | /* Using mprotect on a page does not change sticky bits. */ |
| 343 | merge_flags = (p_flags & ~clear_flags) | set_flags; |
| 344 | |
| 345 | /* |
| 346 | * Need to flush if an overlapping executable region |
| 347 | * removes exec, adds write, or is a new mapping. |
| 348 | */ |
| 349 | if ((p_flags & PAGE_EXEC) |
| 350 | && (!(merge_flags & PAGE_EXEC) |
| 351 | || (merge_flags & ~p_flags & PAGE_WRITE) |
| 352 | || (clear_flags & PAGE_VALID))) { |
| 353 | inval_tb = true; |
| 354 | } |
| 355 | |
| 356 | /* |
| 357 | * If there is an exact range match, update and return without |
| 358 | * attempting to merge with adjacent regions. |
| 359 | */ |
| 360 | if (start == p_start && last == p_last) { |
| 361 | if (merge_flags & PAGE_VALID) { |
| 362 | p->flags = merge_flags; |
| 363 | } else { |
| 364 | interval_tree_remove(&p->itree, &pageflags_root); |
| 365 | g_free_rcu(p, rcu); |
| 366 | } |
| 367 | goto done; |
| 368 | } |
| 369 | |
| 370 | /* |
| 371 | * If sticky bits affect the original mapping, then we must be more |
| 372 | * careful about the existing intervals and the separate flags. |
| 373 | */ |
| 374 | if (set_flags != merge_flags) { |
| 375 | if (p_start < start) { |
| 376 | interval_tree_remove(&p->itree, &pageflags_root); |
| 377 | pageflags_create(p_start, start - 1, p_flags); |
| 378 | g_free_rcu(p, rcu); |
| 379 | |
| 380 | if (last < p_last) { |
| 381 | if (merge_flags & PAGE_VALID) { |
| 382 | pageflags_create(start, last, merge_flags); |
| 383 | } |
| 384 | pageflags_create(last + 1, p_last, p_flags); |
| 385 | } else { |
| 386 | if (merge_flags & PAGE_VALID) { |
| 387 | pageflags_create(start, p_last, merge_flags); |
| 388 | } |
| 389 | if (p_last < last) { |
| 390 | start = p_last + 1; |
| 391 | goto restart; |
| 392 | } |
| 393 | } |
| 394 | } else { |
| 395 | if (start < p_start && (set_flags & PAGE_VALID)) { |
| 396 | pageflags_create(start, p_start - 1, set_flags); |
| 397 | } |
| 398 | if (last < p_last) { |
| 399 | interval_tree_remove(&p->itree, &pageflags_root); |
| 400 | pageflags_create(last + 1, p_last, p_flags); |
| 401 | if (merge_flags & PAGE_VALID) { |
| 402 | pageflags_create(start, last, merge_flags); |
| 403 | } |
| 404 | g_free_rcu(p, rcu); |
| 405 | } else { |
| 406 | if (merge_flags & PAGE_VALID) { |
| 407 | p->flags = merge_flags; |
| 408 | } else { |
| 409 | interval_tree_remove(&p->itree, &pageflags_root); |
| 410 | g_free_rcu(p, rcu); |
| 411 | } |
| 412 | if (p_last < last) { |
| 413 | start = p_last + 1; |
| 414 | goto restart; |
| 415 | } |
| 416 | } |
| 417 | } |
| 418 | goto done; |
| 419 | } |
| 420 | |
| 421 | /* If flags are not changing for this range, incorporate it. */ |
| 422 | if (set_flags == p_flags) { |
| 423 | if (start < p_start) { |
| 424 | interval_tree_remove(&p->itree, &pageflags_root); |
| 425 | pageflags_create(start, p_last, p_flags); |
| 426 | g_free_rcu(p, rcu); |
| 427 | } |
| 428 | if (p_last < last) { |
| 429 | start = p_last + 1; |
| 430 | goto restart; |
| 431 | } |
| 432 | goto done; |
| 433 | } |
| 434 | |
| 435 | /* Maybe split out head and/or tail ranges with the original flags. */ |
| 436 | interval_tree_remove(&p->itree, &pageflags_root); |
| 437 | if (p_start < start) { |
| 438 | pageflags_create(p_start, start - 1, p_flags); |
| 439 | g_free_rcu(p, rcu); |
| 440 | |
| 441 | if (p_last < last) { |
| 442 | goto restart; |
| 443 | } |
| 444 | if (last < p_last) { |
| 445 | pageflags_create(last + 1, p_last, p_flags); |
| 446 | } |
| 447 | } else if (last < p_last) { |
| 448 | pageflags_create(last + 1, p_last, p_flags); |
| 449 | g_free_rcu(p, rcu); |
| 450 | } else { |
| 451 | g_free_rcu(p, rcu); |
| 452 | goto restart; |
| 453 | } |
| 454 | if (set_flags & PAGE_VALID) { |
| 455 | pageflags_create(start, last, set_flags); |
| 456 | } |
| 457 | |
| 458 | done: |
| 459 | return inval_tb; |
| 460 | } |
| 461 | |
| 462 | void page_set_flags(vaddr start, vaddr last, int set_flags, int clear_flags) |
| 463 | { |
| 464 | /* |
| 465 | * This function should never be called with addresses outside the |
| 466 | * guest address space. If this assert fires, it probably indicates |
| 467 | * a missing call to h2g_valid. |
| 468 | */ |
| 469 | assert(start <= last); |
| 470 | assert(last <= guest_addr_max); |
| 471 | assert_memory_lock(); |
| 472 | |
| 473 | start &= TARGET_PAGE_MASK; |
| 474 | last |= ~TARGET_PAGE_MASK; |
| 475 | |
| 476 | if (set_flags & PAGE_WRITE) { |
| 477 | set_flags |= PAGE_WRITE_ORG; |
| 478 | } |
| 479 | if (clear_flags & PAGE_WRITE) { |
| 480 | clear_flags |= PAGE_WRITE_ORG; |
| 481 | } |
| 482 | |
| 483 | if (clear_flags & PAGE_VALID) { |
| 484 | page_reset_target_data(start, last); |
| 485 | clear_flags = -1; |
| 486 | } else { |
| 487 | /* Only set PAGE_ANON with new mappings. */ |
| 488 | assert(!(set_flags & PAGE_ANON)); |
| 489 | } |
| 490 | |
| 491 | if (pageflags_set_clear(start, last, set_flags, clear_flags)) { |
| 492 | tb_invalidate_phys_range(NULL, start, last); |
| 493 | } |
| 494 | } |
| 495 | |
| 496 | bool page_check_range(vaddr start, vaddr len, int flags) |
| 497 | { |
| 498 | vaddr last; |
| 499 | int locked; /* tri-state: =0: unlocked, +1: global, -1: local */ |
| 500 | bool ret; |
| 501 | |
| 502 | if (len == 0) { |
| 503 | return true; /* trivial length */ |
| 504 | } |
| 505 | |
| 506 | last = start + len - 1; |
| 507 | if (last < start) { |
| 508 | return false; /* wrap around */ |
| 509 | } |
| 510 | |
| 511 | RCU_READ_LOCK_GUARD(); |
| 512 | |
| 513 | locked = have_mmap_lock(); |
| 514 | while (true) { |
| 515 | PageFlagsNode *p = pageflags_find(start, last); |
| 516 | int missing; |
| 517 | |
| 518 | if (!p) { |
| 519 | if (!locked) { |
| 520 | /* |
| 521 | * Lockless lookups have false negatives. |
| 522 | * Retry with the lock held. |
| 523 | */ |
| 524 | mmap_lock(); |
| 525 | locked = -1; |
| 526 | p = pageflags_find(start, last); |
| 527 | } |
| 528 | if (!p) { |
| 529 | ret = false; /* entire region invalid */ |
| 530 | break; |
| 531 | } |
| 532 | } |
| 533 | if (start < p->itree.start) { |
| 534 | ret = false; /* initial bytes invalid */ |
| 535 | break; |
| 536 | } |
| 537 | |
| 538 | missing = flags & ~p->flags; |
| 539 | if (missing & ~PAGE_WRITE) { |
| 540 | ret = false; /* page doesn't match */ |
| 541 | break; |
| 542 | } |
| 543 | if (missing & PAGE_WRITE) { |
| 544 | if (!(p->flags & PAGE_WRITE_ORG)) { |
| 545 | ret = false; /* page not writable */ |
| 546 | break; |
| 547 | } |
| 548 | /* Asking about writable, but has been protected: undo. */ |
| 549 | if (!page_unprotect(NULL, start, 0)) { |
| 550 | ret = false; |
| 551 | break; |
| 552 | } |
| 553 | /* TODO: page_unprotect should take a range, not a single page. */ |
| 554 | if (last - start < TARGET_PAGE_SIZE) { |
| 555 | ret = true; /* ok */ |
| 556 | break; |
| 557 | } |
| 558 | start += TARGET_PAGE_SIZE; |
| 559 | continue; |
| 560 | } |
| 561 | |
| 562 | if (last <= p->itree.last) { |
| 563 | ret = true; /* ok */ |
| 564 | break; |
| 565 | } |
| 566 | start = p->itree.last + 1; |
| 567 | } |
| 568 | |
| 569 | /* Release the lock if acquired locally. */ |
| 570 | if (locked < 0) { |
| 571 | mmap_unlock(); |
| 572 | } |
| 573 | return ret; |
| 574 | } |
| 575 | |
| 576 | bool page_check_range_empty(vaddr start, vaddr last) |
| 577 | { |
| 578 | assert(last >= start); |
| 579 | assert_memory_lock(); |
| 580 | return pageflags_find(start, last) == NULL; |
| 581 | } |
| 582 | |
| 583 | vaddr page_find_range_empty(vaddr min, vaddr max, vaddr len, vaddr align) |
| 584 | { |
| 585 | vaddr len_m1, align_m1; |
| 586 | |
| 587 | assert(min <= max); |
| 588 | assert(max <= guest_addr_max); |
| 589 | assert(len != 0); |
| 590 | assert(is_power_of_2(align)); |
| 591 | assert_memory_lock(); |
| 592 | |
| 593 | len_m1 = len - 1; |
| 594 | align_m1 = align - 1; |
| 595 | |
| 596 | /* Iteratively narrow the search region. */ |
| 597 | while (1) { |
| 598 | PageFlagsNode *p; |
| 599 | |
| 600 | /* Align min and double-check there's enough space remaining. */ |
| 601 | min = (min + align_m1) & ~align_m1; |
| 602 | if (min > max) { |
| 603 | return -1; |
| 604 | } |
| 605 | if (len_m1 > max - min) { |
| 606 | return -1; |
| 607 | } |
| 608 | |
| 609 | p = pageflags_find(min, min + len_m1); |
| 610 | if (p == NULL) { |
| 611 | /* Found! */ |
| 612 | return min; |
| 613 | } |
| 614 | if (max <= p->itree.last) { |
| 615 | /* Existing allocation fills the remainder of the search region. */ |
| 616 | return -1; |
| 617 | } |
| 618 | /* Skip across existing allocation. */ |
| 619 | min = p->itree.last + 1; |
| 620 | } |
| 621 | } |
| 622 | |
| 623 | void tb_lock_page0(tb_page_addr_t address) |
| 624 | { |
| 625 | PageFlagsNode *p; |
| 626 | vaddr start, last; |
| 627 | int host_page_size = qemu_real_host_page_size(); |
| 628 | int prot; |
| 629 | |
| 630 | assert_memory_lock(); |
| 631 | |
| 632 | if (host_page_size <= TARGET_PAGE_SIZE) { |
| 633 | start = address & TARGET_PAGE_MASK; |
| 634 | last = start + TARGET_PAGE_SIZE - 1; |
| 635 | } else { |
| 636 | start = address & -host_page_size; |
| 637 | last = start + host_page_size - 1; |
| 638 | } |
| 639 | |
| 640 | p = pageflags_find(start, last); |
| 641 | if (!p) { |
| 642 | return; |
| 643 | } |
| 644 | prot = p->flags; |
| 645 | |
| 646 | if (unlikely(p->itree.last < last)) { |
| 647 | /* More than one protection region covers the one host page. */ |
| 648 | assert(TARGET_PAGE_SIZE < host_page_size); |
| 649 | while ((p = pageflags_next(p, start, last)) != NULL) { |
| 650 | prot |= p->flags; |
| 651 | } |
| 652 | } |
| 653 | |
| 654 | if (prot & PAGE_WRITE) { |
| 655 | pageflags_set_clear(start, last, 0, PAGE_WRITE); |
| 656 | mprotect(g2h_untagged_vaddr(start), last - start + 1, |
| 657 | prot & (PAGE_READ | PAGE_EXEC) ? PROT_READ : PROT_NONE); |
| 658 | } |
| 659 | } |
| 660 | |
| 661 | /* |
| 662 | * Called from signal handler: invalidate the code and unprotect the |
| 663 | * page. Return 0 if the fault was not handled, 1 if it was handled, |
| 664 | * and 2 if it was handled but the caller must cause the TB to be |
| 665 | * immediately exited. (We can only return 2 if the 'pc' argument is |
| 666 | * non-zero.) |
| 667 | */ |
| 668 | int page_unprotect(CPUState *cpu, tb_page_addr_t address, uintptr_t pc) |
| 669 | { |
| 670 | PageFlagsNode *p; |
| 671 | bool current_tb_invalidated; |
| 672 | |
| 673 | assert((cpu == NULL) == (pc == 0)); |
| 674 | |
| 675 | /* |
| 676 | * Technically this isn't safe inside a signal handler. However we |
| 677 | * know this only ever happens in a synchronous SEGV handler, so in |
| 678 | * practice it seems to be ok. |
| 679 | */ |
| 680 | mmap_lock(); |
| 681 | |
| 682 | p = pageflags_find(address, address); |
| 683 | |
| 684 | /* If this address was not really writable, nothing to do. */ |
| 685 | if (!p || !(p->flags & PAGE_WRITE_ORG)) { |
| 686 | mmap_unlock(); |
| 687 | return 0; |
| 688 | } |
| 689 | |
| 690 | current_tb_invalidated = false; |
| 691 | if (p->flags & PAGE_WRITE) { |
| 692 | /* |
| 693 | * If the page is actually marked WRITE then assume this is because |
| 694 | * this thread raced with another one which got here first and |
| 695 | * set the page to PAGE_WRITE and did the TB invalidate for us. |
| 696 | */ |
| 697 | if (pc && cpu->cc->tcg_ops->precise_smc) { |
| 698 | TranslationBlock *current_tb = tcg_tb_lookup(pc); |
| 699 | if (current_tb) { |
| 700 | current_tb_invalidated = tb_cflags(current_tb) & CF_INVALID; |
| 701 | } |
| 702 | } |
| 703 | } else { |
| 704 | int host_page_size = qemu_real_host_page_size(); |
| 705 | vaddr start, len, i; |
| 706 | int prot; |
| 707 | |
| 708 | if (host_page_size <= TARGET_PAGE_SIZE) { |
| 709 | start = address & TARGET_PAGE_MASK; |
| 710 | len = TARGET_PAGE_SIZE; |
| 711 | prot = p->flags | PAGE_WRITE; |
| 712 | pageflags_set_clear(start, start + len - 1, PAGE_WRITE, 0); |
| 713 | current_tb_invalidated = |
| 714 | tb_invalidate_phys_page_unwind(cpu, start, pc); |
| 715 | } else { |
| 716 | start = address & -host_page_size; |
| 717 | len = host_page_size; |
| 718 | prot = 0; |
| 719 | |
| 720 | for (i = 0; i < len; i += TARGET_PAGE_SIZE) { |
| 721 | vaddr addr = start + i; |
| 722 | |
| 723 | p = pageflags_find(addr, addr); |
| 724 | if (p) { |
| 725 | prot |= p->flags; |
| 726 | if (p->flags & PAGE_WRITE_ORG) { |
| 727 | prot |= PAGE_WRITE; |
| 728 | pageflags_set_clear(addr, addr + TARGET_PAGE_SIZE - 1, |
| 729 | PAGE_WRITE, 0); |
| 730 | } |
| 731 | } |
| 732 | /* |
| 733 | * Since the content will be modified, we must invalidate |
| 734 | * the corresponding translated code. |
| 735 | */ |
| 736 | current_tb_invalidated |= |
| 737 | tb_invalidate_phys_page_unwind(cpu, addr, pc); |
| 738 | } |
| 739 | } |
| 740 | if (prot & PAGE_EXEC) { |
| 741 | prot = (prot & ~PAGE_EXEC) | PAGE_READ; |
| 742 | } |
| 743 | mprotect((void *)g2h_untagged_vaddr(start), len, prot & PAGE_RWX); |
| 744 | } |
| 745 | mmap_unlock(); |
| 746 | |
| 747 | /* If current TB was invalidated return to main loop */ |
| 748 | return current_tb_invalidated ? 2 : 1; |
| 749 | } |
| 750 | |
| 751 | static int probe_access_internal(CPUArchState *env, vaddr addr, |
| 752 | int fault_size, MMUAccessType access_type, |
| 753 | bool nonfault, uintptr_t ra) |
| 754 | { |
| 755 | int acc_flag; |
| 756 | bool maperr; |
| 757 | |
| 758 | switch (access_type) { |
| 759 | case MMU_DATA_STORE: |
| 760 | acc_flag = PAGE_WRITE_ORG; |
| 761 | break; |
| 762 | case MMU_DATA_LOAD: |
| 763 | acc_flag = PAGE_READ; |
| 764 | break; |
| 765 | case MMU_INST_FETCH: |
| 766 | acc_flag = PAGE_EXEC; |
| 767 | break; |
| 768 | default: |
| 769 | g_assert_not_reached(); |
| 770 | } |
| 771 | |
| 772 | if (guest_addr_valid_untagged_vaddr(addr)) { |
| 773 | int page_flags = page_get_flags(addr); |
| 774 | if (page_flags & acc_flag) { |
| 775 | if (access_type != MMU_INST_FETCH |
| 776 | && cpu_plugin_mem_cbs_enabled(env_cpu(env))) { |
| 777 | return TLB_FORCE_SLOW; |
| 778 | } |
| 779 | return 0; /* success */ |
| 780 | } |
| 781 | maperr = !(page_flags & PAGE_VALID); |
| 782 | } else { |
| 783 | maperr = true; |
| 784 | } |
| 785 | |
| 786 | if (nonfault) { |
| 787 | return TLB_INVALID_MASK; |
| 788 | } |
| 789 | |
| 790 | cpu_loop_exit_sigsegv(env_cpu(env), addr, access_type, maperr, ra); |
| 791 | } |
| 792 | |
| 793 | int probe_access_flags(CPUArchState *env, vaddr addr, int size, |
| 794 | MMUAccessType access_type, int mmu_idx, |
| 795 | bool nonfault, void **phost, uintptr_t ra) |
| 796 | { |
| 797 | int flags; |
| 798 | |
| 799 | g_assert(-(addr | TARGET_PAGE_MASK) >= size); |
| 800 | flags = probe_access_internal(env, addr, size, access_type, nonfault, ra); |
| 801 | *phost = (flags & TLB_INVALID_MASK) ? NULL : g2h_vaddr(env_cpu(env), addr); |
| 802 | return flags; |
| 803 | } |
| 804 | |
| 805 | void *probe_access(CPUArchState *env, vaddr addr, int size, |
| 806 | MMUAccessType access_type, int mmu_idx, uintptr_t ra) |
| 807 | { |
| 808 | int flags; |
| 809 | |
| 810 | g_assert(-(addr | TARGET_PAGE_MASK) >= size); |
| 811 | flags = probe_access_internal(env, addr, size, access_type, false, ra); |
| 812 | g_assert((flags & ~TLB_FORCE_SLOW) == 0); |
| 813 | |
| 814 | return size ? g2h_vaddr(env_cpu(env), addr) : NULL; |
| 815 | } |
| 816 | |
| 817 | void *tlb_vaddr_to_host(CPUArchState *env, vaddr addr, |
| 818 | MMUAccessType access_type, int mmu_idx) |
| 819 | { |
| 820 | return g2h_vaddr(env_cpu(env), addr); |
| 821 | } |
| 822 | |
| 823 | tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, vaddr addr, |
| 824 | void **hostp) |
| 825 | { |
| 826 | int flags; |
| 827 | |
| 828 | flags = probe_access_internal(env, addr, 1, MMU_INST_FETCH, false, 0); |
| 829 | g_assert(flags == 0); |
| 830 | |
| 831 | *hostp = g2h_untagged_vaddr(addr); |
| 832 | return addr; |
| 833 | } |
| 834 | |
| 835 | /* |
| 836 | * Allocate chunks of target data together. For the only current user, |
| 837 | * if we allocate one hunk per page, we have overhead of 40/128 or 40%. |
| 838 | * Therefore, allocate memory for 64 pages at a time for overhead < 1%. |
| 839 | */ |
| 840 | #define TPD_PAGES 64 |
| 841 | #define TBD_MASK (TARGET_PAGE_MASK * TPD_PAGES) |
| 842 | |
| 843 | typedef struct TargetPageDataNode { |
| 844 | struct rcu_head rcu; |
| 845 | IntervalTreeNode itree; |
| 846 | char data[] __attribute__((aligned)); |
| 847 | } TargetPageDataNode; |
| 848 | |
| 849 | static IntervalTreeRoot targetdata_root; |
| 850 | static size_t target_page_data_size; |
| 851 | |
| 852 | void page_reset_target_data(vaddr start, vaddr last) |
| 853 | { |
| 854 | IntervalTreeNode *n, *next; |
| 855 | size_t size = target_page_data_size; |
| 856 | |
| 857 | if (likely(size == 0)) { |
| 858 | return; |
| 859 | } |
| 860 | |
| 861 | assert_memory_lock(); |
| 862 | |
| 863 | start &= TARGET_PAGE_MASK; |
| 864 | last |= ~TARGET_PAGE_MASK; |
| 865 | |
| 866 | for (n = interval_tree_iter_first(&targetdata_root, start, last), |
| 867 | next = n ? interval_tree_iter_next(n, start, last) : NULL; |
| 868 | n != NULL; |
| 869 | n = next, |
| 870 | next = next ? interval_tree_iter_next(n, start, last) : NULL) { |
| 871 | vaddr n_start, n_last, p_ofs, p_len; |
| 872 | TargetPageDataNode *t = container_of(n, TargetPageDataNode, itree); |
| 873 | |
| 874 | if (n->start >= start && n->last <= last) { |
| 875 | interval_tree_remove(n, &targetdata_root); |
| 876 | g_free_rcu(t, rcu); |
| 877 | continue; |
| 878 | } |
| 879 | |
| 880 | if (n->start < start) { |
| 881 | n_start = start; |
| 882 | p_ofs = (start - n->start) >> TARGET_PAGE_BITS; |
| 883 | } else { |
| 884 | n_start = n->start; |
| 885 | p_ofs = 0; |
| 886 | } |
| 887 | n_last = MIN(last, n->last); |
| 888 | p_len = (n_last + 1 - n_start) >> TARGET_PAGE_BITS; |
| 889 | |
| 890 | memset(t->data + p_ofs * size, 0, p_len * size); |
| 891 | } |
| 892 | } |
| 893 | |
| 894 | void *page_get_target_data(vaddr address, size_t size) |
| 895 | { |
| 896 | IntervalTreeNode *n; |
| 897 | TargetPageDataNode *t; |
| 898 | vaddr page, region, p_ofs; |
| 899 | |
| 900 | /* Remember the size from the first call, and it should be constant. */ |
| 901 | if (unlikely(target_page_data_size != size)) { |
| 902 | assert(target_page_data_size == 0); |
| 903 | target_page_data_size = size; |
| 904 | } |
| 905 | |
| 906 | page = address & TARGET_PAGE_MASK; |
| 907 | region = address & TBD_MASK; |
| 908 | |
| 909 | n = interval_tree_iter_first(&targetdata_root, page, page); |
| 910 | if (!n) { |
| 911 | /* |
| 912 | * See util/interval-tree.c re lockless lookups: no false positives |
| 913 | * but there are false negatives. If we find nothing, retry with |
| 914 | * the mmap lock acquired. We also need the lock for the |
| 915 | * allocation + insert. |
| 916 | */ |
| 917 | mmap_lock(); |
| 918 | n = interval_tree_iter_first(&targetdata_root, page, page); |
| 919 | if (!n) { |
| 920 | t = g_malloc0(sizeof(TargetPageDataNode) + TPD_PAGES * size); |
| 921 | n = &t->itree; |
| 922 | n->start = region; |
| 923 | n->last = region | ~TBD_MASK; |
| 924 | interval_tree_insert(n, &targetdata_root); |
| 925 | } |
| 926 | mmap_unlock(); |
| 927 | } |
| 928 | |
| 929 | t = container_of(n, TargetPageDataNode, itree); |
| 930 | p_ofs = (page - region) >> TARGET_PAGE_BITS; |
| 931 | return t->data + p_ofs * size; |
| 932 | } |
| 933 | |
| 934 | /* The system-mode versions of these helpers are in cputlb.c. */ |
| 935 | |
| 936 | static void *cpu_mmu_lookup(CPUState *cpu, vaddr addr, |
| 937 | MemOp mop, uintptr_t ra, MMUAccessType type) |
| 938 | { |
| 939 | int a_bits = memop_alignment_bits(mop); |
| 940 | void *ret; |
| 941 | |
| 942 | /* Enforce guest required alignment. */ |
| 943 | if (unlikely(addr & ((1 << a_bits) - 1))) { |
| 944 | cpu_loop_exit_sigbus(cpu, addr, type, ra); |
| 945 | } |
| 946 | |
| 947 | ret = g2h_vaddr(cpu, addr); |
| 948 | set_helper_retaddr(ra); |
| 949 | return ret; |
| 950 | } |
| 951 | |
| 952 | /* physical memory access (slow version, mainly for debug) */ |
| 953 | int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, |
| 954 | void *ptr, size_t len, bool is_write) |
| 955 | { |
| 956 | int flags; |
| 957 | vaddr l, page; |
| 958 | uint8_t *buf = ptr; |
| 959 | ssize_t written; |
| 960 | int ret = -1; |
| 961 | int fd = -1; |
| 962 | |
| 963 | mmap_lock(); |
| 964 | |
| 965 | while (len > 0) { |
| 966 | page = addr & TARGET_PAGE_MASK; |
| 967 | l = (page + TARGET_PAGE_SIZE) - addr; |
| 968 | if (l > len) { |
| 969 | l = len; |
| 970 | } |
| 971 | flags = page_get_flags(page); |
| 972 | if (!(flags & PAGE_VALID)) { |
| 973 | goto out_close; |
| 974 | } |
| 975 | if (is_write) { |
| 976 | if (flags & PAGE_WRITE) { |
| 977 | memcpy(g2h_vaddr(cpu, addr), buf, l); |
| 978 | } else { |
| 979 | /* Bypass the host page protection using ptrace. */ |
| 980 | if (fd == -1) { |
| 981 | fd = open("/proc/self/mem", O_WRONLY); |
| 982 | if (fd == -1) { |
| 983 | goto out; |
| 984 | } |
| 985 | } |
| 986 | /* |
| 987 | * If there is a TranslationBlock and we weren't bypassing the |
| 988 | * host page protection, the memcpy() above would SEGV, |
| 989 | * ultimately leading to page_unprotect(). So invalidate the |
| 990 | * translations manually. Both invalidation and pwrite() must |
| 991 | * be under mmap_lock() in order to prevent the creation of |
| 992 | * another TranslationBlock in between. |
| 993 | */ |
| 994 | tb_invalidate_phys_range(NULL, addr, addr + l - 1); |
| 995 | written = pwrite(fd, buf, l, |
| 996 | (off_t)(uintptr_t)g2h_untagged_vaddr(addr)); |
| 997 | if (written != l) { |
| 998 | goto out_close; |
| 999 | } |
| 1000 | } |
| 1001 | } else if (flags & PAGE_READ) { |
| 1002 | memcpy(buf, g2h_vaddr(cpu, addr), l); |
| 1003 | } else { |
| 1004 | /* Bypass the host page protection using ptrace. */ |
| 1005 | if (fd == -1) { |
| 1006 | fd = open("/proc/self/mem", O_RDONLY); |
| 1007 | if (fd == -1) { |
| 1008 | goto out; |
| 1009 | } |
| 1010 | } |
| 1011 | if (pread(fd, buf, l, |
| 1012 | (off_t)(uintptr_t)g2h_untagged_vaddr(addr)) != l) { |
| 1013 | goto out_close; |
| 1014 | } |
| 1015 | } |
| 1016 | len -= l; |
| 1017 | buf += l; |
| 1018 | addr += l; |
| 1019 | } |
| 1020 | ret = 0; |
| 1021 | out_close: |
| 1022 | if (fd != -1) { |
| 1023 | close(fd); |
| 1024 | } |
| 1025 | out: |
| 1026 | mmap_unlock(); |
| 1027 | |
| 1028 | return ret; |
| 1029 | } |
| 1030 | |
| 1031 | #include "ldst_atomicity.c.inc" |
| 1032 | |
| 1033 | static uint8_t do_ld1_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, |
| 1034 | uintptr_t ra, MMUAccessType access_type) |
| 1035 | { |
| 1036 | void *haddr; |
| 1037 | uint8_t ret; |
| 1038 | |
| 1039 | cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); |
| 1040 | haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, access_type); |
| 1041 | ret = ldub_p(haddr); |
| 1042 | clear_helper_retaddr(); |
| 1043 | return ret; |
| 1044 | } |
| 1045 | |
| 1046 | static uint16_t do_ld2_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, |
| 1047 | uintptr_t ra, MMUAccessType access_type) |
| 1048 | { |
| 1049 | void *haddr; |
| 1050 | uint16_t ret; |
| 1051 | MemOp mop = get_memop(oi); |
| 1052 | |
| 1053 | cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); |
| 1054 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); |
| 1055 | ret = load_atom_2(cpu, ra, haddr, mop); |
| 1056 | clear_helper_retaddr(); |
| 1057 | |
| 1058 | if (mop & MO_BSWAP) { |
| 1059 | ret = bswap16(ret); |
| 1060 | } |
| 1061 | return ret; |
| 1062 | } |
| 1063 | |
| 1064 | static uint32_t do_ld4_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, |
| 1065 | uintptr_t ra, MMUAccessType access_type) |
| 1066 | { |
| 1067 | void *haddr; |
| 1068 | uint32_t ret; |
| 1069 | MemOp mop = get_memop(oi); |
| 1070 | |
| 1071 | cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); |
| 1072 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); |
| 1073 | ret = load_atom_4(cpu, ra, haddr, mop); |
| 1074 | clear_helper_retaddr(); |
| 1075 | |
| 1076 | if (mop & MO_BSWAP) { |
| 1077 | ret = bswap32(ret); |
| 1078 | } |
| 1079 | return ret; |
| 1080 | } |
| 1081 | |
| 1082 | static uint64_t do_ld8_mmu(CPUState *cpu, vaddr addr, MemOpIdx oi, |
| 1083 | uintptr_t ra, MMUAccessType access_type) |
| 1084 | { |
| 1085 | void *haddr; |
| 1086 | uint64_t ret; |
| 1087 | MemOp mop = get_memop(oi); |
| 1088 | |
| 1089 | cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); |
| 1090 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, access_type); |
| 1091 | ret = load_atom_8(cpu, ra, haddr, mop); |
| 1092 | clear_helper_retaddr(); |
| 1093 | |
| 1094 | if (mop & MO_BSWAP) { |
| 1095 | ret = bswap64(ret); |
| 1096 | } |
| 1097 | return ret; |
| 1098 | } |
| 1099 | |
| 1100 | static Int128 do_ld16_mmu(CPUState *cpu, vaddr addr, |
| 1101 | MemOpIdx oi, uintptr_t ra) |
| 1102 | { |
| 1103 | void *haddr; |
| 1104 | Int128 ret; |
| 1105 | MemOp mop = get_memop(oi); |
| 1106 | |
| 1107 | tcg_debug_assert((mop & MO_SIZE) == MO_128); |
| 1108 | cpu_req_mo(cpu, TCG_MO_LD_LD | TCG_MO_ST_LD); |
| 1109 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_LOAD); |
| 1110 | ret = load_atom_16(cpu, ra, haddr, mop); |
| 1111 | clear_helper_retaddr(); |
| 1112 | |
| 1113 | if (mop & MO_BSWAP) { |
| 1114 | ret = bswap128(ret); |
| 1115 | } |
| 1116 | return ret; |
| 1117 | } |
| 1118 | |
| 1119 | static void do_st1_mmu(CPUState *cpu, vaddr addr, uint8_t val, |
| 1120 | MemOpIdx oi, uintptr_t ra) |
| 1121 | { |
| 1122 | void *haddr; |
| 1123 | |
| 1124 | cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); |
| 1125 | haddr = cpu_mmu_lookup(cpu, addr, get_memop(oi), ra, MMU_DATA_STORE); |
| 1126 | stb_p(haddr, val); |
| 1127 | clear_helper_retaddr(); |
| 1128 | } |
| 1129 | |
| 1130 | static void do_st2_mmu(CPUState *cpu, vaddr addr, uint16_t val, |
| 1131 | MemOpIdx oi, uintptr_t ra) |
| 1132 | { |
| 1133 | void *haddr; |
| 1134 | MemOp mop = get_memop(oi); |
| 1135 | |
| 1136 | cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); |
| 1137 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); |
| 1138 | |
| 1139 | if (mop & MO_BSWAP) { |
| 1140 | val = bswap16(val); |
| 1141 | } |
| 1142 | store_atom_2(cpu, ra, haddr, mop, val); |
| 1143 | clear_helper_retaddr(); |
| 1144 | } |
| 1145 | |
| 1146 | static void do_st4_mmu(CPUState *cpu, vaddr addr, uint32_t val, |
| 1147 | MemOpIdx oi, uintptr_t ra) |
| 1148 | { |
| 1149 | void *haddr; |
| 1150 | MemOp mop = get_memop(oi); |
| 1151 | |
| 1152 | cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); |
| 1153 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); |
| 1154 | |
| 1155 | if (mop & MO_BSWAP) { |
| 1156 | val = bswap32(val); |
| 1157 | } |
| 1158 | store_atom_4(cpu, ra, haddr, mop, val); |
| 1159 | clear_helper_retaddr(); |
| 1160 | } |
| 1161 | |
| 1162 | static void do_st8_mmu(CPUState *cpu, vaddr addr, uint64_t val, |
| 1163 | MemOpIdx oi, uintptr_t ra) |
| 1164 | { |
| 1165 | void *haddr; |
| 1166 | MemOp mop = get_memop(oi); |
| 1167 | |
| 1168 | cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); |
| 1169 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); |
| 1170 | |
| 1171 | if (mop & MO_BSWAP) { |
| 1172 | val = bswap64(val); |
| 1173 | } |
| 1174 | store_atom_8(cpu, ra, haddr, mop, val); |
| 1175 | clear_helper_retaddr(); |
| 1176 | } |
| 1177 | |
| 1178 | static void do_st16_mmu(CPUState *cpu, vaddr addr, Int128 val, |
| 1179 | MemOpIdx oi, uintptr_t ra) |
| 1180 | { |
| 1181 | void *haddr; |
| 1182 | MemOpIdx mop = get_memop(oi); |
| 1183 | |
| 1184 | cpu_req_mo(cpu, TCG_MO_LD_ST | TCG_MO_ST_ST); |
| 1185 | haddr = cpu_mmu_lookup(cpu, addr, mop, ra, MMU_DATA_STORE); |
| 1186 | |
| 1187 | if (mop & MO_BSWAP) { |
| 1188 | val = bswap128(val); |
| 1189 | } |
| 1190 | store_atom_16(cpu, ra, haddr, mop, val); |
| 1191 | clear_helper_retaddr(); |
| 1192 | } |
| 1193 | |
| 1194 | uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, |
| 1195 | MemOpIdx oi, uintptr_t ra) |
| 1196 | { |
| 1197 | return do_ld1_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); |
| 1198 | } |
| 1199 | |
| 1200 | uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, |
| 1201 | MemOpIdx oi, uintptr_t ra) |
| 1202 | { |
| 1203 | return do_ld2_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); |
| 1204 | } |
| 1205 | |
| 1206 | uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, |
| 1207 | MemOpIdx oi, uintptr_t ra) |
| 1208 | { |
| 1209 | return do_ld4_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); |
| 1210 | } |
| 1211 | |
| 1212 | uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, |
| 1213 | MemOpIdx oi, uintptr_t ra) |
| 1214 | { |
| 1215 | return do_ld8_mmu(env_cpu(env), addr, oi, ra ? ra : 1, MMU_INST_FETCH); |
| 1216 | } |
| 1217 | |
| 1218 | #include "ldst_common.c.inc" |
| 1219 | |
| 1220 | /* |
| 1221 | * Do not allow unaligned operations to proceed. Return the host address. |
| 1222 | */ |
| 1223 | static void *atomic_mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi, |
| 1224 | int size, uintptr_t retaddr) |
| 1225 | { |
| 1226 | MemOp mop = get_memop(oi); |
| 1227 | int a_bits = memop_alignment_bits(mop); |
| 1228 | void *ret; |
| 1229 | |
| 1230 | /* Enforce guest required alignment. */ |
| 1231 | if (unlikely(addr & ((1 << a_bits) - 1))) { |
| 1232 | cpu_loop_exit_sigbus(cpu, addr, MMU_DATA_STORE, retaddr); |
| 1233 | } |
| 1234 | |
| 1235 | /* Enforce qemu required alignment. */ |
| 1236 | if (unlikely(addr & (size - 1))) { |
| 1237 | cpu_loop_exit_atomic(cpu, retaddr); |
| 1238 | } |
| 1239 | |
| 1240 | ret = g2h_vaddr(cpu, addr); |
| 1241 | set_helper_retaddr(retaddr); |
| 1242 | return ret; |
| 1243 | } |
| 1244 | |
| 1245 | #include "atomic_common.c.inc" |
| 1246 | |
| 1247 | /* |
| 1248 | * First set of functions passes in OI and RETADDR. |
| 1249 | * This makes them callable from other helpers. |
| 1250 | */ |
| 1251 | |
| 1252 | #define ATOMIC_NAME(X) \ |
| 1253 | glue(glue(glue(cpu_atomic_ ## X, SUFFIX), END), _mmu) |
| 1254 | #define ATOMIC_MMU_CLEANUP do { clear_helper_retaddr(); } while (0) |
| 1255 | |
| 1256 | #define DATA_SIZE 1 |
| 1257 | #include "atomic_template.h" |
| 1258 | |
| 1259 | #define DATA_SIZE 2 |
| 1260 | #include "atomic_template.h" |
| 1261 | |
| 1262 | #define DATA_SIZE 4 |
| 1263 | #include "atomic_template.h" |
| 1264 | |
| 1265 | #define DATA_SIZE 8 |
| 1266 | #include "atomic_template.h" |
| 1267 | |
| 1268 | #if defined(CONFIG_ATOMIC128) || HAVE_CMPXCHG128 |
| 1269 | #define DATA_SIZE 16 |
| 1270 | #include "atomic_template.h" |
| 1271 | #endif |