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1 /*
2 * ARM AArch64 cpu init and loop
3 *
4 * Copyright (c) 2015 Stacey D. Son
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8 #ifndef TARGET_ARCH_CPU_H
9 #define TARGET_ARCH_CPU_H
10
11 #include "target_arch.h"
12 #include "signal-common.h"
13 #include "target/arm/syndrome.h"
14
15 #define TARGET_DEFAULT_CPU_MODEL "any"
16
17 static inline void target_cpu_init(CPUARMState *env,
18 struct target_pt_regs *regs)
19 {
20 int i;
21
22 if (!(arm_feature(env, ARM_FEATURE_AARCH64))) {
23 fprintf(stderr, "The selected ARM CPU does not support 64 bit mode\n");
24 exit(1);
25 }
26 for (i = 0; i < 31; i++) {
27 env->xregs[i] = regs->regs[i];
28 }
29 env->pc = regs->pc;
30 env->xregs[31] = regs->sp;
31 }
32
33
34 static inline G_NORETURN void target_cpu_loop(CPUARMState *env)
35 {
36 CPUState *cs = env_cpu(env);
37 int trapnr, ec, fsc, si_code, si_signo;
38 uint64_t code, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
39 abi_long ret;
40
41 for (;;) {
42 cpu_exec_start(cs);
43 trapnr = cpu_exec(cs);
44 cpu_exec_end(cs);
45 qemu_process_cpu_events(cs);
46
47 switch (trapnr) {
48 case EXCP_SWI:
49 /* See arm64/arm64/trap.c cpu_fetch_syscall_args() */
50 code = env->xregs[8];
51 if (code == TARGET_FREEBSD_NR_syscall ||
52 code == TARGET_FREEBSD_NR___syscall) {
53 code = env->xregs[0];
54 arg1 = env->xregs[1];
55 arg2 = env->xregs[2];
56 arg3 = env->xregs[3];
57 arg4 = env->xregs[4];
58 arg5 = env->xregs[5];
59 arg6 = env->xregs[6];
60 arg7 = env->xregs[7];
61 arg8 = 0;
62 } else {
63 arg1 = env->xregs[0];
64 arg2 = env->xregs[1];
65 arg3 = env->xregs[2];
66 arg4 = env->xregs[3];
67 arg5 = env->xregs[4];
68 arg6 = env->xregs[5];
69 arg7 = env->xregs[6];
70 arg8 = env->xregs[7];
71 }
72 ret = do_freebsd_syscall(env, code, arg1, arg2, arg3,
73 arg4, arg5, arg6, arg7, arg8);
74 /*
75 * The carry bit is cleared for no error; set for error.
76 * See arm64/arm64/vm_machdep.c cpu_set_syscall_retval()
77 */
78 if (ret >= 0) {
79 env->CF = 0;
80 env->xregs[0] = ret;
81 } else if (ret == -TARGET_ERESTART) {
82 env->pc -= 4;
83 break;
84 } else if (ret != -TARGET_EJUSTRETURN) {
85 env->CF = 1;
86 env->xregs[0] = -ret;
87 }
88 break;
89
90 case EXCP_INTERRUPT:
91 /* Just indicate that signals should be handle ASAP. */
92 break;
93
94 case EXCP_UDEF:
95 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc);
96 break;
97
98
99 case EXCP_PREFETCH_ABORT:
100 case EXCP_DATA_ABORT:
101 /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
102 ec = syn_get_ec(env->exception.syndrome);
103 assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
104
105 /* Both EC have the same format for FSC, or close enough. */
106 fsc = extract32(env->exception.syndrome, 0, 6);
107 switch (fsc) {
108 case 0x04 ... 0x07: /* Translation fault, level {0-3} */
109 si_signo = TARGET_SIGSEGV;
110 si_code = TARGET_SEGV_MAPERR;
111 break;
112 case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
113 case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
114 si_signo = TARGET_SIGSEGV;
115 si_code = TARGET_SEGV_ACCERR;
116 break;
117 case 0x11: /* Synchronous Tag Check Fault */
118 si_signo = TARGET_SIGSEGV;
119 si_code = /* TARGET_SEGV_MTESERR; */ TARGET_SEGV_ACCERR;
120 break;
121 case 0x21: /* Alignment fault */
122 si_signo = TARGET_SIGBUS;
123 si_code = TARGET_BUS_ADRALN;
124 break;
125 default:
126 g_assert_not_reached();
127 }
128 force_sig_fault(si_signo, si_code, env->exception.vaddress);
129 break;
130
131 case EXCP_DEBUG:
132 case EXCP_BKPT:
133 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
134 break;
135
136 case EXCP_ATOMIC:
137 cpu_exec_step_atomic(cs);
138 break;
139
140 case EXCP_YIELD:
141 /* nothing to do here for user-mode, just resume guest code */
142 break;
143 default:
144 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
145 trapnr);
146 cpu_dump_state(cs, stderr, 0);
147 abort();
148 } /* switch() */
149 process_pending_signals(env);
150 /*
151 * Exception return on AArch64 always clears the exclusive
152 * monitor, so any return to running guest code implies this.
153 * A strex (successful or otherwise) also clears the monitor, so
154 * we don't need to specialcase EXCP_STREX.
155 */
156 env->exclusive_addr = -1;
157 } /* for (;;) */
158 }
159
160
161 /* See arm64/arm64/vm_machdep.c cpu_fork() */
162 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
163 {
164 if (newsp) {
165 env->xregs[31] = newsp;
166 }
167 env->regs[0] = 0;
168 env->regs[1] = 0;
169 pstate_write(env, 0);
170 }
171
172 static inline void target_cpu_reset(CPUArchState *env)
173 {
174 }
175
176
177 #endif /* TARGET_ARCH_CPU_H */