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1 /*
2 * arm cpu init and loop
3 *
4 * Copyright (c) 2013 Stacey D. Son
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8 #ifndef TARGET_ARCH_CPU_H
9 #define TARGET_ARCH_CPU_H
10
11 #include "target_arch.h"
12 #include "signal-common.h"
13
14 #define TARGET_DEFAULT_CPU_MODEL "any"
15
16 static inline void target_cpu_init(CPUARMState *env,
17 struct target_pt_regs *regs)
18 {
19 int i;
20
21 cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC,
22 CPSRWriteByInstr);
23 for (i = 0; i < 16; i++) {
24 env->regs[i] = regs->uregs[i];
25 }
26 }
27
28 static inline G_NORETURN void target_cpu_loop(CPUARMState *env)
29 {
30 int trapnr, si_signo, si_code;
31 CPUState *cs = env_cpu(env);
32
33 for (;;) {
34 cpu_exec_start(cs);
35 trapnr = cpu_exec(cs);
36 cpu_exec_end(cs);
37 qemu_process_cpu_events(cs);
38 switch (trapnr) {
39 case EXCP_UDEF:
40 case EXCP_NOCP:
41 case EXCP_INVSTATE:
42 /*
43 * See arm/arm/undefined.c undefinedinstruction();
44 *
45 * A number of details aren't emulated (they likely don't matter):
46 * o Misaligned PC generates ILL_ILLADR (these can't come from qemu)
47 * o Thumb-2 instructions generate ILLADR
48 * o Both modes implement coprocessor instructions, which we don't
49 * do here. FreeBSD just implements them for the VFP coprocessor
50 * and special kernel breakpoints, trace points, dtrace, etc.
51 */
52 force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->regs[15]);
53 break;
54 case EXCP_SWI:
55 {
56 int ret;
57 abi_ulong params = get_sp_from_cpustate(env);
58 int32_t syscall_nr = env->regs[7];
59 int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8;
60
61 /* See arm/arm/syscall.c cpu_fetch_syscall_args() */
62 if (syscall_nr == TARGET_FREEBSD_NR_syscall) {
63 syscall_nr = env->regs[0];
64 arg1 = env->regs[1];
65 arg2 = env->regs[2];
66 arg3 = env->regs[3];
67 get_user_s32(arg4, params);
68 params += sizeof(int32_t);
69 get_user_s32(arg5, params);
70 params += sizeof(int32_t);
71 get_user_s32(arg6, params);
72 params += sizeof(int32_t);
73 get_user_s32(arg7, params);
74 arg8 = 0;
75 } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) {
76 syscall_nr = env->regs[0];
77 arg1 = env->regs[2];
78 arg2 = env->regs[3];
79 get_user_s32(arg3, params);
80 params += sizeof(int32_t);
81 get_user_s32(arg4, params);
82 params += sizeof(int32_t);
83 get_user_s32(arg5, params);
84 params += sizeof(int32_t);
85 get_user_s32(arg6, params);
86 arg7 = 0;
87 arg8 = 0;
88 } else {
89 arg1 = env->regs[0];
90 arg2 = env->regs[1];
91 arg3 = env->regs[2];
92 arg4 = env->regs[3];
93 get_user_s32(arg5, params);
94 params += sizeof(int32_t);
95 get_user_s32(arg6, params);
96 params += sizeof(int32_t);
97 get_user_s32(arg7, params);
98 params += sizeof(int32_t);
99 get_user_s32(arg8, params);
100 }
101 ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3,
102 arg4, arg5, arg6, arg7, arg8);
103 /*
104 * Compare to arm/arm/vm_machdep.c
105 * cpu_set_syscall_retval()
106 */
107 if (-TARGET_EJUSTRETURN == ret) {
108 /*
109 * Returning from a successful sigreturn syscall.
110 * Avoid clobbering register state.
111 */
112 break;
113 }
114 if (-TARGET_ERESTART == ret) {
115 env->regs[15] -= env->thumb ? 2 : 4;
116 break;
117 }
118 if ((unsigned int)ret >= (unsigned int)(-515)) {
119 ret = -ret;
120 cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr);
121 env->regs[0] = ret;
122 } else {
123 cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr);
124 env->regs[0] = ret; /* XXX need to handle lseek()? */
125 /* env->regs[1] = 0; */
126 }
127 }
128 break;
129 case EXCP_INTERRUPT:
130 /* just indicate that signals should be handled asap */
131 break;
132 case EXCP_PREFETCH_ABORT:
133 case EXCP_DATA_ABORT:
134 /*
135 * See arm/arm/trap-v6.c prefetch_abort_handler() and
136 * data_abort_handler()
137 *
138 * However, FreeBSD maps these to a generic value and then uses that
139 * to maybe fault in pages in vm/vm_fault.c:vm_fault_trap(). I
140 * believe that the indirection maps the same as Linux, but haven't
141 * chased down every single possible indirection.
142 */
143
144 /* For user-only we don't set TTBCR_EAE, so look at the FSR. */
145 switch (env->exception.fsr & 0x1f) {
146 case 0x1: /* Alignment */
147 si_signo = TARGET_SIGBUS;
148 si_code = TARGET_BUS_ADRALN;
149 break;
150 case 0x3: /* Access flag fault, level 1 */
151 case 0x6: /* Access flag fault, level 2 */
152 case 0x9: /* Domain fault, level 1 */
153 case 0xb: /* Domain fault, level 2 */
154 case 0xd: /* Permission fault, level 1 */
155 case 0xf: /* Permission fault, level 2 */
156 si_signo = TARGET_SIGSEGV;
157 si_code = TARGET_SEGV_ACCERR;
158 break;
159 case 0x5: /* Translation fault, level 1 */
160 case 0x7: /* Translation fault, level 2 */
161 si_signo = TARGET_SIGSEGV;
162 si_code = TARGET_SEGV_MAPERR;
163 break;
164 default:
165 g_assert_not_reached();
166 }
167 force_sig_fault(si_signo, si_code, env->exception.vaddress);
168 break;
169 case EXCP_DEBUG:
170 case EXCP_BKPT:
171 force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->regs[15]);
172 break;
173 case EXCP_YIELD:
174 /* nothing to do here for user-mode, just resume guest code */
175 break;
176 case EXCP_ATOMIC:
177 cpu_exec_step_atomic(cs);
178 break;
179 default:
180 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
181 trapnr);
182 cpu_dump_state(cs, stderr, 0);
183 abort();
184 } /* switch() */
185 process_pending_signals(env);
186 } /* for (;;) */
187 }
188
189 static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp)
190 {
191 if (newsp) {
192 env->regs[13] = newsp;
193 }
194 env->regs[0] = 0;
195 }
196
197 static inline void target_cpu_reset(CPUArchState *env)
198 {
199 }
200
201 #endif /* TARGET_ARCH_CPU_H */