| 1 | /* |
| 2 | * QEMU binary/target API (qemu-system-riscv64) |
| 3 | * |
| 4 | * Copyright (c) rev.ng Labs Srl. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #include "qemu/osdep.h" |
| 10 | #include "qemu/target-info-impl.h" |
| 11 | #include "qemu/target-info-init.h" |
| 12 | #include "hw/riscv/machines-qom.h" |
| 13 | #include "target/riscv/cpu-qom.h" |
| 14 | #include "target/riscv/cpu-param.h" |
| 15 | |
| 16 | static const TargetInfo target_info_riscv64_system = { |
| 17 | .target_name = "riscv64", |
| 18 | .target_arch = SYS_EMU_TARGET_RISCV64, |
| 19 | .long_bits = 64, |
| 20 | .cpu_type = TYPE_RISCV_CPU, |
| 21 | .machine_typename = TYPE_TARGET_RISCV64_MACHINE, |
| 22 | .endianness = ENDIAN_MODE_LITTLE, |
| 23 | .page_bits_init = TARGET_PAGE_BITS, |
| 24 | }; |
| 25 | |
| 26 | target_info_init(target_info_riscv64_system) |