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1 /*
2 * Virtio vhost-user GPU Device
3 *
4 * Copyright Red Hat, Inc. 2013-2018
5 *
6 * Authors:
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
9 * Marc-André Lureau <marcandre.lureau@redhat.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
13 */
14 #include "qemu/osdep.h"
15 #include "qemu/drm.h"
16 #include "qapi/error.h"
17 #include "qemu/sockets.h"
18
19 #include <pixman.h>
20 #include <glib-unix.h>
21
22 #include "vugpu.h"
23 #include "hw/virtio/virtio-gpu-bswap.h"
24 #include "hw/virtio/virtio-gpu-pixman.h"
25 #include "virgl.h"
26 #include "vugbm.h"
27
28 enum {
29 VHOST_USER_GPU_MAX_QUEUES = 2,
30 };
31
32 struct virtio_gpu_simple_resource {
33 uint32_t resource_id;
34 uint32_t width;
35 uint32_t height;
36 uint32_t format;
37 struct iovec *iov;
38 unsigned int iov_cnt;
39 uint32_t scanout_bitmask;
40 pixman_image_t *image;
41 struct vugbm_buffer buffer;
42 QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
43 };
44
45 static gboolean opt_print_caps;
46 static int opt_fdnum = -1;
47 static char *opt_socket_path;
48 static char *opt_render_node;
49 static gboolean opt_virgl;
50
51 static void vg_handle_ctrl(VuDev *dev, int qidx);
52 static void vg_cleanup_mapping(VuGpu *g,
53 struct virtio_gpu_simple_resource *res);
54
55 static const char *
56 vg_cmd_to_string(int cmd)
57 {
58 #define CMD(cmd) [cmd] = #cmd
59 static const char *vg_cmd_str[] = {
60 CMD(VIRTIO_GPU_UNDEFINED),
61
62 /* 2d commands */
63 CMD(VIRTIO_GPU_CMD_GET_DISPLAY_INFO),
64 CMD(VIRTIO_GPU_CMD_RESOURCE_CREATE_2D),
65 CMD(VIRTIO_GPU_CMD_RESOURCE_UNREF),
66 CMD(VIRTIO_GPU_CMD_SET_SCANOUT),
67 CMD(VIRTIO_GPU_CMD_RESOURCE_FLUSH),
68 CMD(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D),
69 CMD(VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING),
70 CMD(VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING),
71 CMD(VIRTIO_GPU_CMD_GET_CAPSET_INFO),
72 CMD(VIRTIO_GPU_CMD_GET_CAPSET),
73
74 /* 3d commands */
75 CMD(VIRTIO_GPU_CMD_CTX_CREATE),
76 CMD(VIRTIO_GPU_CMD_CTX_DESTROY),
77 CMD(VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE),
78 CMD(VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE),
79 CMD(VIRTIO_GPU_CMD_RESOURCE_CREATE_3D),
80 CMD(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D),
81 CMD(VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D),
82 CMD(VIRTIO_GPU_CMD_SUBMIT_3D),
83
84 /* cursor commands */
85 CMD(VIRTIO_GPU_CMD_UPDATE_CURSOR),
86 CMD(VIRTIO_GPU_CMD_MOVE_CURSOR),
87 };
88 #undef REQ
89
90 if (cmd >= 0 && cmd < G_N_ELEMENTS(vg_cmd_str)) {
91 return vg_cmd_str[cmd];
92 } else {
93 return "unknown";
94 }
95 }
96
97 static int
98 vg_sock_fd_read(int sock, void *buf, ssize_t buflen)
99 {
100 int ret;
101
102 do {
103 ret = read(sock, buf, buflen);
104 } while (ret < 0 && (errno == EINTR || errno == EAGAIN));
105
106 g_warn_if_fail(ret == buflen);
107 return ret;
108 }
109
110 static void
111 vg_sock_fd_close(VuGpu *g)
112 {
113 if (g->sock_fd >= 0) {
114 close(g->sock_fd);
115 g->sock_fd = -1;
116 }
117 }
118
119 static gboolean
120 source_wait_cb(gint fd, GIOCondition condition, gpointer user_data)
121 {
122 VuGpu *g = user_data;
123
124 if (!vg_recv_msg(g, VHOST_USER_GPU_DMABUF_UPDATE, 0, NULL)) {
125 return G_SOURCE_CONTINUE;
126 }
127
128 /* resume */
129 g->wait_in = 0;
130 vg_handle_ctrl(&g->dev.parent, 0);
131
132 return G_SOURCE_REMOVE;
133 }
134
135 void
136 vg_wait_ok(VuGpu *g)
137 {
138 assert(g->wait_in == 0);
139 g->wait_in = g_unix_fd_add(g->sock_fd, G_IO_IN | G_IO_HUP,
140 source_wait_cb, g);
141 }
142
143 static int
144 vg_sock_fd_write(int sock, const void *buf, ssize_t buflen, int fd)
145 {
146 ssize_t ret;
147 struct iovec iov = {
148 .iov_base = (void *)buf,
149 .iov_len = buflen,
150 };
151 struct msghdr msg = {
152 .msg_iov = &iov,
153 .msg_iovlen = 1,
154 };
155 union {
156 struct cmsghdr cmsghdr;
157 char control[CMSG_SPACE(sizeof(int))];
158 } cmsgu;
159 struct cmsghdr *cmsg;
160
161 if (fd != -1) {
162 msg.msg_control = cmsgu.control;
163 msg.msg_controllen = sizeof(cmsgu.control);
164
165 cmsg = CMSG_FIRSTHDR(&msg);
166 cmsg->cmsg_len = CMSG_LEN(sizeof(int));
167 cmsg->cmsg_level = SOL_SOCKET;
168 cmsg->cmsg_type = SCM_RIGHTS;
169
170 *((int *)CMSG_DATA(cmsg)) = fd;
171 }
172
173 do {
174 ret = sendmsg(sock, &msg, 0);
175 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
176
177 g_warn_if_fail(ret == buflen);
178 return ret;
179 }
180
181 void
182 vg_send_msg(VuGpu *vg, const VhostUserGpuMsg *msg, int fd)
183 {
184 if (vg_sock_fd_write(vg->sock_fd, msg,
185 VHOST_USER_GPU_HDR_SIZE + msg->size, fd) < 0) {
186 vg_sock_fd_close(vg);
187 }
188 }
189
190 bool
191 vg_recv_msg(VuGpu *g, uint32_t expect_req, uint32_t expect_size,
192 gpointer payload)
193 {
194 uint32_t req, flags, size;
195
196 if (vg_sock_fd_read(g->sock_fd, &req, sizeof(req)) < 0 ||
197 vg_sock_fd_read(g->sock_fd, &flags, sizeof(flags)) < 0 ||
198 vg_sock_fd_read(g->sock_fd, &size, sizeof(size)) < 0) {
199 goto err;
200 }
201
202 g_return_val_if_fail(req == expect_req, false);
203 g_return_val_if_fail(flags & VHOST_USER_GPU_MSG_FLAG_REPLY, false);
204 g_return_val_if_fail(size == expect_size, false);
205
206 if (size && vg_sock_fd_read(g->sock_fd, payload, size) != size) {
207 goto err;
208 }
209
210 return true;
211
212 err:
213 vg_sock_fd_close(g);
214 return false;
215 }
216
217 static struct virtio_gpu_simple_resource *
218 virtio_gpu_find_resource(VuGpu *g, uint32_t resource_id)
219 {
220 struct virtio_gpu_simple_resource *res;
221
222 QTAILQ_FOREACH(res, &g->reslist, next) {
223 if (res->resource_id == resource_id) {
224 return res;
225 }
226 }
227 return NULL;
228 }
229
230 void
231 vg_ctrl_response(VuGpu *g,
232 struct virtio_gpu_ctrl_command *cmd,
233 struct virtio_gpu_ctrl_hdr *resp,
234 size_t resp_len)
235 {
236 size_t s;
237
238 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
239 resp->flags |= VIRTIO_GPU_FLAG_FENCE;
240 resp->fence_id = cmd->cmd_hdr.fence_id;
241 resp->ctx_id = cmd->cmd_hdr.ctx_id;
242 }
243 virtio_gpu_ctrl_hdr_bswap(resp);
244 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
245 if (s != resp_len) {
246 g_critical("%s: response size incorrect %zu vs %zu",
247 __func__, s, resp_len);
248 }
249 vu_queue_push(&g->dev.parent, cmd->vq, &cmd->elem, s);
250 vu_queue_notify(&g->dev.parent, cmd->vq);
251 cmd->state = VG_CMD_STATE_FINISHED;
252 }
253
254 void
255 vg_ctrl_response_nodata(VuGpu *g,
256 struct virtio_gpu_ctrl_command *cmd,
257 enum virtio_gpu_ctrl_type type)
258 {
259 struct virtio_gpu_ctrl_hdr resp = {
260 .type = type,
261 };
262
263 vg_ctrl_response(g, cmd, &resp, sizeof(resp));
264 }
265
266
267 static gboolean
268 get_display_info_cb(gint fd, GIOCondition condition, gpointer user_data)
269 {
270 struct virtio_gpu_resp_display_info dpy_info = { {} };
271 VuGpu *vg = user_data;
272 struct virtio_gpu_ctrl_command *cmd = QTAILQ_LAST(&vg->fenceq);
273
274 g_debug("disp info cb");
275 assert(cmd->cmd_hdr.type == VIRTIO_GPU_CMD_GET_DISPLAY_INFO);
276 if (!vg_recv_msg(vg, VHOST_USER_GPU_GET_DISPLAY_INFO,
277 sizeof(dpy_info), &dpy_info)) {
278 return G_SOURCE_CONTINUE;
279 }
280
281 QTAILQ_REMOVE(&vg->fenceq, cmd, next);
282 vg_ctrl_response(vg, cmd, &dpy_info.hdr, sizeof(dpy_info));
283
284 vg->wait_in = 0;
285 vg_handle_ctrl(&vg->dev.parent, 0);
286
287 return G_SOURCE_REMOVE;
288 }
289
290 void
291 vg_get_display_info(VuGpu *vg, struct virtio_gpu_ctrl_command *cmd)
292 {
293 VhostUserGpuMsg msg = {
294 .request = VHOST_USER_GPU_GET_DISPLAY_INFO,
295 .size = 0,
296 };
297
298 assert(vg->wait_in == 0);
299
300 vg_send_msg(vg, &msg, -1);
301 vg->wait_in = g_unix_fd_add(vg->sock_fd, G_IO_IN | G_IO_HUP,
302 get_display_info_cb, vg);
303 cmd->state = VG_CMD_STATE_PENDING;
304 }
305
306 static gboolean
307 get_edid_cb(gint fd, GIOCondition condition, gpointer user_data)
308 {
309 struct virtio_gpu_resp_edid resp_edid;
310 VuGpu *vg = user_data;
311 struct virtio_gpu_ctrl_command *cmd = QTAILQ_LAST(&vg->fenceq);
312
313 g_debug("get edid cb");
314 assert(cmd->cmd_hdr.type == VIRTIO_GPU_CMD_GET_EDID);
315 if (!vg_recv_msg(vg, VHOST_USER_GPU_GET_EDID,
316 sizeof(resp_edid), &resp_edid)) {
317 return G_SOURCE_CONTINUE;
318 }
319
320 QTAILQ_REMOVE(&vg->fenceq, cmd, next);
321 vg_ctrl_response(vg, cmd, &resp_edid.hdr, sizeof(resp_edid));
322
323 vg->wait_in = 0;
324 vg_handle_ctrl(&vg->dev.parent, 0);
325
326 return G_SOURCE_REMOVE;
327 }
328
329 void
330 vg_get_edid(VuGpu *vg, struct virtio_gpu_ctrl_command *cmd)
331 {
332 struct virtio_gpu_cmd_get_edid get_edid;
333
334 VUGPU_FILL_CMD(get_edid);
335 virtio_gpu_bswap_32(&get_edid, sizeof(get_edid));
336
337 VhostUserGpuMsg msg = {
338 .request = VHOST_USER_GPU_GET_EDID,
339 .size = sizeof(VhostUserGpuEdidRequest),
340 .payload.edid_req = {
341 .scanout_id = get_edid.scanout,
342 },
343 };
344
345 assert(vg->wait_in == 0);
346
347 vg_send_msg(vg, &msg, -1);
348 vg->wait_in = g_unix_fd_add(vg->sock_fd, G_IO_IN | G_IO_HUP,
349 get_edid_cb, vg);
350 cmd->state = VG_CMD_STATE_PENDING;
351 }
352
353 static void
354 vg_resource_create_2d(VuGpu *g,
355 struct virtio_gpu_ctrl_command *cmd)
356 {
357 pixman_format_code_t pformat;
358 struct virtio_gpu_simple_resource *res;
359 struct virtio_gpu_resource_create_2d c2d;
360
361 VUGPU_FILL_CMD(c2d);
362 virtio_gpu_bswap_32(&c2d, sizeof(c2d));
363
364 if (c2d.resource_id == 0) {
365 g_critical("%s: resource id 0 is not allowed", __func__);
366 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
367 return;
368 }
369
370 res = virtio_gpu_find_resource(g, c2d.resource_id);
371 if (res) {
372 g_critical("%s: resource already exists %d", __func__, c2d.resource_id);
373 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
374 return;
375 }
376
377 res = g_new0(struct virtio_gpu_simple_resource, 1);
378 res->width = c2d.width;
379 res->height = c2d.height;
380 res->format = c2d.format;
381 res->resource_id = c2d.resource_id;
382
383 pformat = virtio_gpu_get_pixman_format(c2d.format);
384 if (!pformat) {
385 g_critical("%s: host couldn't handle guest format %d",
386 __func__, c2d.format);
387 g_free(res);
388 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
389 return;
390 }
391 if (!vugbm_buffer_create(&res->buffer, &g->gdev, c2d.width, c2d.height)) {
392 g_critical("%s: buffer creation failed %d %d %d",
393 __func__, c2d.resource_id, c2d.width, c2d.height);
394 g_free(res);
395 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
396 return;
397 }
398 res->image = pixman_image_create_bits(pformat,
399 c2d.width,
400 c2d.height,
401 (uint32_t *)res->buffer.mmap,
402 res->buffer.stride);
403 if (!res->image) {
404 g_critical("%s: resource creation failed %d %d %d",
405 __func__, c2d.resource_id, c2d.width, c2d.height);
406 vugbm_buffer_destroy(&res->buffer);
407 g_free(res);
408 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
409 return;
410 }
411
412 QTAILQ_INSERT_HEAD(&g->reslist, res, next);
413 }
414
415 static void
416 vg_disable_scanout(VuGpu *g, int scanout_id)
417 {
418 struct virtio_gpu_scanout *scanout = &g->scanout[scanout_id];
419 struct virtio_gpu_simple_resource *res;
420
421 if (scanout->resource_id == 0) {
422 return;
423 }
424
425 res = virtio_gpu_find_resource(g, scanout->resource_id);
426 if (res) {
427 res->scanout_bitmask &= ~(1 << scanout_id);
428 }
429
430 scanout->width = 0;
431 scanout->height = 0;
432
433 if (g->sock_fd >= 0) {
434 VhostUserGpuMsg msg = {
435 .request = VHOST_USER_GPU_SCANOUT,
436 .size = sizeof(VhostUserGpuScanout),
437 .payload.scanout.scanout_id = scanout_id,
438 };
439 vg_send_msg(g, &msg, -1);
440 }
441 }
442
443 static void
444 vg_resource_destroy(VuGpu *g,
445 struct virtio_gpu_simple_resource *res)
446 {
447 int i;
448
449 if (res->scanout_bitmask) {
450 for (i = 0; i < VIRTIO_GPU_MAX_SCANOUTS; i++) {
451 if (res->scanout_bitmask & (1 << i)) {
452 vg_disable_scanout(g, i);
453 }
454 }
455 }
456
457 vugbm_buffer_destroy(&res->buffer);
458 vg_cleanup_mapping(g, res);
459 pixman_image_unref(res->image);
460 QTAILQ_REMOVE(&g->reslist, res, next);
461 g_free(res);
462 }
463
464 static void
465 vg_resource_unref(VuGpu *g,
466 struct virtio_gpu_ctrl_command *cmd)
467 {
468 struct virtio_gpu_simple_resource *res;
469 struct virtio_gpu_resource_unref unref;
470
471 VUGPU_FILL_CMD(unref);
472 virtio_gpu_bswap_32(&unref, sizeof(unref));
473
474 res = virtio_gpu_find_resource(g, unref.resource_id);
475 if (!res) {
476 g_critical("%s: illegal resource specified %d",
477 __func__, unref.resource_id);
478 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
479 return;
480 }
481 vg_resource_destroy(g, res);
482 }
483
484 int
485 vg_create_mapping_iov(VuGpu *g,
486 struct virtio_gpu_resource_attach_backing *ab,
487 struct virtio_gpu_ctrl_command *cmd,
488 struct iovec **iov)
489 {
490 g_autofree struct virtio_gpu_mem_entry *ents = NULL;
491 size_t esize, s;
492 int i;
493
494 if (ab->nr_entries > 16384) {
495 g_critical("%s: nr_entries is too big (%d > 16384)",
496 __func__, ab->nr_entries);
497 return -1;
498 }
499
500 esize = sizeof(*ents) * ab->nr_entries;
501 ents = g_try_malloc(esize);
502 if (!ents && esize) {
503 return -1;
504 }
505 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
506 sizeof(*ab), ents, esize);
507 if (s != esize) {
508 g_critical("%s: command data size incorrect %zu vs %zu",
509 __func__, s, esize);
510 return -1;
511 }
512
513 *iov = g_try_new0(struct iovec, ab->nr_entries);
514 if (!*iov && ab->nr_entries) {
515 return -1;
516 }
517 for (i = 0; i < ab->nr_entries; i++) {
518 uint64_t len = ents[i].length;
519 (*iov)[i].iov_len = ents[i].length;
520 (*iov)[i].iov_base = vu_gpa_to_va(&g->dev.parent, &len, ents[i].addr);
521 if (!(*iov)[i].iov_base || len != ents[i].length) {
522 g_critical("%s: resource %d element %d",
523 __func__, ab->resource_id, i);
524 g_free(*iov);
525 *iov = NULL;
526 return -1;
527 }
528 }
529 return 0;
530 }
531
532 static void
533 vg_resource_attach_backing(VuGpu *g,
534 struct virtio_gpu_ctrl_command *cmd)
535 {
536 struct virtio_gpu_simple_resource *res;
537 struct virtio_gpu_resource_attach_backing ab;
538 int ret;
539
540 VUGPU_FILL_CMD(ab);
541 virtio_gpu_bswap_32(&ab, sizeof(ab));
542
543 res = virtio_gpu_find_resource(g, ab.resource_id);
544 if (!res) {
545 g_critical("%s: illegal resource specified %d",
546 __func__, ab.resource_id);
547 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
548 return;
549 }
550
551 if (res->iov) {
552 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
553 return;
554 }
555
556 ret = vg_create_mapping_iov(g, &ab, cmd, &res->iov);
557 if (ret != 0) {
558 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
559 return;
560 }
561
562 res->iov_cnt = ab.nr_entries;
563 }
564
565 /* Though currently only free iov, maybe later will do more work. */
566 void vg_cleanup_mapping_iov(VuGpu *g,
567 struct iovec *iov, uint32_t count)
568 {
569 g_free(iov);
570 }
571
572 static void
573 vg_cleanup_mapping(VuGpu *g,
574 struct virtio_gpu_simple_resource *res)
575 {
576 vg_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
577 res->iov = NULL;
578 res->iov_cnt = 0;
579 }
580
581 static void
582 vg_resource_detach_backing(VuGpu *g,
583 struct virtio_gpu_ctrl_command *cmd)
584 {
585 struct virtio_gpu_simple_resource *res;
586 struct virtio_gpu_resource_detach_backing detach;
587
588 VUGPU_FILL_CMD(detach);
589 virtio_gpu_bswap_32(&detach, sizeof(detach));
590
591 res = virtio_gpu_find_resource(g, detach.resource_id);
592 if (!res || !res->iov) {
593 g_critical("%s: illegal resource specified %d",
594 __func__, detach.resource_id);
595 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
596 return;
597 }
598
599 vg_cleanup_mapping(g, res);
600 }
601
602 static void
603 vg_transfer_to_host_2d(VuGpu *g,
604 struct virtio_gpu_ctrl_command *cmd)
605 {
606 struct virtio_gpu_simple_resource *res;
607 int h;
608 uint32_t src_offset, dst_offset, stride;
609 int bpp;
610 pixman_format_code_t format;
611 struct virtio_gpu_transfer_to_host_2d t2d;
612
613 VUGPU_FILL_CMD(t2d);
614 virtio_gpu_t2d_bswap(&t2d);
615
616 res = virtio_gpu_find_resource(g, t2d.resource_id);
617 if (!res || !res->iov) {
618 g_critical("%s: illegal resource specified %d",
619 __func__, t2d.resource_id);
620 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
621 return;
622 }
623
624 if (t2d.r.x > res->width ||
625 t2d.r.y > res->height ||
626 t2d.r.width > res->width ||
627 t2d.r.height > res->height ||
628 t2d.r.x + t2d.r.width > res->width ||
629 t2d.r.y + t2d.r.height > res->height) {
630 g_critical("%s: transfer bounds outside resource"
631 " bounds for resource %d: %d %d %d %d vs %d %d",
632 __func__, t2d.resource_id, t2d.r.x, t2d.r.y,
633 t2d.r.width, t2d.r.height, res->width, res->height);
634 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
635 return;
636 }
637
638 format = pixman_image_get_format(res->image);
639 bpp = (PIXMAN_FORMAT_BPP(format) + 7) / 8;
640 stride = pixman_image_get_stride(res->image);
641
642 if (t2d.offset || t2d.r.x || t2d.r.y ||
643 t2d.r.width != pixman_image_get_width(res->image)) {
644 void *img_data = pixman_image_get_data(res->image);
645 for (h = 0; h < t2d.r.height; h++) {
646 src_offset = t2d.offset + stride * h;
647 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
648
649 iov_to_buf(res->iov, res->iov_cnt, src_offset,
650 img_data
651 + dst_offset, t2d.r.width * bpp);
652 }
653 } else {
654 iov_to_buf(res->iov, res->iov_cnt, 0,
655 pixman_image_get_data(res->image),
656 pixman_image_get_stride(res->image)
657 * pixman_image_get_height(res->image));
658 }
659 }
660
661 static void
662 vg_set_scanout(VuGpu *g,
663 struct virtio_gpu_ctrl_command *cmd)
664 {
665 struct virtio_gpu_simple_resource *res, *ores;
666 struct virtio_gpu_scanout *scanout;
667 struct virtio_gpu_set_scanout ss;
668 int fd;
669
670 VUGPU_FILL_CMD(ss);
671 virtio_gpu_bswap_32(&ss, sizeof(ss));
672
673 if (ss.scanout_id >= VIRTIO_GPU_MAX_SCANOUTS) {
674 g_critical("%s: illegal scanout id specified %d",
675 __func__, ss.scanout_id);
676 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
677 return;
678 }
679
680 if (ss.resource_id == 0) {
681 vg_disable_scanout(g, ss.scanout_id);
682 return;
683 }
684
685 /* create a surface for this scanout */
686 res = virtio_gpu_find_resource(g, ss.resource_id);
687 if (!res) {
688 g_critical("%s: illegal resource specified %d",
689 __func__, ss.resource_id);
690 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
691 return;
692 }
693
694 if (ss.r.x > res->width ||
695 ss.r.y > res->height ||
696 ss.r.width > res->width ||
697 ss.r.height > res->height ||
698 ss.r.x + ss.r.width > res->width ||
699 ss.r.y + ss.r.height > res->height) {
700 g_critical("%s: illegal scanout %d bounds for"
701 " resource %d, (%d,%d)+%d,%d vs %d %d",
702 __func__, ss.scanout_id, ss.resource_id, ss.r.x, ss.r.y,
703 ss.r.width, ss.r.height, res->width, res->height);
704 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
705 return;
706 }
707
708 scanout = &g->scanout[ss.scanout_id];
709
710 ores = virtio_gpu_find_resource(g, scanout->resource_id);
711 if (ores) {
712 ores->scanout_bitmask &= ~(1 << ss.scanout_id);
713 }
714
715 res->scanout_bitmask |= (1 << ss.scanout_id);
716 scanout->resource_id = ss.resource_id;
717 scanout->x = ss.r.x;
718 scanout->y = ss.r.y;
719 scanout->width = ss.r.width;
720 scanout->height = ss.r.height;
721
722 struct vugbm_buffer *buffer = &res->buffer;
723
724 if (vugbm_buffer_can_get_dmabuf_fd(buffer)) {
725 VhostUserGpuMsg msg = {
726 .request = VHOST_USER_GPU_DMABUF_SCANOUT,
727 .size = sizeof(VhostUserGpuDMABUFScanout),
728 .payload.dmabuf_scanout = (VhostUserGpuDMABUFScanout) {
729 .scanout_id = ss.scanout_id,
730 .x = ss.r.x,
731 .y = ss.r.y,
732 .width = ss.r.width,
733 .height = ss.r.height,
734 .fd_width = buffer->width,
735 .fd_height = buffer->height,
736 .fd_stride = buffer->stride,
737 .fd_drm_fourcc = buffer->format
738 }
739 };
740
741 if (vugbm_buffer_get_dmabuf_fd(buffer, &fd)) {
742 vg_send_msg(g, &msg, fd);
743 close(fd);
744 }
745 } else {
746 VhostUserGpuMsg msg = {
747 .request = VHOST_USER_GPU_SCANOUT,
748 .size = sizeof(VhostUserGpuScanout),
749 .payload.scanout = (VhostUserGpuScanout) {
750 .scanout_id = ss.scanout_id,
751 .width = scanout->width,
752 .height = scanout->height
753 }
754 };
755 vg_send_msg(g, &msg, -1);
756 }
757 }
758
759 static void
760 vg_resource_flush(VuGpu *g,
761 struct virtio_gpu_ctrl_command *cmd)
762 {
763 struct virtio_gpu_simple_resource *res;
764 struct virtio_gpu_resource_flush rf;
765 pixman_region16_t flush_region;
766 int i;
767
768 VUGPU_FILL_CMD(rf);
769 virtio_gpu_bswap_32(&rf, sizeof(rf));
770
771 res = virtio_gpu_find_resource(g, rf.resource_id);
772 if (!res) {
773 g_critical("%s: illegal resource specified %d\n",
774 __func__, rf.resource_id);
775 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
776 return;
777 }
778
779 if (rf.r.x > res->width ||
780 rf.r.y > res->height ||
781 rf.r.width > res->width ||
782 rf.r.height > res->height ||
783 rf.r.x + rf.r.width > res->width ||
784 rf.r.y + rf.r.height > res->height) {
785 g_critical("%s: flush bounds outside resource"
786 " bounds for resource %d: %d %d %d %d vs %d %d\n",
787 __func__, rf.resource_id, rf.r.x, rf.r.y,
788 rf.r.width, rf.r.height, res->width, res->height);
789 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
790 return;
791 }
792
793 pixman_region_init_rect(&flush_region,
794 rf.r.x, rf.r.y, rf.r.width, rf.r.height);
795 for (i = 0; i < VIRTIO_GPU_MAX_SCANOUTS; i++) {
796 struct virtio_gpu_scanout *scanout;
797 pixman_region16_t region, finalregion;
798 pixman_box16_t *extents;
799
800 if (!(res->scanout_bitmask & (1 << i))) {
801 continue;
802 }
803 scanout = &g->scanout[i];
804
805 pixman_region_init(&finalregion);
806 pixman_region_init_rect(&region, scanout->x, scanout->y,
807 scanout->width, scanout->height);
808
809 pixman_region_intersect(&finalregion, &flush_region, &region);
810
811 extents = pixman_region_extents(&finalregion);
812 size_t width = extents->x2 - extents->x1;
813 size_t height = extents->y2 - extents->y1;
814
815 if (vugbm_buffer_can_get_dmabuf_fd(&res->buffer)) {
816 VhostUserGpuMsg vmsg = {
817 .request = VHOST_USER_GPU_DMABUF_UPDATE,
818 .size = sizeof(VhostUserGpuUpdate),
819 .payload.update = (VhostUserGpuUpdate) {
820 .scanout_id = i,
821 .x = extents->x1,
822 .y = extents->y1,
823 .width = width,
824 .height = height,
825 }
826 };
827 vg_send_msg(g, &vmsg, -1);
828 vg_wait_ok(g);
829 } else {
830 size_t bpp =
831 PIXMAN_FORMAT_BPP(pixman_image_get_format(res->image)) / 8;
832 size_t size = width * height * bpp;
833
834 void *p = g_try_malloc(VHOST_USER_GPU_HDR_SIZE +
835 sizeof(VhostUserGpuUpdate) + size);
836 if (!p) {
837 pixman_region_fini(&region);
838 pixman_region_fini(&finalregion);
839 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
840 break;
841 }
842 VhostUserGpuMsg *msg = p;
843 msg->request = VHOST_USER_GPU_UPDATE;
844 msg->size = sizeof(VhostUserGpuUpdate) + size;
845 msg->payload.update = (VhostUserGpuUpdate) {
846 .scanout_id = i,
847 .x = extents->x1,
848 .y = extents->y1,
849 .width = width,
850 .height = height,
851 };
852 pixman_image_t *img =
853 pixman_image_create_bits(pixman_image_get_format(res->image),
854 msg->payload.update.width,
855 msg->payload.update.height,
856 p + offsetof(VhostUserGpuMsg,
857 payload.update.data),
858 width * bpp);
859 pixman_image_composite(PIXMAN_OP_SRC,
860 res->image, NULL, img,
861 extents->x1, extents->y1,
862 0, 0, 0, 0,
863 width, height);
864 pixman_image_unref(img);
865 vg_send_msg(g, msg, -1);
866 g_free(msg);
867 }
868 pixman_region_fini(&region);
869 pixman_region_fini(&finalregion);
870 }
871 pixman_region_fini(&flush_region);
872 }
873
874 static void
875 vg_process_cmd(VuGpu *vg, struct virtio_gpu_ctrl_command *cmd)
876 {
877 switch (cmd->cmd_hdr.type) {
878 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
879 vg_get_display_info(vg, cmd);
880 break;
881 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
882 vg_resource_create_2d(vg, cmd);
883 break;
884 case VIRTIO_GPU_CMD_RESOURCE_UNREF:
885 vg_resource_unref(vg, cmd);
886 break;
887 case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
888 vg_resource_flush(vg, cmd);
889 break;
890 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
891 vg_transfer_to_host_2d(vg, cmd);
892 break;
893 case VIRTIO_GPU_CMD_SET_SCANOUT:
894 vg_set_scanout(vg, cmd);
895 break;
896 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
897 vg_resource_attach_backing(vg, cmd);
898 break;
899 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
900 vg_resource_detach_backing(vg, cmd);
901 break;
902 case VIRTIO_GPU_CMD_GET_EDID:
903 vg_get_edid(vg, cmd);
904 break;
905 default:
906 g_warning("TODO handle ctrl %x\n", cmd->cmd_hdr.type);
907 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
908 break;
909 }
910 if (cmd->state == VG_CMD_STATE_NEW) {
911 vg_ctrl_response_nodata(vg, cmd, cmd->error ? cmd->error :
912 VIRTIO_GPU_RESP_OK_NODATA);
913 }
914 }
915
916 static void
917 vg_handle_ctrl(VuDev *dev, int qidx)
918 {
919 VuGpu *vg = container_of(dev, VuGpu, dev.parent);
920 VuVirtq *vq = vu_get_queue(dev, qidx);
921 struct virtio_gpu_ctrl_command *cmd = NULL;
922 size_t len;
923
924 for (;;) {
925 if (vg->wait_in != 0) {
926 return;
927 }
928
929 cmd = vu_queue_pop(dev, vq, sizeof(struct virtio_gpu_ctrl_command));
930 if (!cmd) {
931 break;
932 }
933 cmd->vq = vq;
934 cmd->error = 0;
935 cmd->state = VG_CMD_STATE_NEW;
936
937 len = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
938 0, &cmd->cmd_hdr, sizeof(cmd->cmd_hdr));
939 if (len != sizeof(cmd->cmd_hdr)) {
940 g_warning("%s: command size incorrect %zu vs %zu\n",
941 __func__, len, sizeof(cmd->cmd_hdr));
942 memset(&cmd->cmd_hdr, 0, sizeof(cmd->cmd_hdr));
943 vg_ctrl_response_nodata(
944 vg, cmd, VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER);
945 } else {
946 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);
947 g_debug("%d %s\n", cmd->cmd_hdr.type,
948 vg_cmd_to_string(cmd->cmd_hdr.type));
949
950 if (vg->virgl) {
951 vg_virgl_process_cmd(vg, cmd);
952 } else {
953 vg_process_cmd(vg, cmd);
954 }
955 }
956
957 if (cmd->state != VG_CMD_STATE_FINISHED) {
958 QTAILQ_INSERT_TAIL(&vg->fenceq, cmd, next);
959 vg->inflight++;
960 } else {
961 free(cmd);
962 }
963 }
964 }
965
966 static void
967 update_cursor_data_simple(VuGpu *g, uint32_t resource_id, gpointer data)
968 {
969 struct virtio_gpu_simple_resource *res;
970
971 res = virtio_gpu_find_resource(g, resource_id);
972 g_return_if_fail(res != NULL);
973 g_return_if_fail(pixman_image_get_width(res->image) == 64);
974 g_return_if_fail(pixman_image_get_height(res->image) == 64);
975 g_return_if_fail(
976 PIXMAN_FORMAT_BPP(pixman_image_get_format(res->image)) == 32);
977
978 memcpy(data, pixman_image_get_data(res->image), 64 * 64 * sizeof(uint32_t));
979 }
980
981 static void
982 vg_process_cursor_cmd(VuGpu *g, struct virtio_gpu_update_cursor *cursor)
983 {
984 switch (cursor->hdr.type) {
985 case VIRTIO_GPU_CMD_MOVE_CURSOR: {
986 VhostUserGpuMsg msg = {
987 .request = cursor->resource_id ?
988 VHOST_USER_GPU_CURSOR_POS : VHOST_USER_GPU_CURSOR_POS_HIDE,
989 .size = sizeof(VhostUserGpuCursorPos),
990 .payload.cursor_pos = {
991 .scanout_id = cursor->pos.scanout_id,
992 .x = cursor->pos.x,
993 .y = cursor->pos.y,
994 }
995 };
996 g_debug("%s: move", G_STRFUNC);
997 vg_send_msg(g, &msg, -1);
998 break;
999 }
1000 case VIRTIO_GPU_CMD_UPDATE_CURSOR: {
1001 VhostUserGpuMsg msg = {
1002 .request = VHOST_USER_GPU_CURSOR_UPDATE,
1003 .size = sizeof(VhostUserGpuCursorUpdate),
1004 .payload.cursor_update = {
1005 .pos = {
1006 .scanout_id = cursor->pos.scanout_id,
1007 .x = cursor->pos.x,
1008 .y = cursor->pos.y,
1009 },
1010 .hot_x = cursor->hot_x,
1011 .hot_y = cursor->hot_y,
1012 }
1013 };
1014 g_debug("%s: update", G_STRFUNC);
1015 if (g->virgl) {
1016 vg_virgl_update_cursor_data(g, cursor->resource_id,
1017 msg.payload.cursor_update.data);
1018 } else {
1019 update_cursor_data_simple(g, cursor->resource_id,
1020 msg.payload.cursor_update.data);
1021 }
1022 vg_send_msg(g, &msg, -1);
1023 break;
1024 }
1025 default:
1026 g_debug("%s: unknown cmd %d", G_STRFUNC, cursor->hdr.type);
1027 break;
1028 }
1029 }
1030
1031 static void
1032 vg_handle_cursor(VuDev *dev, int qidx)
1033 {
1034 VuGpu *g = container_of(dev, VuGpu, dev.parent);
1035 VuVirtq *vq = vu_get_queue(dev, qidx);
1036 VuVirtqElement *elem;
1037 size_t len;
1038 struct virtio_gpu_update_cursor cursor;
1039
1040 for (;;) {
1041 elem = vu_queue_pop(dev, vq, sizeof(VuVirtqElement));
1042 if (!elem) {
1043 break;
1044 }
1045 g_debug("cursor out:%d in:%d\n", elem->out_num, elem->in_num);
1046
1047 len = iov_to_buf(elem->out_sg, elem->out_num,
1048 0, &cursor, sizeof(cursor));
1049 if (len != sizeof(cursor)) {
1050 g_warning("%s: cursor size incorrect %zu vs %zu\n",
1051 __func__, len, sizeof(cursor));
1052 } else {
1053 virtio_gpu_bswap_32(&cursor, sizeof(cursor));
1054 vg_process_cursor_cmd(g, &cursor);
1055 }
1056 vu_queue_push(dev, vq, elem, 0);
1057 vu_queue_notify(dev, vq);
1058 free(elem);
1059 }
1060 }
1061
1062 static void
1063 vg_panic(VuDev *dev, const char *msg)
1064 {
1065 g_critical("%s\n", msg);
1066 exit(1);
1067 }
1068
1069 static void
1070 vg_queue_set_started(VuDev *dev, int qidx, bool started)
1071 {
1072 VuVirtq *vq = vu_get_queue(dev, qidx);
1073
1074 g_debug("queue started %d:%d\n", qidx, started);
1075
1076 switch (qidx) {
1077 case 0:
1078 vu_set_queue_handler(dev, vq, started ? vg_handle_ctrl : NULL);
1079 break;
1080 case 1:
1081 vu_set_queue_handler(dev, vq, started ? vg_handle_cursor : NULL);
1082 break;
1083 default:
1084 break;
1085 }
1086 }
1087
1088 static gboolean
1089 protocol_features_cb(gint fd, GIOCondition condition, gpointer user_data)
1090 {
1091 const uint64_t protocol_edid = (1 << VHOST_USER_GPU_PROTOCOL_F_EDID);
1092 const uint64_t protocol_dmabuf2 = (1 << VHOST_USER_GPU_PROTOCOL_F_DMABUF2);
1093 VuGpu *g = user_data;
1094 uint64_t protocol_features;
1095 VhostUserGpuMsg msg = {
1096 .request = VHOST_USER_GPU_GET_PROTOCOL_FEATURES
1097 };
1098
1099 if (!vg_recv_msg(g, msg.request,
1100 sizeof(protocol_features), &protocol_features)) {
1101 return G_SOURCE_CONTINUE;
1102 }
1103
1104 protocol_features &= (protocol_edid | protocol_dmabuf2);
1105
1106 msg = (VhostUserGpuMsg) {
1107 .request = VHOST_USER_GPU_SET_PROTOCOL_FEATURES,
1108 .size = sizeof(uint64_t),
1109 .payload.u64 = protocol_features,
1110 };
1111 vg_send_msg(g, &msg, -1);
1112
1113 g->wait_in = 0;
1114 vg_handle_ctrl(&g->dev.parent, 0);
1115
1116 if (g->edid_inited && !(protocol_features & protocol_edid)) {
1117 g_printerr("EDID feature set by the frontend but it does not support "
1118 "the EDID vhost-user-gpu protocol.\n");
1119 exit(EXIT_FAILURE);
1120 }
1121
1122 g->use_modifiers = !!(protocol_features & protocol_dmabuf2);
1123
1124 return G_SOURCE_REMOVE;
1125 }
1126
1127 static void
1128 set_gpu_protocol_features(VuGpu *g)
1129 {
1130 VhostUserGpuMsg msg = {
1131 .request = VHOST_USER_GPU_GET_PROTOCOL_FEATURES,
1132 };
1133
1134 vg_send_msg(g, &msg, -1);
1135 assert(g->wait_in == 0);
1136 g->wait_in = g_unix_fd_add(g->sock_fd, G_IO_IN | G_IO_HUP,
1137 protocol_features_cb, g);
1138 }
1139
1140 static int
1141 vg_process_msg(VuDev *dev, VhostUserMsg *msg, int *do_reply)
1142 {
1143 VuGpu *g = container_of(dev, VuGpu, dev.parent);
1144
1145 switch (msg->request) {
1146 case VHOST_USER_GPU_SET_SOCKET: {
1147 g_return_val_if_fail(msg->fd_num == 1, 1);
1148 g_return_val_if_fail(g->sock_fd == -1, 1);
1149 g->sock_fd = msg->fds[0];
1150 set_gpu_protocol_features(g);
1151 return 1;
1152 }
1153 default:
1154 return 0;
1155 }
1156
1157 return 0;
1158 }
1159
1160 static uint64_t
1161 vg_get_features(VuDev *dev)
1162 {
1163 uint64_t features = 0;
1164
1165 if (opt_virgl) {
1166 features |= 1 << VIRTIO_GPU_F_VIRGL;
1167 }
1168 features |= 1 << VIRTIO_GPU_F_EDID;
1169
1170 return features;
1171 }
1172
1173 static void
1174 vg_set_features(VuDev *dev, uint64_t features)
1175 {
1176 VuGpu *g = container_of(dev, VuGpu, dev.parent);
1177 bool virgl = features & (1 << VIRTIO_GPU_F_VIRGL);
1178
1179 if (virgl && !g->virgl_inited) {
1180 if (!vg_virgl_init(g)) {
1181 vg_panic(dev, "Failed to initialize virgl");
1182 }
1183 g->virgl_inited = true;
1184 }
1185
1186 g->edid_inited = !!(features & (1 << VIRTIO_GPU_F_EDID));
1187
1188 g->virgl = virgl;
1189 }
1190
1191 static int
1192 vg_get_config(VuDev *dev, uint8_t *config, uint32_t len)
1193 {
1194 VuGpu *g = container_of(dev, VuGpu, dev.parent);
1195
1196 if (len > sizeof(struct virtio_gpu_config)) {
1197 return -1;
1198 }
1199
1200 if (opt_virgl) {
1201 g->virtio_config.num_capsets = vg_virgl_get_num_capsets();
1202 }
1203
1204 memcpy(config, &g->virtio_config, len);
1205
1206 return 0;
1207 }
1208
1209 static int
1210 vg_set_config(VuDev *dev, const uint8_t *data,
1211 uint32_t offset, uint32_t size,
1212 uint32_t flags)
1213 {
1214 VuGpu *g = container_of(dev, VuGpu, dev.parent);
1215 struct virtio_gpu_config *config = (struct virtio_gpu_config *)data;
1216
1217 if (config->events_clear) {
1218 g->virtio_config.events_read &= ~config->events_clear;
1219 }
1220
1221 return 0;
1222 }
1223
1224 static const VuDevIface vuiface = {
1225 .set_features = vg_set_features,
1226 .get_features = vg_get_features,
1227 .queue_set_started = vg_queue_set_started,
1228 .process_msg = vg_process_msg,
1229 .get_config = vg_get_config,
1230 .set_config = vg_set_config,
1231 };
1232
1233 static void
1234 vg_destroy(VuGpu *g)
1235 {
1236 struct virtio_gpu_simple_resource *res, *tmp;
1237
1238 vug_deinit(&g->dev);
1239
1240 vg_sock_fd_close(g);
1241
1242 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
1243 vg_resource_destroy(g, res);
1244 }
1245
1246 vugbm_device_destroy(&g->gdev);
1247 }
1248
1249 static GOptionEntry entries[] = {
1250 { "print-capabilities", 'c', 0, G_OPTION_ARG_NONE, &opt_print_caps,
1251 "Print capabilities", NULL },
1252 { "fd", 'f', 0, G_OPTION_ARG_INT, &opt_fdnum,
1253 "Use inherited fd socket", "FDNUM" },
1254 { "socket-path", 's', 0, G_OPTION_ARG_FILENAME, &opt_socket_path,
1255 "Use UNIX socket path", "PATH" },
1256 { "render-node", 'r', 0, G_OPTION_ARG_FILENAME, &opt_render_node,
1257 "Specify DRM render node", "PATH" },
1258 { "virgl", 'v', 0, G_OPTION_ARG_NONE, &opt_virgl,
1259 "Turn virgl rendering on", NULL },
1260 { NULL, }
1261 };
1262
1263 int
1264 main(int argc, char *argv[])
1265 {
1266 GOptionContext *context;
1267 GError *error = NULL;
1268 GMainLoop *loop = NULL;
1269 int fd;
1270 VuGpu g = { .sock_fd = -1, .drm_rnode_fd = -1 };
1271
1272 QTAILQ_INIT(&g.reslist);
1273 QTAILQ_INIT(&g.fenceq);
1274
1275 context = g_option_context_new("QEMU vhost-user-gpu");
1276 g_option_context_add_main_entries(context, entries, NULL);
1277 if (!g_option_context_parse(context, &argc, &argv, &error)) {
1278 g_printerr("Option parsing failed: %s\n", error->message);
1279 exit(EXIT_FAILURE);
1280 }
1281 g_option_context_free(context);
1282
1283 if (opt_print_caps) {
1284 g_print("{\n");
1285 g_print(" \"type\": \"gpu\",\n");
1286 g_print(" \"features\": [\n");
1287 g_print(" \"render-node\",\n");
1288 g_print(" \"virgl\"\n");
1289 g_print(" ]\n");
1290 g_print("}\n");
1291 exit(EXIT_SUCCESS);
1292 }
1293
1294 g.drm_rnode_fd = qemu_drm_rendernode_open(opt_render_node);
1295 if (opt_render_node && g.drm_rnode_fd == -1) {
1296 g_printerr("Failed to open DRM rendernode.\n");
1297 exit(EXIT_FAILURE);
1298 }
1299
1300 vugbm_device_init(&g.gdev, g.drm_rnode_fd);
1301
1302 if ((!!opt_socket_path + (opt_fdnum != -1)) != 1) {
1303 g_printerr("Please specify either --fd or --socket-path\n");
1304 exit(EXIT_FAILURE);
1305 }
1306
1307 if (opt_socket_path) {
1308 int lsock = unix_listen(opt_socket_path, &error_fatal);
1309 if (lsock < 0) {
1310 g_printerr("Failed to listen on %s.\n", opt_socket_path);
1311 exit(EXIT_FAILURE);
1312 }
1313 fd = accept(lsock, NULL, NULL);
1314 close(lsock);
1315 } else {
1316 fd = opt_fdnum;
1317 }
1318 if (fd == -1) {
1319 g_printerr("Invalid vhost-user socket.\n");
1320 exit(EXIT_FAILURE);
1321 }
1322
1323 if (!vug_init(&g.dev, VHOST_USER_GPU_MAX_QUEUES, fd, vg_panic, &vuiface)) {
1324 g_printerr("Failed to initialize libvhost-user-glib.\n");
1325 exit(EXIT_FAILURE);
1326 }
1327
1328 loop = g_main_loop_new(NULL, FALSE);
1329 g_main_loop_run(loop);
1330 g_main_loop_unref(loop);
1331
1332 vg_destroy(&g);
1333 if (g.drm_rnode_fd >= 0) {
1334 close(g.drm_rnode_fd);
1335 }
1336
1337 return 0;
1338 }