Large file — syntax highlighting disabled.
| 1 | /* |
| 2 | * Source file for nanoMIPS disassembler component of QEMU |
| 3 | * |
| 4 | * Copyright (C) 2018 Wave Computing, Inc. |
| 5 | * Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com> |
| 6 | * Copyright (C) 2018 Aleksandar Markovic <amarkovic@wavecomp.com> |
| 7 | * |
| 8 | * This program is free software: you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation, either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program. If not, see <https://www.gnu.org/licenses/>. |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | /* |
| 24 | * Documentation used while implementing this component: |
| 25 | * |
| 26 | * [1] "MIPS® Architecture Base: nanoMIPS32(tm) Instruction Set Technical |
| 27 | * Reference Manual", Revision 01.01, April 27, 2018 |
| 28 | */ |
| 29 | |
| 30 | #include "qemu/osdep.h" |
| 31 | #include "disas/dis-asm.h" |
| 32 | |
| 33 | typedef int64_t int64; |
| 34 | typedef uint64_t uint64; |
| 35 | typedef uint32_t uint32; |
| 36 | typedef uint16_t uint16; |
| 37 | typedef uint64_t img_address; |
| 38 | |
| 39 | typedef struct Dis_info { |
| 40 | img_address m_pc; |
| 41 | fprintf_function fprintf_func; |
| 42 | FILE *stream; |
| 43 | sigjmp_buf buf; |
| 44 | } Dis_info; |
| 45 | |
| 46 | #define IMGASSERTONCE(test) |
| 47 | |
| 48 | |
| 49 | static char * G_GNUC_PRINTF(1, 2) img_format(const char *format, ...) |
| 50 | { |
| 51 | char *buffer; |
| 52 | va_list args; |
| 53 | va_start(args, format); |
| 54 | buffer = g_strdup_vprintf(format, args); |
| 55 | va_end(args); |
| 56 | return buffer; |
| 57 | } |
| 58 | |
| 59 | |
| 60 | static char *to_string(img_address a) |
| 61 | { |
| 62 | return g_strdup_printf("0x%" PRIx64, a); |
| 63 | } |
| 64 | |
| 65 | |
| 66 | static uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size) |
| 67 | { |
| 68 | return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size); |
| 69 | } |
| 70 | |
| 71 | |
| 72 | static int64 sign_extend(int64 data, int msb) |
| 73 | { |
| 74 | uint64 shift = 63 - msb; |
| 75 | return (data << shift) >> shift; |
| 76 | } |
| 77 | |
| 78 | |
| 79 | static uint64 renumber_registers(uint64 index, uint64 *register_list, |
| 80 | size_t register_list_size, Dis_info *info) |
| 81 | { |
| 82 | if (index < register_list_size) { |
| 83 | return register_list[index]; |
| 84 | } |
| 85 | |
| 86 | info->fprintf_func(info->stream, "Invalid register mapping index %" PRIu64 |
| 87 | ", size of list = %zu", index, register_list_size); |
| 88 | siglongjmp(info->buf, 1); |
| 89 | } |
| 90 | |
| 91 | |
| 92 | /* |
| 93 | * decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type |
| 94 | * |
| 95 | * Map a 4-bit code to the 5-bit register space according to this pattern: |
| 96 | * |
| 97 | * 1 0 |
| 98 | * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 99 | * | | | | | | | | | | | | | | | | |
| 100 | * | | | | | | | | | | | | | | | | |
| 101 | * | | | | | | | | | | | └---------------┐ |
| 102 | * | | | | | | | | | | └---------------┐ | |
| 103 | * | | | | | | | | | └---------------┐ | | |
| 104 | * | | | | | | | | └---------------┐ | | | |
| 105 | * | | | | | | | | | | | | | | | | |
| 106 | * | | | | | | | | | | | | | | | | |
| 107 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 108 | * 3 2 1 0 |
| 109 | * |
| 110 | * Used in handling following instructions: |
| 111 | * |
| 112 | * - ADDU[4X4] |
| 113 | * - LW[4X4] |
| 114 | * - MOVEP[REV] |
| 115 | * - MUL[4X4] |
| 116 | * - SW[4X4] |
| 117 | */ |
| 118 | static uint64 decode_gpr_gpr4(uint64 d, Dis_info *info) |
| 119 | { |
| 120 | static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7, |
| 121 | 16, 17, 18, 19, 20, 21, 22, 23 }; |
| 122 | return renumber_registers(d, register_list, |
| 123 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 124 | } |
| 125 | |
| 126 | |
| 127 | /* |
| 128 | * decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type |
| 129 | * |
| 130 | * Map a 4-bit code to the 5-bit register space according to this pattern: |
| 131 | * |
| 132 | * 1 0 |
| 133 | * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 134 | * | | | | | | | | | | | | | | | | |
| 135 | * | | | | | | | | | | | | └---------------------┐ |
| 136 | * | | | | | | | | | | | └---------------┐ | |
| 137 | * | | | | | | | | | | └---------------┐ | | |
| 138 | * | | | | | | | | | └---------------┐ | | | |
| 139 | * | | | | | | | | └---------------┐ | | | | |
| 140 | * | | | | | | | | | | | | | | | | |
| 141 | * | | | | | | | | | | | | | | | | |
| 142 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 143 | * 3 2 1 0 |
| 144 | * |
| 145 | * This pattern is the same one used for 'gpr4' gpr encoding type, except for |
| 146 | * the input value 3, that is mapped to the output value 0 instead of 11. |
| 147 | * |
| 148 | * Used in handling following instructions: |
| 149 | * |
| 150 | * - MOVE.BALC |
| 151 | * - MOVEP |
| 152 | * - SW[4X4] |
| 153 | */ |
| 154 | static uint64 decode_gpr_gpr4_zero(uint64 d, Dis_info *info) |
| 155 | { |
| 156 | static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7, |
| 157 | 16, 17, 18, 19, 20, 21, 22, 23 }; |
| 158 | return renumber_registers(d, register_list, |
| 159 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 160 | } |
| 161 | |
| 162 | |
| 163 | /* |
| 164 | * decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type |
| 165 | * |
| 166 | * Map a 3-bit code to the 5-bit register space according to this pattern: |
| 167 | * |
| 168 | * 7 6 5 4 3 2 1 0 |
| 169 | * | | | | | | | | |
| 170 | * | | | | | | | | |
| 171 | * | | | └-----------------------┐ |
| 172 | * | | └-----------------------┐ | |
| 173 | * | └-----------------------┐ | | |
| 174 | * └-----------------------┐ | | | |
| 175 | * | | | | | | | | |
| 176 | * ┌-------┘ | | | | | | | |
| 177 | * | ┌-------┘ | | | | | | |
| 178 | * | | ┌-------┘ | | | | | |
| 179 | * | | | ┌-------┘ | | | | |
| 180 | * | | | | | | | | |
| 181 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 182 | * 3 2 1 0 |
| 183 | * |
| 184 | * Used in handling following instructions: |
| 185 | * |
| 186 | * - ADDIU[R1.SP] |
| 187 | * - ADDIU[R2] |
| 188 | * - ADDU[16] |
| 189 | * - AND[16] |
| 190 | * - ANDI[16] |
| 191 | * - BEQC[16] |
| 192 | * - BEQZC[16] |
| 193 | * - BNEC[16] |
| 194 | * - BNEZC[16] |
| 195 | * - LB[16] |
| 196 | * - LBU[16] |
| 197 | * - LH[16] |
| 198 | * - LHU[16] |
| 199 | * - LI[16] |
| 200 | * - LW[16] |
| 201 | * - LW[GP16] |
| 202 | * - LWXS[16] |
| 203 | * - NOT[16] |
| 204 | * - OR[16] |
| 205 | * - SB[16] |
| 206 | * - SH[16] |
| 207 | * - SLL[16] |
| 208 | * - SRL[16] |
| 209 | * - SUBU[16] |
| 210 | * - SW[16] |
| 211 | * - XOR[16] |
| 212 | */ |
| 213 | static uint64 decode_gpr_gpr3(uint64 d, Dis_info *info) |
| 214 | { |
| 215 | static uint64 register_list[] = { 16, 17, 18, 19, 4, 5, 6, 7 }; |
| 216 | return renumber_registers(d, register_list, |
| 217 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 218 | } |
| 219 | |
| 220 | |
| 221 | /* |
| 222 | * decode_gpr_gpr3_src_store() - decoder for 'gpr3.src.store' gpr encoding |
| 223 | * type |
| 224 | * |
| 225 | * Map a 3-bit code to the 5-bit register space according to this pattern: |
| 226 | * |
| 227 | * 7 6 5 4 3 2 1 0 |
| 228 | * | | | | | | | | |
| 229 | * | | | | | | | └-----------------------┐ |
| 230 | * | | | └-----------------------┐ | |
| 231 | * | | └-----------------------┐ | | |
| 232 | * | └-----------------------┐ | | | |
| 233 | * └-----------------------┐ | | | | |
| 234 | * | | | | | | | | |
| 235 | * ┌-------┘ | | | | | | | |
| 236 | * | ┌-------┘ | | | | | | |
| 237 | * | | ┌-------┘ | | | | | |
| 238 | * | | | | | | | | |
| 239 | * | | | | | | | | |
| 240 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 241 | * 3 2 1 0 |
| 242 | * |
| 243 | * This pattern is the same one used for 'gpr3' gpr encoding type, except for |
| 244 | * the input value 0, that is mapped to the output value 0 instead of 16. |
| 245 | * |
| 246 | * Used in handling following instructions: |
| 247 | * |
| 248 | * - SB[16] |
| 249 | * - SH[16] |
| 250 | * - SW[16] |
| 251 | * - SW[GP16] |
| 252 | */ |
| 253 | static uint64 decode_gpr_gpr3_src_store(uint64 d, Dis_info *info) |
| 254 | { |
| 255 | static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 }; |
| 256 | return renumber_registers(d, register_list, |
| 257 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 258 | } |
| 259 | |
| 260 | |
| 261 | /* |
| 262 | * decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type |
| 263 | * |
| 264 | * Map a 2-bit code to the 5-bit register space according to this pattern: |
| 265 | * |
| 266 | * 3 2 1 0 |
| 267 | * | | | | |
| 268 | * | | | | |
| 269 | * | | | └-------------------┐ |
| 270 | * | | └-------------------┐ | |
| 271 | * | └-------------------┐ | | |
| 272 | * └-------------------┐ | | | |
| 273 | * | | | | |
| 274 | * | | | | |
| 275 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 276 | * 3 2 1 0 |
| 277 | * |
| 278 | * Used in handling following instructions: |
| 279 | * |
| 280 | * - MOVEP |
| 281 | * - MOVEP[REV] |
| 282 | */ |
| 283 | static uint64 decode_gpr_gpr2_reg1(uint64 d, Dis_info *info) |
| 284 | { |
| 285 | static uint64 register_list[] = { 4, 5, 6, 7 }; |
| 286 | return renumber_registers(d, register_list, |
| 287 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 288 | } |
| 289 | |
| 290 | |
| 291 | /* |
| 292 | * decode_gpr_gpr2_reg2() - decoder for 'gpr2.reg2' gpr encoding type |
| 293 | * |
| 294 | * Map a 2-bit code to the 5-bit register space according to this pattern: |
| 295 | * |
| 296 | * 3 2 1 0 |
| 297 | * | | | | |
| 298 | * | | | | |
| 299 | * | | | └-----------------┐ |
| 300 | * | | └-----------------┐ | |
| 301 | * | └-----------------┐ | | |
| 302 | * └-----------------┐ | | | |
| 303 | * | | | | |
| 304 | * | | | | |
| 305 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 306 | * 3 2 1 0 |
| 307 | * |
| 308 | * Used in handling following instructions: |
| 309 | * |
| 310 | * - MOVEP |
| 311 | * - MOVEP[REV] |
| 312 | */ |
| 313 | static uint64 decode_gpr_gpr2_reg2(uint64 d, Dis_info *info) |
| 314 | { |
| 315 | static uint64 register_list[] = { 5, 6, 7, 8 }; |
| 316 | return renumber_registers(d, register_list, |
| 317 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 318 | } |
| 319 | |
| 320 | |
| 321 | /* |
| 322 | * decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type |
| 323 | * |
| 324 | * Map a 1-bit code to the 5-bit register space according to this pattern: |
| 325 | * |
| 326 | * 1 0 |
| 327 | * | | |
| 328 | * | | |
| 329 | * | └---------------------┐ |
| 330 | * └---------------------┐ | |
| 331 | * | | |
| 332 | * | | |
| 333 | * | | |
| 334 | * | | |
| 335 | * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 |
| 336 | * 3 2 1 0 |
| 337 | * |
| 338 | * Used in handling following instruction: |
| 339 | * |
| 340 | * - MOVE.BALC |
| 341 | */ |
| 342 | static uint64 decode_gpr_gpr1(uint64 d, Dis_info *info) |
| 343 | { |
| 344 | static uint64 register_list[] = { 4, 5 }; |
| 345 | return renumber_registers(d, register_list, |
| 346 | sizeof(register_list) / sizeof(register_list[0]), info); |
| 347 | } |
| 348 | |
| 349 | |
| 350 | static int64 neg_copy(uint64 d) |
| 351 | { |
| 352 | return 0ll - d; |
| 353 | } |
| 354 | |
| 355 | |
| 356 | static uint64 encode_count3_from_count(uint64 d) |
| 357 | { |
| 358 | IMGASSERTONCE(d < 8); |
| 359 | return d == 0ull ? 8ull : d; |
| 360 | } |
| 361 | |
| 362 | |
| 363 | static uint64 encode_shift3_from_shift(uint64 d) |
| 364 | { |
| 365 | IMGASSERTONCE(d < 8); |
| 366 | return d == 0ull ? 8ull : d; |
| 367 | } |
| 368 | |
| 369 | |
| 370 | /* special value for load literal */ |
| 371 | static int64 encode_eu_from_s_li16(uint64 d) |
| 372 | { |
| 373 | IMGASSERTONCE(d < 128); |
| 374 | return d == 127 ? -1 : (int64)d; |
| 375 | } |
| 376 | |
| 377 | |
| 378 | static uint64 encode_msbd_from_size(uint64 d) |
| 379 | { |
| 380 | IMGASSERTONCE(d < 32); |
| 381 | return d + 1; |
| 382 | } |
| 383 | |
| 384 | |
| 385 | static uint64 encode_eu_from_u_andi16(uint64 d) |
| 386 | { |
| 387 | IMGASSERTONCE(d < 16); |
| 388 | if (d == 12) { |
| 389 | return 0x00ffull; |
| 390 | } |
| 391 | if (d == 13) { |
| 392 | return 0xffffull; |
| 393 | } |
| 394 | return d; |
| 395 | } |
| 396 | |
| 397 | |
| 398 | /* save16 / restore16 ???? */ |
| 399 | static uint64 encode_rt1_from_rt(uint64 d) |
| 400 | { |
| 401 | return d ? 31 : 30; |
| 402 | } |
| 403 | |
| 404 | |
| 405 | static const char *GPR(uint64 reg, Dis_info *info) |
| 406 | { |
| 407 | static const char *gpr_reg[32] = { |
| 408 | "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", |
| 409 | "a4", "a5", "a6", "a7", "r12", "r13", "r14", "r15", |
| 410 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", |
| 411 | "r24", "r25", "k0", "k1", "gp", "sp", "fp", "ra" |
| 412 | }; |
| 413 | |
| 414 | if (reg < 32) { |
| 415 | return gpr_reg[reg]; |
| 416 | } |
| 417 | |
| 418 | info->fprintf_func(info->stream, "Invalid GPR register index %" PRIu64, |
| 419 | reg); |
| 420 | siglongjmp(info->buf, 1); |
| 421 | } |
| 422 | |
| 423 | |
| 424 | static char *save_restore_list(uint64 rt, uint64 count, uint64 gp, |
| 425 | Dis_info *info) |
| 426 | { |
| 427 | char *reg_list[34]; |
| 428 | reg_list[0] = (char *)""; |
| 429 | |
| 430 | assert(count <= 32); |
| 431 | for (uint64 counter = 0; counter != count; counter++) { |
| 432 | bool use_gp = gp && (counter == count - 1); |
| 433 | uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f; |
| 434 | /* glib usage below requires casting away const */ |
| 435 | reg_list[counter + 1] = (char *)GPR(this_rt, info); |
| 436 | } |
| 437 | reg_list[count + 1] = NULL; |
| 438 | |
| 439 | return g_strjoinv(",", reg_list); |
| 440 | } |
| 441 | |
| 442 | |
| 443 | static const char *FPR(uint64 reg, Dis_info *info) |
| 444 | { |
| 445 | static const char *fpr_reg[32] = { |
| 446 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", |
| 447 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", |
| 448 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", |
| 449 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" |
| 450 | }; |
| 451 | |
| 452 | if (reg < 32) { |
| 453 | return fpr_reg[reg]; |
| 454 | } |
| 455 | |
| 456 | info->fprintf_func(info->stream, "Invalid FPR register index %" PRIu64, |
| 457 | reg); |
| 458 | siglongjmp(info->buf, 1); |
| 459 | } |
| 460 | |
| 461 | |
| 462 | static const char *AC(uint64 reg, Dis_info *info) |
| 463 | { |
| 464 | static const char *ac_reg[4] = { |
| 465 | "ac0", "ac1", "ac2", "ac3" |
| 466 | }; |
| 467 | |
| 468 | if (reg < 4) { |
| 469 | return ac_reg[reg]; |
| 470 | } |
| 471 | |
| 472 | info->fprintf_func(info->stream, "Invalid AC register index %" PRIu64, |
| 473 | reg); |
| 474 | siglongjmp(info->buf, 1); |
| 475 | } |
| 476 | |
| 477 | |
| 478 | static char *ADDRESS(uint64 value, int instruction_size, Dis_info *info) |
| 479 | { |
| 480 | /* token for string replace */ |
| 481 | img_address address = info->m_pc + value + instruction_size; |
| 482 | /* symbol replacement */ |
| 483 | return to_string(address); |
| 484 | } |
| 485 | |
| 486 | |
| 487 | static uint64 extract_op_code_value(const uint16 *data, int size) |
| 488 | { |
| 489 | switch (size) { |
| 490 | case 16: |
| 491 | return data[0]; |
| 492 | case 32: |
| 493 | return ((uint64)data[0] << 16) | data[1]; |
| 494 | case 48: |
| 495 | return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2]; |
| 496 | default: |
| 497 | return data[0]; |
| 498 | } |
| 499 | } |
| 500 | |
| 501 | |
| 502 | static uint64 extract_code_18_to_0(uint64 instruction) |
| 503 | { |
| 504 | uint64 value = 0; |
| 505 | value |= extract_bits(instruction, 0, 19); |
| 506 | return value; |
| 507 | } |
| 508 | |
| 509 | |
| 510 | static uint64 extract_shift3_2_1_0(uint64 instruction) |
| 511 | { |
| 512 | uint64 value = 0; |
| 513 | value |= extract_bits(instruction, 0, 3); |
| 514 | return value; |
| 515 | } |
| 516 | |
| 517 | |
| 518 | static uint64 extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction) |
| 519 | { |
| 520 | uint64 value = 0; |
| 521 | value |= extract_bits(instruction, 3, 9) << 3; |
| 522 | return value; |
| 523 | } |
| 524 | |
| 525 | |
| 526 | static uint64 extract_count_3_2_1_0(uint64 instruction) |
| 527 | { |
| 528 | uint64 value = 0; |
| 529 | value |= extract_bits(instruction, 0, 4); |
| 530 | return value; |
| 531 | } |
| 532 | |
| 533 | |
| 534 | static uint64 extract_rtz3_9_8_7(uint64 instruction) |
| 535 | { |
| 536 | uint64 value = 0; |
| 537 | value |= extract_bits(instruction, 7, 3); |
| 538 | return value; |
| 539 | } |
| 540 | |
| 541 | |
| 542 | static uint64 extract_u_17_to_1__s1(uint64 instruction) |
| 543 | { |
| 544 | uint64 value = 0; |
| 545 | value |= extract_bits(instruction, 1, 17) << 1; |
| 546 | return value; |
| 547 | } |
| 548 | |
| 549 | |
| 550 | static int64 extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction) |
| 551 | { |
| 552 | int64 value = 0; |
| 553 | value |= extract_bits(instruction, 11, 10); |
| 554 | value = sign_extend(value, 9); |
| 555 | return value; |
| 556 | } |
| 557 | |
| 558 | |
| 559 | static int64 extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction) |
| 560 | { |
| 561 | int64 value = 0; |
| 562 | value |= extract_bits(instruction, 0, 1) << 11; |
| 563 | value |= extract_bits(instruction, 1, 10) << 1; |
| 564 | value = sign_extend(value, 11); |
| 565 | return value; |
| 566 | } |
| 567 | |
| 568 | |
| 569 | static uint64 extract_u_10(uint64 instruction) |
| 570 | { |
| 571 | uint64 value = 0; |
| 572 | value |= extract_bits(instruction, 10, 1); |
| 573 | return value; |
| 574 | } |
| 575 | |
| 576 | |
| 577 | static uint64 extract_rtz4_27_26_25_23_22_21(uint64 instruction) |
| 578 | { |
| 579 | uint64 value = 0; |
| 580 | value |= extract_bits(instruction, 21, 3); |
| 581 | value |= extract_bits(instruction, 25, 1) << 3; |
| 582 | return value; |
| 583 | } |
| 584 | |
| 585 | |
| 586 | static uint64 extract_sa_15_14_13_12_11(uint64 instruction) |
| 587 | { |
| 588 | uint64 value = 0; |
| 589 | value |= extract_bits(instruction, 11, 5); |
| 590 | return value; |
| 591 | } |
| 592 | |
| 593 | |
| 594 | static uint64 extract_shift_4_3_2_1_0(uint64 instruction) |
| 595 | { |
| 596 | uint64 value = 0; |
| 597 | value |= extract_bits(instruction, 0, 5); |
| 598 | return value; |
| 599 | } |
| 600 | |
| 601 | |
| 602 | static uint64 extract_shiftx_10_9_8_7__s1(uint64 instruction) |
| 603 | { |
| 604 | uint64 value = 0; |
| 605 | value |= extract_bits(instruction, 7, 4) << 1; |
| 606 | return value; |
| 607 | } |
| 608 | |
| 609 | |
| 610 | static uint64 extract_hint_25_24_23_22_21(uint64 instruction) |
| 611 | { |
| 612 | uint64 value = 0; |
| 613 | value |= extract_bits(instruction, 21, 5); |
| 614 | return value; |
| 615 | } |
| 616 | |
| 617 | |
| 618 | static uint64 extract_count3_14_13_12(uint64 instruction) |
| 619 | { |
| 620 | uint64 value = 0; |
| 621 | value |= extract_bits(instruction, 12, 3); |
| 622 | return value; |
| 623 | } |
| 624 | |
| 625 | |
| 626 | static int64 extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction) |
| 627 | { |
| 628 | int64 value = 0; |
| 629 | value |= extract_bits(instruction, 0, 1) << 31; |
| 630 | value |= extract_bits(instruction, 2, 10) << 21; |
| 631 | value |= extract_bits(instruction, 12, 9) << 12; |
| 632 | value = sign_extend(value, 31); |
| 633 | return value; |
| 634 | } |
| 635 | |
| 636 | |
| 637 | static int64 extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction) |
| 638 | { |
| 639 | int64 value = 0; |
| 640 | value |= extract_bits(instruction, 0, 1) << 7; |
| 641 | value |= extract_bits(instruction, 1, 6) << 1; |
| 642 | value = sign_extend(value, 7); |
| 643 | return value; |
| 644 | } |
| 645 | |
| 646 | |
| 647 | static uint64 extract_u2_10_9(uint64 instruction) |
| 648 | { |
| 649 | uint64 value = 0; |
| 650 | value |= extract_bits(instruction, 9, 2); |
| 651 | return value; |
| 652 | } |
| 653 | |
| 654 | |
| 655 | static uint64 extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction) |
| 656 | { |
| 657 | uint64 value = 0; |
| 658 | value |= extract_bits(instruction, 16, 10); |
| 659 | return value; |
| 660 | } |
| 661 | |
| 662 | |
| 663 | static uint64 extract_rs_20_19_18_17_16(uint64 instruction) |
| 664 | { |
| 665 | uint64 value = 0; |
| 666 | value |= extract_bits(instruction, 16, 5); |
| 667 | return value; |
| 668 | } |
| 669 | |
| 670 | |
| 671 | static uint64 extract_u_2_1__s1(uint64 instruction) |
| 672 | { |
| 673 | uint64 value = 0; |
| 674 | value |= extract_bits(instruction, 1, 2) << 1; |
| 675 | return value; |
| 676 | } |
| 677 | |
| 678 | |
| 679 | static uint64 extract_stripe_6(uint64 instruction) |
| 680 | { |
| 681 | uint64 value = 0; |
| 682 | value |= extract_bits(instruction, 6, 1); |
| 683 | return value; |
| 684 | } |
| 685 | |
| 686 | |
| 687 | static uint64 extract_ac_15_14(uint64 instruction) |
| 688 | { |
| 689 | uint64 value = 0; |
| 690 | value |= extract_bits(instruction, 14, 2); |
| 691 | return value; |
| 692 | } |
| 693 | |
| 694 | |
| 695 | static uint64 extract_shift_20_19_18_17_16(uint64 instruction) |
| 696 | { |
| 697 | uint64 value = 0; |
| 698 | value |= extract_bits(instruction, 16, 5); |
| 699 | return value; |
| 700 | } |
| 701 | |
| 702 | |
| 703 | static uint64 extract_rdl_25_24(uint64 instruction) |
| 704 | { |
| 705 | uint64 value = 0; |
| 706 | value |= extract_bits(instruction, 24, 1); |
| 707 | return value; |
| 708 | } |
| 709 | |
| 710 | |
| 711 | static int64 extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction) |
| 712 | { |
| 713 | int64 value = 0; |
| 714 | value |= extract_bits(instruction, 0, 1) << 10; |
| 715 | value |= extract_bits(instruction, 1, 9) << 1; |
| 716 | value = sign_extend(value, 10); |
| 717 | return value; |
| 718 | } |
| 719 | |
| 720 | |
| 721 | static uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction) |
| 722 | { |
| 723 | uint64 value = 0; |
| 724 | value |= extract_bits(instruction, 0, 7); |
| 725 | return value; |
| 726 | } |
| 727 | |
| 728 | |
| 729 | static uint64 extract_shift_5_4_3_2_1_0(uint64 instruction) |
| 730 | { |
| 731 | uint64 value = 0; |
| 732 | value |= extract_bits(instruction, 0, 6); |
| 733 | return value; |
| 734 | } |
| 735 | |
| 736 | |
| 737 | static uint64 extract_count_19_18_17_16(uint64 instruction) |
| 738 | { |
| 739 | uint64 value = 0; |
| 740 | value |= extract_bits(instruction, 16, 4); |
| 741 | return value; |
| 742 | } |
| 743 | |
| 744 | |
| 745 | static uint64 extract_code_2_1_0(uint64 instruction) |
| 746 | { |
| 747 | uint64 value = 0; |
| 748 | value |= extract_bits(instruction, 0, 3); |
| 749 | return value; |
| 750 | } |
| 751 | |
| 752 | |
| 753 | static uint64 extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction) |
| 754 | { |
| 755 | uint64 value = 0; |
| 756 | value |= extract_bits(instruction, 0, 12); |
| 757 | return value; |
| 758 | } |
| 759 | |
| 760 | |
| 761 | static uint64 extract_rs_4_3_2_1_0(uint64 instruction) |
| 762 | { |
| 763 | uint64 value = 0; |
| 764 | value |= extract_bits(instruction, 0, 5); |
| 765 | return value; |
| 766 | } |
| 767 | |
| 768 | |
| 769 | static uint64 extract_u_20_to_3__s3(uint64 instruction) |
| 770 | { |
| 771 | uint64 value = 0; |
| 772 | value |= extract_bits(instruction, 3, 18) << 3; |
| 773 | return value; |
| 774 | } |
| 775 | |
| 776 | |
| 777 | static uint64 extract_u_3_2_1_0__s2(uint64 instruction) |
| 778 | { |
| 779 | uint64 value = 0; |
| 780 | value |= extract_bits(instruction, 0, 4) << 2; |
| 781 | return value; |
| 782 | } |
| 783 | |
| 784 | |
| 785 | static uint64 extract_cofun_25_24_23(uint64 instruction) |
| 786 | { |
| 787 | uint64 value = 0; |
| 788 | value |= extract_bits(instruction, 3, 23); |
| 789 | return value; |
| 790 | } |
| 791 | |
| 792 | |
| 793 | static uint64 extract_u_2_1_0__s2(uint64 instruction) |
| 794 | { |
| 795 | uint64 value = 0; |
| 796 | value |= extract_bits(instruction, 0, 3) << 2; |
| 797 | return value; |
| 798 | } |
| 799 | |
| 800 | |
| 801 | static uint64 extract_rd3_3_2_1(uint64 instruction) |
| 802 | { |
| 803 | uint64 value = 0; |
| 804 | value |= extract_bits(instruction, 1, 3); |
| 805 | return value; |
| 806 | } |
| 807 | |
| 808 | |
| 809 | static uint64 extract_sa_15_14_13_12(uint64 instruction) |
| 810 | { |
| 811 | uint64 value = 0; |
| 812 | value |= extract_bits(instruction, 12, 4); |
| 813 | return value; |
| 814 | } |
| 815 | |
| 816 | |
| 817 | static uint64 extract_rt_25_24_23_22_21(uint64 instruction) |
| 818 | { |
| 819 | uint64 value = 0; |
| 820 | value |= extract_bits(instruction, 21, 5); |
| 821 | return value; |
| 822 | } |
| 823 | |
| 824 | |
| 825 | static uint64 extract_ru_7_6_5_4_3(uint64 instruction) |
| 826 | { |
| 827 | uint64 value = 0; |
| 828 | value |= extract_bits(instruction, 3, 5); |
| 829 | return value; |
| 830 | } |
| 831 | |
| 832 | |
| 833 | static uint64 extract_u_17_to_0(uint64 instruction) |
| 834 | { |
| 835 | uint64 value = 0; |
| 836 | value |= extract_bits(instruction, 0, 18); |
| 837 | return value; |
| 838 | } |
| 839 | |
| 840 | |
| 841 | static uint64 extract_rsz4_4_2_1_0(uint64 instruction) |
| 842 | { |
| 843 | uint64 value = 0; |
| 844 | value |= extract_bits(instruction, 0, 3); |
| 845 | value |= extract_bits(instruction, 4, 1) << 3; |
| 846 | return value; |
| 847 | } |
| 848 | |
| 849 | |
| 850 | static int64 extract_s__se21_0_20_to_1_s1(uint64 instruction) |
| 851 | { |
| 852 | int64 value = 0; |
| 853 | value |= extract_bits(instruction, 0, 1) << 21; |
| 854 | value |= extract_bits(instruction, 1, 20) << 1; |
| 855 | value = sign_extend(value, 21); |
| 856 | return value; |
| 857 | } |
| 858 | |
| 859 | |
| 860 | static uint64 extract_op_25_to_3(uint64 instruction) |
| 861 | { |
| 862 | uint64 value = 0; |
| 863 | value |= extract_bits(instruction, 3, 23); |
| 864 | return value; |
| 865 | } |
| 866 | |
| 867 | |
| 868 | static uint64 extract_rs4_4_2_1_0(uint64 instruction) |
| 869 | { |
| 870 | uint64 value = 0; |
| 871 | value |= extract_bits(instruction, 0, 3); |
| 872 | value |= extract_bits(instruction, 4, 1) << 3; |
| 873 | return value; |
| 874 | } |
| 875 | |
| 876 | |
| 877 | static uint64 extract_bit_23_22_21(uint64 instruction) |
| 878 | { |
| 879 | uint64 value = 0; |
| 880 | value |= extract_bits(instruction, 21, 3); |
| 881 | return value; |
| 882 | } |
| 883 | |
| 884 | |
| 885 | static uint64 extract_rt_41_40_39_38_37(uint64 instruction) |
| 886 | { |
| 887 | uint64 value = 0; |
| 888 | value |= extract_bits(instruction, 37, 5); |
| 889 | return value; |
| 890 | } |
| 891 | |
| 892 | |
| 893 | static int64 extract_shift__se5_21_20_19_18_17_16(uint64 instruction) |
| 894 | { |
| 895 | int64 value = 0; |
| 896 | value |= extract_bits(instruction, 16, 6); |
| 897 | value = sign_extend(value, 5); |
| 898 | return value; |
| 899 | } |
| 900 | |
| 901 | |
| 902 | static uint64 extract_rd2_3_8(uint64 instruction) |
| 903 | { |
| 904 | uint64 value = 0; |
| 905 | value |= extract_bits(instruction, 3, 1) << 1; |
| 906 | value |= extract_bits(instruction, 8, 1); |
| 907 | return value; |
| 908 | } |
| 909 | |
| 910 | |
| 911 | static uint64 extract_code_17_to_0(uint64 instruction) |
| 912 | { |
| 913 | uint64 value = 0; |
| 914 | value |= extract_bits(instruction, 0, 18); |
| 915 | return value; |
| 916 | } |
| 917 | |
| 918 | |
| 919 | static uint64 extract_size_20_19_18_17_16(uint64 instruction) |
| 920 | { |
| 921 | uint64 value = 0; |
| 922 | value |= extract_bits(instruction, 16, 5); |
| 923 | return value; |
| 924 | } |
| 925 | |
| 926 | |
| 927 | static int64 extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction) |
| 928 | { |
| 929 | int64 value = 0; |
| 930 | value |= extract_bits(instruction, 2, 6) << 2; |
| 931 | value |= extract_bits(instruction, 15, 1) << 8; |
| 932 | value = sign_extend(value, 8); |
| 933 | return value; |
| 934 | } |
| 935 | |
| 936 | |
| 937 | static uint64 extract_u_15_to_0(uint64 instruction) |
| 938 | { |
| 939 | uint64 value = 0; |
| 940 | value |= extract_bits(instruction, 0, 16); |
| 941 | return value; |
| 942 | } |
| 943 | |
| 944 | |
| 945 | static uint64 extract_fs_20_19_18_17_16(uint64 instruction) |
| 946 | { |
| 947 | uint64 value = 0; |
| 948 | value |= extract_bits(instruction, 16, 5); |
| 949 | return value; |
| 950 | } |
| 951 | |
| 952 | |
| 953 | static int64 extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction) |
| 954 | { |
| 955 | int64 value = 0; |
| 956 | value |= extract_bits(instruction, 0, 8); |
| 957 | value |= extract_bits(instruction, 15, 1) << 8; |
| 958 | value = sign_extend(value, 8); |
| 959 | return value; |
| 960 | } |
| 961 | |
| 962 | |
| 963 | static uint64 extract_stype_20_19_18_17_16(uint64 instruction) |
| 964 | { |
| 965 | uint64 value = 0; |
| 966 | value |= extract_bits(instruction, 16, 5); |
| 967 | return value; |
| 968 | } |
| 969 | |
| 970 | |
| 971 | static uint64 extract_rtl_11(uint64 instruction) |
| 972 | { |
| 973 | uint64 value = 0; |
| 974 | value |= extract_bits(instruction, 9, 1); |
| 975 | return value; |
| 976 | } |
| 977 | |
| 978 | |
| 979 | static uint64 extract_hs_20_19_18_17_16(uint64 instruction) |
| 980 | { |
| 981 | uint64 value = 0; |
| 982 | value |= extract_bits(instruction, 16, 5); |
| 983 | return value; |
| 984 | } |
| 985 | |
| 986 | |
| 987 | static uint64 extract_sel_13_12_11(uint64 instruction) |
| 988 | { |
| 989 | uint64 value = 0; |
| 990 | value |= extract_bits(instruction, 11, 3); |
| 991 | return value; |
| 992 | } |
| 993 | |
| 994 | |
| 995 | static uint64 extract_lsb_4_3_2_1_0(uint64 instruction) |
| 996 | { |
| 997 | uint64 value = 0; |
| 998 | value |= extract_bits(instruction, 0, 5); |
| 999 | return value; |
| 1000 | } |
| 1001 | |
| 1002 | |
| 1003 | static uint64 extract_gp_2(uint64 instruction) |
| 1004 | { |
| 1005 | uint64 value = 0; |
| 1006 | value |= extract_bits(instruction, 2, 1); |
| 1007 | return value; |
| 1008 | } |
| 1009 | |
| 1010 | |
| 1011 | static uint64 extract_rt3_9_8_7(uint64 instruction) |
| 1012 | { |
| 1013 | uint64 value = 0; |
| 1014 | value |= extract_bits(instruction, 7, 3); |
| 1015 | return value; |
| 1016 | } |
| 1017 | |
| 1018 | |
| 1019 | static uint64 extract_ft_25_24_23_22_21(uint64 instruction) |
| 1020 | { |
| 1021 | uint64 value = 0; |
| 1022 | value |= extract_bits(instruction, 21, 5); |
| 1023 | return value; |
| 1024 | } |
| 1025 | |
| 1026 | |
| 1027 | static uint64 extract_u_17_16_15_14_13_12_11(uint64 instruction) |
| 1028 | { |
| 1029 | uint64 value = 0; |
| 1030 | value |= extract_bits(instruction, 11, 7); |
| 1031 | return value; |
| 1032 | } |
| 1033 | |
| 1034 | |
| 1035 | static uint64 extract_cs_20_19_18_17_16(uint64 instruction) |
| 1036 | { |
| 1037 | uint64 value = 0; |
| 1038 | value |= extract_bits(instruction, 16, 5); |
| 1039 | return value; |
| 1040 | } |
| 1041 | |
| 1042 | |
| 1043 | static uint64 extract_rt4_9_7_6_5(uint64 instruction) |
| 1044 | { |
| 1045 | uint64 value = 0; |
| 1046 | value |= extract_bits(instruction, 5, 3); |
| 1047 | value |= extract_bits(instruction, 9, 1) << 3; |
| 1048 | return value; |
| 1049 | } |
| 1050 | |
| 1051 | |
| 1052 | static uint64 extract_msbt_10_9_8_7_6(uint64 instruction) |
| 1053 | { |
| 1054 | uint64 value = 0; |
| 1055 | value |= extract_bits(instruction, 6, 5); |
| 1056 | return value; |
| 1057 | } |
| 1058 | |
| 1059 | |
| 1060 | static uint64 extract_u_5_4_3_2_1_0__s2(uint64 instruction) |
| 1061 | { |
| 1062 | uint64 value = 0; |
| 1063 | value |= extract_bits(instruction, 0, 6) << 2; |
| 1064 | return value; |
| 1065 | } |
| 1066 | |
| 1067 | |
| 1068 | static uint64 extract_sa_15_14_13(uint64 instruction) |
| 1069 | { |
| 1070 | uint64 value = 0; |
| 1071 | value |= extract_bits(instruction, 13, 3); |
| 1072 | return value; |
| 1073 | } |
| 1074 | |
| 1075 | |
| 1076 | static int64 extract_s__se14_0_13_to_1_s1(uint64 instruction) |
| 1077 | { |
| 1078 | int64 value = 0; |
| 1079 | value |= extract_bits(instruction, 0, 1) << 14; |
| 1080 | value |= extract_bits(instruction, 1, 13) << 1; |
| 1081 | value = sign_extend(value, 14); |
| 1082 | return value; |
| 1083 | } |
| 1084 | |
| 1085 | |
| 1086 | static uint64 extract_rs3_6_5_4(uint64 instruction) |
| 1087 | { |
| 1088 | uint64 value = 0; |
| 1089 | value |= extract_bits(instruction, 4, 3); |
| 1090 | return value; |
| 1091 | } |
| 1092 | |
| 1093 | |
| 1094 | static uint64 extract_u_31_to_0__s32(uint64 instruction) |
| 1095 | { |
| 1096 | uint64 value = 0; |
| 1097 | value |= extract_bits(instruction, 0, 32) << 32; |
| 1098 | return value; |
| 1099 | } |
| 1100 | |
| 1101 | |
| 1102 | static uint64 extract_shift_10_9_8_7_6(uint64 instruction) |
| 1103 | { |
| 1104 | uint64 value = 0; |
| 1105 | value |= extract_bits(instruction, 6, 5); |
| 1106 | return value; |
| 1107 | } |
| 1108 | |
| 1109 | |
| 1110 | static uint64 extract_cs_25_24_23_22_21(uint64 instruction) |
| 1111 | { |
| 1112 | uint64 value = 0; |
| 1113 | value |= extract_bits(instruction, 21, 5); |
| 1114 | return value; |
| 1115 | } |
| 1116 | |
| 1117 | |
| 1118 | static uint64 extract_shiftx_11_10_9_8_7_6(uint64 instruction) |
| 1119 | { |
| 1120 | uint64 value = 0; |
| 1121 | value |= extract_bits(instruction, 6, 6); |
| 1122 | return value; |
| 1123 | } |
| 1124 | |
| 1125 | |
| 1126 | static uint64 extract_rt_9_8_7_6_5(uint64 instruction) |
| 1127 | { |
| 1128 | uint64 value = 0; |
| 1129 | value |= extract_bits(instruction, 5, 5); |
| 1130 | return value; |
| 1131 | } |
| 1132 | |
| 1133 | |
| 1134 | static uint64 extract_op_25_24_23_22_21(uint64 instruction) |
| 1135 | { |
| 1136 | uint64 value = 0; |
| 1137 | value |= extract_bits(instruction, 21, 5); |
| 1138 | return value; |
| 1139 | } |
| 1140 | |
| 1141 | |
| 1142 | static uint64 extract_u_6_5_4_3_2_1_0__s2(uint64 instruction) |
| 1143 | { |
| 1144 | uint64 value = 0; |
| 1145 | value |= extract_bits(instruction, 0, 7) << 2; |
| 1146 | return value; |
| 1147 | } |
| 1148 | |
| 1149 | |
| 1150 | static uint64 extract_bit_16_15_14_13_12_11(uint64 instruction) |
| 1151 | { |
| 1152 | uint64 value = 0; |
| 1153 | value |= extract_bits(instruction, 11, 6); |
| 1154 | return value; |
| 1155 | } |
| 1156 | |
| 1157 | |
| 1158 | static uint64 extract_mask_20_19_18_17_16_15_14(uint64 instruction) |
| 1159 | { |
| 1160 | uint64 value = 0; |
| 1161 | value |= extract_bits(instruction, 14, 7); |
| 1162 | return value; |
| 1163 | } |
| 1164 | |
| 1165 | |
| 1166 | static uint64 extract_eu_3_2_1_0(uint64 instruction) |
| 1167 | { |
| 1168 | uint64 value = 0; |
| 1169 | value |= extract_bits(instruction, 0, 4); |
| 1170 | return value; |
| 1171 | } |
| 1172 | |
| 1173 | |
| 1174 | static uint64 extract_u_7_6_5_4__s4(uint64 instruction) |
| 1175 | { |
| 1176 | uint64 value = 0; |
| 1177 | value |= extract_bits(instruction, 4, 4) << 4; |
| 1178 | return value; |
| 1179 | } |
| 1180 | |
| 1181 | |
| 1182 | static int64 extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction) |
| 1183 | { |
| 1184 | int64 value = 0; |
| 1185 | value |= extract_bits(instruction, 3, 5) << 3; |
| 1186 | value |= extract_bits(instruction, 15, 1) << 8; |
| 1187 | value = sign_extend(value, 8); |
| 1188 | return value; |
| 1189 | } |
| 1190 | |
| 1191 | |
| 1192 | static uint64 extract_ft_15_14_13_12_11(uint64 instruction) |
| 1193 | { |
| 1194 | uint64 value = 0; |
| 1195 | value |= extract_bits(instruction, 11, 5); |
| 1196 | return value; |
| 1197 | } |
| 1198 | |
| 1199 | |
| 1200 | static int64 extract_s__se31_15_to_0_31_to_16(uint64 instruction) |
| 1201 | { |
| 1202 | int64 value = 0; |
| 1203 | value |= extract_bits(instruction, 0, 16) << 16; |
| 1204 | value |= extract_bits(instruction, 16, 16); |
| 1205 | value = sign_extend(value, 31); |
| 1206 | return value; |
| 1207 | } |
| 1208 | |
| 1209 | |
| 1210 | static uint64 extract_u_20_19_18_17_16_15_14_13(uint64 instruction) |
| 1211 | { |
| 1212 | uint64 value = 0; |
| 1213 | value |= extract_bits(instruction, 13, 8); |
| 1214 | return value; |
| 1215 | } |
| 1216 | |
| 1217 | |
| 1218 | static uint64 extract_u_17_to_2__s2(uint64 instruction) |
| 1219 | { |
| 1220 | uint64 value = 0; |
| 1221 | value |= extract_bits(instruction, 2, 16) << 2; |
| 1222 | return value; |
| 1223 | } |
| 1224 | |
| 1225 | |
| 1226 | static uint64 extract_rd_15_14_13_12_11(uint64 instruction) |
| 1227 | { |
| 1228 | uint64 value = 0; |
| 1229 | value |= extract_bits(instruction, 11, 5); |
| 1230 | return value; |
| 1231 | } |
| 1232 | |
| 1233 | |
| 1234 | static uint64 extract_c0s_20_19_18_17_16(uint64 instruction) |
| 1235 | { |
| 1236 | uint64 value = 0; |
| 1237 | value |= extract_bits(instruction, 16, 5); |
| 1238 | return value; |
| 1239 | } |
| 1240 | |
| 1241 | |
| 1242 | static uint64 extract_code_1_0(uint64 instruction) |
| 1243 | { |
| 1244 | uint64 value = 0; |
| 1245 | value |= extract_bits(instruction, 0, 2); |
| 1246 | return value; |
| 1247 | } |
| 1248 | |
| 1249 | |
| 1250 | static int64 extract_s__se25_0_24_to_1_s1(uint64 instruction) |
| 1251 | { |
| 1252 | int64 value = 0; |
| 1253 | value |= extract_bits(instruction, 0, 1) << 25; |
| 1254 | value |= extract_bits(instruction, 1, 24) << 1; |
| 1255 | value = sign_extend(value, 25); |
| 1256 | return value; |
| 1257 | } |
| 1258 | |
| 1259 | |
| 1260 | static uint64 extract_u_1_0(uint64 instruction) |
| 1261 | { |
| 1262 | uint64 value = 0; |
| 1263 | value |= extract_bits(instruction, 0, 2); |
| 1264 | return value; |
| 1265 | } |
| 1266 | |
| 1267 | |
| 1268 | static uint64 extract_u_3_8__s2(uint64 instruction) |
| 1269 | { |
| 1270 | uint64 value = 0; |
| 1271 | value |= extract_bits(instruction, 3, 1) << 3; |
| 1272 | value |= extract_bits(instruction, 8, 1) << 2; |
| 1273 | return value; |
| 1274 | } |
| 1275 | |
| 1276 | |
| 1277 | static uint64 extract_fd_15_14_13_12_11(uint64 instruction) |
| 1278 | { |
| 1279 | uint64 value = 0; |
| 1280 | value |= extract_bits(instruction, 11, 5); |
| 1281 | return value; |
| 1282 | } |
| 1283 | |
| 1284 | |
| 1285 | static uint64 extract_u_4_3_2_1_0__s2(uint64 instruction) |
| 1286 | { |
| 1287 | uint64 value = 0; |
| 1288 | value |= extract_bits(instruction, 0, 5) << 2; |
| 1289 | return value; |
| 1290 | } |
| 1291 | |
| 1292 | |
| 1293 | static uint64 extract_rtz4_9_7_6_5(uint64 instruction) |
| 1294 | { |
| 1295 | uint64 value = 0; |
| 1296 | value |= extract_bits(instruction, 5, 3); |
| 1297 | value |= extract_bits(instruction, 9, 1) << 3; |
| 1298 | return value; |
| 1299 | } |
| 1300 | |
| 1301 | |
| 1302 | static uint64 extract_sel_15_14_13_12_11(uint64 instruction) |
| 1303 | { |
| 1304 | uint64 value = 0; |
| 1305 | value |= extract_bits(instruction, 11, 5); |
| 1306 | return value; |
| 1307 | } |
| 1308 | |
| 1309 | |
| 1310 | static uint64 extract_ct_25_24_23_22_21(uint64 instruction) |
| 1311 | { |
| 1312 | uint64 value = 0; |
| 1313 | value |= extract_bits(instruction, 21, 5); |
| 1314 | return value; |
| 1315 | } |
| 1316 | |
| 1317 | |
| 1318 | static uint64 extract_u_20_to_2__s2(uint64 instruction) |
| 1319 | { |
| 1320 | uint64 value = 0; |
| 1321 | value |= extract_bits(instruction, 2, 19) << 2; |
| 1322 | return value; |
| 1323 | } |
| 1324 | |
| 1325 | |
| 1326 | static int64 extract_s__se3_4_2_1_0(uint64 instruction) |
| 1327 | { |
| 1328 | int64 value = 0; |
| 1329 | value |= extract_bits(instruction, 0, 3); |
| 1330 | value |= extract_bits(instruction, 4, 1) << 3; |
| 1331 | value = sign_extend(value, 3); |
| 1332 | return value; |
| 1333 | } |
| 1334 | |
| 1335 | |
| 1336 | static uint64 extract_u_3_2_1_0__s1(uint64 instruction) |
| 1337 | { |
| 1338 | uint64 value = 0; |
| 1339 | value |= extract_bits(instruction, 0, 4) << 1; |
| 1340 | return value; |
| 1341 | } |
| 1342 | |
| 1343 | |
| 1344 | |
| 1345 | static bool ADDIU_32__cond(uint64 instruction) |
| 1346 | { |
| 1347 | uint64 rt = extract_rt_25_24_23_22_21(instruction); |
| 1348 | return rt != 0; |
| 1349 | } |
| 1350 | |
| 1351 | |
| 1352 | static bool ADDIU_RS5__cond(uint64 instruction) |
| 1353 | { |
| 1354 | uint64 rt = extract_rt_9_8_7_6_5(instruction); |
| 1355 | return rt != 0; |
| 1356 | } |
| 1357 | |
| 1358 | |
| 1359 | static bool BALRSC_cond(uint64 instruction) |
| 1360 | { |
| 1361 | uint64 rt = extract_rt_25_24_23_22_21(instruction); |
| 1362 | return rt != 0; |
| 1363 | } |
| 1364 | |
| 1365 | |
| 1366 | static bool BEQC_16__cond(uint64 instruction) |
| 1367 | { |
| 1368 | uint64 rs3 = extract_rs3_6_5_4(instruction); |
| 1369 | uint64 rt3 = extract_rt3_9_8_7(instruction); |
| 1370 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
| 1371 | return rs3 < rt3 && u != 0; |
| 1372 | } |
| 1373 | |
| 1374 | |
| 1375 | static bool BNEC_16__cond(uint64 instruction) |
| 1376 | { |
| 1377 | uint64 rs3 = extract_rs3_6_5_4(instruction); |
| 1378 | uint64 rt3 = extract_rt3_9_8_7(instruction); |
| 1379 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
| 1380 | return rs3 >= rt3 && u != 0; |
| 1381 | } |
| 1382 | |
| 1383 | |
| 1384 | static bool MOVE_cond(uint64 instruction) |
| 1385 | { |
| 1386 | uint64 rt = extract_rt_9_8_7_6_5(instruction); |
| 1387 | return rt != 0; |
| 1388 | } |
| 1389 | |
| 1390 | |
| 1391 | static bool P16_BR1_cond(uint64 instruction) |
| 1392 | { |
| 1393 | uint64 u = extract_u_3_2_1_0__s1(instruction); |
| 1394 | return u != 0; |
| 1395 | } |
| 1396 | |
| 1397 | |
| 1398 | static bool PREF_S9__cond(uint64 instruction) |
| 1399 | { |
| 1400 | uint64 hint = extract_hint_25_24_23_22_21(instruction); |
| 1401 | return hint != 31; |
| 1402 | } |
| 1403 | |
| 1404 | |
| 1405 | static bool PREFE_cond(uint64 instruction) |
| 1406 | { |
| 1407 | uint64 hint = extract_hint_25_24_23_22_21(instruction); |
| 1408 | return hint != 31; |
| 1409 | } |
| 1410 | |
| 1411 | |
| 1412 | static bool SLTU_cond(uint64 instruction) |
| 1413 | { |
| 1414 | uint64 rd = extract_rd_15_14_13_12_11(instruction); |
| 1415 | return rd != 0; |
| 1416 | } |
| 1417 | |
| 1418 | |
| 1419 | |
| 1420 | /* |
| 1421 | * ABS.D fd, fs - Floating Point Absolute Value |
| 1422 | * |
| 1423 | * 3 2 1 |
| 1424 | * 10987654321098765432109876543210 |
| 1425 | * 010001 00000 000101 |
| 1426 | * fmt ----- |
| 1427 | * fs ----- |
| 1428 | * fd ----- |
| 1429 | */ |
| 1430 | static char *ABS_D(uint64 instruction, Dis_info *info) |
| 1431 | { |
| 1432 | uint64 fd_value = extract_ft_25_24_23_22_21(instruction); |
| 1433 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 1434 | |
| 1435 | const char *fs = FPR(fs_value, info); |
| 1436 | const char *fd = FPR(fd_value, info); |
| 1437 | |
| 1438 | return img_format("ABS.D %s, %s", fd, fs); |
| 1439 | } |
| 1440 | |
| 1441 | |
| 1442 | /* |
| 1443 | * ABS.S fd, fs - Floating Point Absolute Value |
| 1444 | * |
| 1445 | * 3 2 1 |
| 1446 | * 10987654321098765432109876543210 |
| 1447 | * 010001 00000 000101 |
| 1448 | * fmt ----- |
| 1449 | * fd ----- |
| 1450 | * fs ----- |
| 1451 | */ |
| 1452 | static char *ABS_S(uint64 instruction, Dis_info *info) |
| 1453 | { |
| 1454 | uint64 fd_value = extract_ft_25_24_23_22_21(instruction); |
| 1455 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 1456 | |
| 1457 | const char *fs = FPR(fs_value, info); |
| 1458 | const char *fd = FPR(fd_value, info); |
| 1459 | |
| 1460 | return img_format("ABS.S %s, %s", fd, fs); |
| 1461 | } |
| 1462 | |
| 1463 | |
| 1464 | /* |
| 1465 | * [DSP] ABSQ_S.PH rt, rs - Find absolute value of two fractional halfwords |
| 1466 | * with 16-bit saturation |
| 1467 | * |
| 1468 | * 3 2 1 |
| 1469 | * 10987654321098765432109876543210 |
| 1470 | * 001000 0001000100111111 |
| 1471 | * rt ----- |
| 1472 | * rs ----- |
| 1473 | */ |
| 1474 | static char *ABSQ_S_PH(uint64 instruction, Dis_info *info) |
| 1475 | { |
| 1476 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1477 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1478 | |
| 1479 | const char *rt = GPR(rt_value, info); |
| 1480 | const char *rs = GPR(rs_value, info); |
| 1481 | |
| 1482 | return img_format("ABSQ_S.PH %s, %s", rt, rs); |
| 1483 | } |
| 1484 | |
| 1485 | |
| 1486 | /* |
| 1487 | * [DSP] ABSQ_S.QB rt, rs - Find absolute value of four fractional byte values |
| 1488 | * with 8-bit saturation |
| 1489 | * |
| 1490 | * 3 2 1 |
| 1491 | * 10987654321098765432109876543210 |
| 1492 | * 001000 0000000100111111 |
| 1493 | * rt ----- |
| 1494 | * rs ----- |
| 1495 | */ |
| 1496 | static char *ABSQ_S_QB(uint64 instruction, Dis_info *info) |
| 1497 | { |
| 1498 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1499 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1500 | |
| 1501 | const char *rt = GPR(rt_value, info); |
| 1502 | const char *rs = GPR(rs_value, info); |
| 1503 | |
| 1504 | return img_format("ABSQ_S.QB %s, %s", rt, rs); |
| 1505 | } |
| 1506 | |
| 1507 | |
| 1508 | /* |
| 1509 | * [DSP] ABSQ_S.W rt, rs - Find absolute value of fractional word with 32-bit |
| 1510 | * saturation |
| 1511 | * |
| 1512 | * 3 2 1 |
| 1513 | * 10987654321098765432109876543210 |
| 1514 | * 001000 0010000100111111 |
| 1515 | * rt ----- |
| 1516 | * rs ----- |
| 1517 | */ |
| 1518 | static char *ABSQ_S_W(uint64 instruction, Dis_info *info) |
| 1519 | { |
| 1520 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1521 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1522 | |
| 1523 | const char *rt = GPR(rt_value, info); |
| 1524 | const char *rs = GPR(rs_value, info); |
| 1525 | |
| 1526 | return img_format("ABSQ_S.W %s, %s", rt, rs); |
| 1527 | } |
| 1528 | |
| 1529 | |
| 1530 | /* |
| 1531 | * |
| 1532 | * |
| 1533 | * 3 2 1 |
| 1534 | * 10987654321098765432109876543210 |
| 1535 | * 001000 0010000100111111 |
| 1536 | * rt ----- |
| 1537 | * rs ----- |
| 1538 | */ |
| 1539 | static char *ACLR(uint64 instruction, Dis_info *info) |
| 1540 | { |
| 1541 | uint64 bit_value = extract_bit_23_22_21(instruction); |
| 1542 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1543 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
| 1544 | |
| 1545 | const char *rs = GPR(rs_value, info); |
| 1546 | |
| 1547 | return img_format("ACLR 0x%" PRIx64 ", %" PRId64 "(%s)", |
| 1548 | bit_value, s_value, rs); |
| 1549 | } |
| 1550 | |
| 1551 | |
| 1552 | /* |
| 1553 | * |
| 1554 | * |
| 1555 | * 3 2 1 |
| 1556 | * 10987654321098765432109876543210 |
| 1557 | * 001000 0010000100111111 |
| 1558 | * rt ----- |
| 1559 | * rs ----- |
| 1560 | */ |
| 1561 | static char *ADD(uint64 instruction, Dis_info *info) |
| 1562 | { |
| 1563 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1564 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1565 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1566 | |
| 1567 | const char *rd = GPR(rd_value, info); |
| 1568 | const char *rs = GPR(rs_value, info); |
| 1569 | const char *rt = GPR(rt_value, info); |
| 1570 | |
| 1571 | return img_format("ADD %s, %s, %s", rd, rs, rt); |
| 1572 | } |
| 1573 | |
| 1574 | |
| 1575 | /* |
| 1576 | * ADD.D fd, fs, ft - Floating Point Add |
| 1577 | * |
| 1578 | * 3 2 1 |
| 1579 | * 10987654321098765432109876543210 |
| 1580 | * 010001 000101 |
| 1581 | * fmt ----- |
| 1582 | * ft ----- |
| 1583 | * fs ----- |
| 1584 | * fd ----- |
| 1585 | */ |
| 1586 | static char *ADD_D(uint64 instruction, Dis_info *info) |
| 1587 | { |
| 1588 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 1589 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 1590 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 1591 | |
| 1592 | const char *ft = FPR(ft_value, info); |
| 1593 | const char *fs = FPR(fs_value, info); |
| 1594 | const char *fd = FPR(fd_value, info); |
| 1595 | |
| 1596 | return img_format("ADD.D %s, %s, %s", fd, fs, ft); |
| 1597 | } |
| 1598 | |
| 1599 | |
| 1600 | /* |
| 1601 | * ADD.S fd, fs, ft - Floating Point Add |
| 1602 | * |
| 1603 | * 3 2 1 |
| 1604 | * 10987654321098765432109876543210 |
| 1605 | * 010001 000101 |
| 1606 | * fmt ----- |
| 1607 | * ft ----- |
| 1608 | * fs ----- |
| 1609 | * fd ----- |
| 1610 | */ |
| 1611 | static char *ADD_S(uint64 instruction, Dis_info *info) |
| 1612 | { |
| 1613 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 1614 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 1615 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 1616 | |
| 1617 | const char *ft = FPR(ft_value, info); |
| 1618 | const char *fs = FPR(fs_value, info); |
| 1619 | const char *fd = FPR(fd_value, info); |
| 1620 | |
| 1621 | return img_format("ADD.S %s, %s, %s", fd, fs, ft); |
| 1622 | } |
| 1623 | |
| 1624 | |
| 1625 | /* |
| 1626 | * |
| 1627 | * |
| 1628 | * 3 2 1 |
| 1629 | * 10987654321098765432109876543210 |
| 1630 | * 001000 0010000100111111 |
| 1631 | * rt ----- |
| 1632 | * rs ----- |
| 1633 | */ |
| 1634 | static char *ADDIU_32_(uint64 instruction, Dis_info *info) |
| 1635 | { |
| 1636 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1637 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1638 | uint64 u_value = extract_u_15_to_0(instruction); |
| 1639 | |
| 1640 | const char *rt = GPR(rt_value, info); |
| 1641 | const char *rs = GPR(rs_value, info); |
| 1642 | |
| 1643 | return img_format("ADDIU %s, %s, 0x%" PRIx64, rt, rs, u_value); |
| 1644 | } |
| 1645 | |
| 1646 | |
| 1647 | /* |
| 1648 | * |
| 1649 | * |
| 1650 | * 3 2 1 |
| 1651 | * 10987654321098765432109876543210 |
| 1652 | * 001000 0010000100111111 |
| 1653 | * rt ----- |
| 1654 | * rs ----- |
| 1655 | */ |
| 1656 | static char *ADDIU_48_(uint64 instruction, Dis_info *info) |
| 1657 | { |
| 1658 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); |
| 1659 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
| 1660 | |
| 1661 | const char *rt = GPR(rt_value, info); |
| 1662 | |
| 1663 | return img_format("ADDIU %s, %" PRId64, rt, s_value); |
| 1664 | } |
| 1665 | |
| 1666 | |
| 1667 | /* |
| 1668 | * |
| 1669 | * |
| 1670 | * 3 2 1 |
| 1671 | * 10987654321098765432109876543210 |
| 1672 | * 001000 0010000100111111 |
| 1673 | * rt ----- |
| 1674 | * rs ----- |
| 1675 | */ |
| 1676 | static char *ADDIU_GP48_(uint64 instruction, Dis_info *info) |
| 1677 | { |
| 1678 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); |
| 1679 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
| 1680 | |
| 1681 | const char *rt = GPR(rt_value, info); |
| 1682 | |
| 1683 | return img_format("ADDIU %s, $%d, %" PRId64, rt, 28, s_value); |
| 1684 | } |
| 1685 | |
| 1686 | |
| 1687 | /* |
| 1688 | * |
| 1689 | * |
| 1690 | * 3 2 1 |
| 1691 | * 10987654321098765432109876543210 |
| 1692 | * 001000 0010000100111111 |
| 1693 | * rt ----- |
| 1694 | * rs ----- |
| 1695 | */ |
| 1696 | static char *ADDIU_GP_B_(uint64 instruction, Dis_info *info) |
| 1697 | { |
| 1698 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1699 | uint64 u_value = extract_u_17_to_0(instruction); |
| 1700 | |
| 1701 | const char *rt = GPR(rt_value, info); |
| 1702 | |
| 1703 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt, 28, u_value); |
| 1704 | } |
| 1705 | |
| 1706 | |
| 1707 | /* |
| 1708 | * |
| 1709 | * |
| 1710 | * 3 2 1 |
| 1711 | * 10987654321098765432109876543210 |
| 1712 | * 001000 0010000100111111 |
| 1713 | * rt ----- |
| 1714 | * rs ----- |
| 1715 | */ |
| 1716 | static char *ADDIU_GP_W_(uint64 instruction, Dis_info *info) |
| 1717 | { |
| 1718 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1719 | uint64 u_value = extract_u_20_to_2__s2(instruction); |
| 1720 | |
| 1721 | const char *rt = GPR(rt_value, info); |
| 1722 | |
| 1723 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt, 28, u_value); |
| 1724 | } |
| 1725 | |
| 1726 | |
| 1727 | /* |
| 1728 | * |
| 1729 | * |
| 1730 | * 3 2 1 |
| 1731 | * 10987654321098765432109876543210 |
| 1732 | * 001000 0010000100111111 |
| 1733 | * rt ----- |
| 1734 | * rs ----- |
| 1735 | */ |
| 1736 | static char *ADDIU_NEG_(uint64 instruction, Dis_info *info) |
| 1737 | { |
| 1738 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1739 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1740 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
| 1741 | |
| 1742 | const char *rt = GPR(rt_value, info); |
| 1743 | const char *rs = GPR(rs_value, info); |
| 1744 | int64 u = neg_copy(u_value); |
| 1745 | |
| 1746 | return img_format("ADDIU %s, %s, %" PRId64, rt, rs, u); |
| 1747 | } |
| 1748 | |
| 1749 | |
| 1750 | /* |
| 1751 | * |
| 1752 | * |
| 1753 | * 3 2 1 |
| 1754 | * 10987654321098765432109876543210 |
| 1755 | * 001000 0010000100111111 |
| 1756 | * rt ----- |
| 1757 | * rs ----- |
| 1758 | */ |
| 1759 | static char *ADDIU_R1_SP_(uint64 instruction, Dis_info *info) |
| 1760 | { |
| 1761 | uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction); |
| 1762 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 1763 | |
| 1764 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 1765 | |
| 1766 | return img_format("ADDIU %s, $%d, 0x%" PRIx64, rt3, 29, u_value); |
| 1767 | } |
| 1768 | |
| 1769 | |
| 1770 | /* |
| 1771 | * |
| 1772 | * |
| 1773 | * 3 2 1 |
| 1774 | * 10987654321098765432109876543210 |
| 1775 | * 001000 0010000100111111 |
| 1776 | * rt ----- |
| 1777 | * rs ----- |
| 1778 | */ |
| 1779 | static char *ADDIU_R2_(uint64 instruction, Dis_info *info) |
| 1780 | { |
| 1781 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 1782 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 1783 | uint64 u_value = extract_u_2_1_0__s2(instruction); |
| 1784 | |
| 1785 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 1786 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 1787 | |
| 1788 | return img_format("ADDIU %s, %s, 0x%" PRIx64, rt3, rs3, u_value); |
| 1789 | } |
| 1790 | |
| 1791 | |
| 1792 | /* |
| 1793 | * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit |
| 1794 | * |
| 1795 | * 5432109876543210 |
| 1796 | * 100100 1 |
| 1797 | * rt ----- |
| 1798 | * s - --- |
| 1799 | */ |
| 1800 | static char *ADDIU_RS5_(uint64 instruction, Dis_info *info) |
| 1801 | { |
| 1802 | uint64 rt_value = extract_rt_9_8_7_6_5(instruction); |
| 1803 | int64 s_value = extract_s__se3_4_2_1_0(instruction); |
| 1804 | |
| 1805 | const char *rt = GPR(rt_value, info); |
| 1806 | |
| 1807 | return img_format("ADDIU %s, %" PRId64, rt, s_value); |
| 1808 | } |
| 1809 | |
| 1810 | |
| 1811 | /* |
| 1812 | * |
| 1813 | * |
| 1814 | * 3 2 1 |
| 1815 | * 10987654321098765432109876543210 |
| 1816 | * 001000 x1110000101 |
| 1817 | * rt ----- |
| 1818 | * rs ----- |
| 1819 | * rd ----- |
| 1820 | */ |
| 1821 | static char *ADDIUPC_32_(uint64 instruction, Dis_info *info) |
| 1822 | { |
| 1823 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1824 | int64 s_value = extract_s__se21_0_20_to_1_s1(instruction); |
| 1825 | |
| 1826 | const char *rt = GPR(rt_value, info); |
| 1827 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 1828 | |
| 1829 | return img_format("ADDIUPC %s, %s", rt, s); |
| 1830 | } |
| 1831 | |
| 1832 | |
| 1833 | /* |
| 1834 | * |
| 1835 | * |
| 1836 | * 3 2 1 |
| 1837 | * 10987654321098765432109876543210 |
| 1838 | * 001000 x1110000101 |
| 1839 | * rt ----- |
| 1840 | * rs ----- |
| 1841 | * rd ----- |
| 1842 | */ |
| 1843 | static char *ADDIUPC_48_(uint64 instruction, Dis_info *info) |
| 1844 | { |
| 1845 | uint64 rt_value = extract_rt_41_40_39_38_37(instruction); |
| 1846 | int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction); |
| 1847 | |
| 1848 | const char *rt = GPR(rt_value, info); |
| 1849 | g_autofree char *s = ADDRESS(s_value, 6, info); |
| 1850 | |
| 1851 | return img_format("ADDIUPC %s, %s", rt, s); |
| 1852 | } |
| 1853 | |
| 1854 | |
| 1855 | /* |
| 1856 | * [DSP] ADDQ.PH rd, rt, rs - Add fractional halfword vectors |
| 1857 | * |
| 1858 | * 3 2 1 |
| 1859 | * 10987654321098765432109876543210 |
| 1860 | * 001000 00000001101 |
| 1861 | * rt ----- |
| 1862 | * rs ----- |
| 1863 | * rd ----- |
| 1864 | */ |
| 1865 | static char *ADDQ_PH(uint64 instruction, Dis_info *info) |
| 1866 | { |
| 1867 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1868 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1869 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1870 | |
| 1871 | const char *rd = GPR(rd_value, info); |
| 1872 | const char *rs = GPR(rs_value, info); |
| 1873 | const char *rt = GPR(rt_value, info); |
| 1874 | |
| 1875 | return img_format("ADDQ.PH %s, %s, %s", rd, rs, rt); |
| 1876 | } |
| 1877 | |
| 1878 | |
| 1879 | /* |
| 1880 | * [DSP] ADDQ_S.PH rd, rt, rs - Add fractional halfword vectors with 16-bit |
| 1881 | * saturation |
| 1882 | * |
| 1883 | * 3 2 1 |
| 1884 | * 10987654321098765432109876543210 |
| 1885 | * 001000 10000001101 |
| 1886 | * rt ----- |
| 1887 | * rs ----- |
| 1888 | * rd ----- |
| 1889 | */ |
| 1890 | static char *ADDQ_S_PH(uint64 instruction, Dis_info *info) |
| 1891 | { |
| 1892 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1893 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1894 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1895 | |
| 1896 | const char *rd = GPR(rd_value, info); |
| 1897 | const char *rs = GPR(rs_value, info); |
| 1898 | const char *rt = GPR(rt_value, info); |
| 1899 | |
| 1900 | return img_format("ADDQ_S.PH %s, %s, %s", rd, rs, rt); |
| 1901 | } |
| 1902 | |
| 1903 | |
| 1904 | /* |
| 1905 | * [DSP] ADDQ_S.W rd, rt, rs - Add fractional words with 32-bit saturation |
| 1906 | * |
| 1907 | * 3 2 1 |
| 1908 | * 10987654321098765432109876543210 |
| 1909 | * 001000 x1100000101 |
| 1910 | * rt ----- |
| 1911 | * rs ----- |
| 1912 | * rd ----- |
| 1913 | */ |
| 1914 | static char *ADDQ_S_W(uint64 instruction, Dis_info *info) |
| 1915 | { |
| 1916 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1917 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1918 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1919 | |
| 1920 | const char *rd = GPR(rd_value, info); |
| 1921 | const char *rs = GPR(rs_value, info); |
| 1922 | const char *rt = GPR(rt_value, info); |
| 1923 | |
| 1924 | return img_format("ADDQ_S.W %s, %s, %s", rd, rs, rt); |
| 1925 | } |
| 1926 | |
| 1927 | |
| 1928 | /* |
| 1929 | * [DSP] ADDQH.PH rd, rt, rs - Add fractional halfword vectors and shift |
| 1930 | * right to halve results |
| 1931 | * |
| 1932 | * 3 2 1 |
| 1933 | * 10987654321098765432109876543210 |
| 1934 | * 001000 00001001101 |
| 1935 | * rt ----- |
| 1936 | * rs ----- |
| 1937 | * rd ----- |
| 1938 | */ |
| 1939 | static char *ADDQH_PH(uint64 instruction, Dis_info *info) |
| 1940 | { |
| 1941 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1942 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1943 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1944 | |
| 1945 | const char *rd = GPR(rd_value, info); |
| 1946 | const char *rs = GPR(rs_value, info); |
| 1947 | const char *rt = GPR(rt_value, info); |
| 1948 | |
| 1949 | return img_format("ADDQH.PH %s, %s, %s", rd, rs, rt); |
| 1950 | } |
| 1951 | |
| 1952 | |
| 1953 | /* |
| 1954 | * [DSP] ADDQH_R.PH rd, rt, rs - Add fractional halfword vectors and shift |
| 1955 | * right to halve results with rounding |
| 1956 | * |
| 1957 | * 3 2 1 |
| 1958 | * 10987654321098765432109876543210 |
| 1959 | * 001000 10001001101 |
| 1960 | * rt ----- |
| 1961 | * rs ----- |
| 1962 | * rd ----- |
| 1963 | */ |
| 1964 | static char *ADDQH_R_PH(uint64 instruction, Dis_info *info) |
| 1965 | { |
| 1966 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1967 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1968 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1969 | |
| 1970 | const char *rd = GPR(rd_value, info); |
| 1971 | const char *rs = GPR(rs_value, info); |
| 1972 | const char *rt = GPR(rt_value, info); |
| 1973 | |
| 1974 | return img_format("ADDQH_R.PH %s, %s, %s", rd, rs, rt); |
| 1975 | } |
| 1976 | |
| 1977 | |
| 1978 | /* |
| 1979 | * [DSP] ADDQH_R.W rd, rt, rs - Add fractional words and shift right to halve |
| 1980 | * results with rounding |
| 1981 | * |
| 1982 | * 3 2 1 |
| 1983 | * 10987654321098765432109876543210 |
| 1984 | * 001000 00010001101 |
| 1985 | * rt ----- |
| 1986 | * rs ----- |
| 1987 | * rd ----- |
| 1988 | */ |
| 1989 | static char *ADDQH_R_W(uint64 instruction, Dis_info *info) |
| 1990 | { |
| 1991 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 1992 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 1993 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 1994 | |
| 1995 | const char *rd = GPR(rd_value, info); |
| 1996 | const char *rs = GPR(rs_value, info); |
| 1997 | const char *rt = GPR(rt_value, info); |
| 1998 | |
| 1999 | return img_format("ADDQH_R.W %s, %s, %s", rd, rs, rt); |
| 2000 | } |
| 2001 | |
| 2002 | |
| 2003 | /* |
| 2004 | * [DSP] ADDQH.W rd, rt, rs - Add fractional words and shift right to halve |
| 2005 | * results |
| 2006 | * |
| 2007 | * 3 2 1 |
| 2008 | * 10987654321098765432109876543210 |
| 2009 | * 001000 10010001101 |
| 2010 | * rt ----- |
| 2011 | * rs ----- |
| 2012 | * rd ----- |
| 2013 | */ |
| 2014 | static char *ADDQH_W(uint64 instruction, Dis_info *info) |
| 2015 | { |
| 2016 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2017 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2018 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2019 | |
| 2020 | const char *rd = GPR(rd_value, info); |
| 2021 | const char *rs = GPR(rs_value, info); |
| 2022 | const char *rt = GPR(rt_value, info); |
| 2023 | |
| 2024 | return img_format("ADDQH.W %s, %s, %s", rd, rs, rt); |
| 2025 | } |
| 2026 | |
| 2027 | |
| 2028 | /* |
| 2029 | * [DSP] ADDSC rd, rt, rs - Add two signed words and set carry bit |
| 2030 | * |
| 2031 | * 3 2 1 |
| 2032 | * 10987654321098765432109876543210 |
| 2033 | * 001000 x1110000101 |
| 2034 | * rt ----- |
| 2035 | * rs ----- |
| 2036 | * rd ----- |
| 2037 | */ |
| 2038 | static char *ADDSC(uint64 instruction, Dis_info *info) |
| 2039 | { |
| 2040 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2041 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2042 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2043 | |
| 2044 | const char *rd = GPR(rd_value, info); |
| 2045 | const char *rs = GPR(rs_value, info); |
| 2046 | const char *rt = GPR(rt_value, info); |
| 2047 | |
| 2048 | return img_format("ADDSC %s, %s, %s", rd, rs, rt); |
| 2049 | } |
| 2050 | |
| 2051 | |
| 2052 | /* |
| 2053 | * ADDU[16] rd3, rs3, rt3 - |
| 2054 | * |
| 2055 | * 5432109876543210 |
| 2056 | * 101100 0 |
| 2057 | * rt3 --- |
| 2058 | * rs3 --- |
| 2059 | * rd3 --- |
| 2060 | */ |
| 2061 | static char *ADDU_16_(uint64 instruction, Dis_info *info) |
| 2062 | { |
| 2063 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2064 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 2065 | uint64 rd3_value = extract_rd3_3_2_1(instruction); |
| 2066 | |
| 2067 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2068 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 2069 | const char *rd3 = GPR(decode_gpr_gpr3(rd3_value, info), info); |
| 2070 | |
| 2071 | return img_format("ADDU %s, %s, %s", rd3, rs3, rt3); |
| 2072 | } |
| 2073 | |
| 2074 | |
| 2075 | /* |
| 2076 | * |
| 2077 | * |
| 2078 | * 3 2 1 |
| 2079 | * 10987654321098765432109876543210 |
| 2080 | * 001000 x1110000101 |
| 2081 | * rt ----- |
| 2082 | * rs ----- |
| 2083 | * rd ----- |
| 2084 | */ |
| 2085 | static char *ADDU_32_(uint64 instruction, Dis_info *info) |
| 2086 | { |
| 2087 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2088 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2089 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2090 | |
| 2091 | const char *rd = GPR(rd_value, info); |
| 2092 | const char *rs = GPR(rs_value, info); |
| 2093 | const char *rt = GPR(rt_value, info); |
| 2094 | |
| 2095 | return img_format("ADDU %s, %s, %s", rd, rs, rt); |
| 2096 | } |
| 2097 | |
| 2098 | |
| 2099 | /* |
| 2100 | * |
| 2101 | * |
| 2102 | * 3 2 1 |
| 2103 | * 10987654321098765432109876543210 |
| 2104 | * 001000 x1110000101 |
| 2105 | * rt ----- |
| 2106 | * rs ----- |
| 2107 | * rd ----- |
| 2108 | */ |
| 2109 | static char *ADDU_4X4_(uint64 instruction, Dis_info *info) |
| 2110 | { |
| 2111 | uint64 rt4_value = extract_rt4_9_7_6_5(instruction); |
| 2112 | uint64 rs4_value = extract_rs4_4_2_1_0(instruction); |
| 2113 | |
| 2114 | const char *rs4 = GPR(decode_gpr_gpr4(rs4_value, info), info); |
| 2115 | const char *rt4 = GPR(decode_gpr_gpr4(rt4_value, info), info); |
| 2116 | |
| 2117 | return img_format("ADDU %s, %s", rs4, rt4); |
| 2118 | } |
| 2119 | |
| 2120 | |
| 2121 | /* |
| 2122 | * [DSP] ADDU.PH rd, rt, rs - Add two pairs of unsigned halfwords |
| 2123 | * |
| 2124 | * 3 2 1 |
| 2125 | * 10987654321098765432109876543210 |
| 2126 | * 001000 00100001101 |
| 2127 | * rt ----- |
| 2128 | * rs ----- |
| 2129 | * rd ----- |
| 2130 | */ |
| 2131 | static char *ADDU_PH(uint64 instruction, Dis_info *info) |
| 2132 | { |
| 2133 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2134 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2135 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2136 | |
| 2137 | const char *rd = GPR(rd_value, info); |
| 2138 | const char *rs = GPR(rs_value, info); |
| 2139 | const char *rt = GPR(rt_value, info); |
| 2140 | |
| 2141 | return img_format("ADDU.PH %s, %s, %s", rd, rs, rt); |
| 2142 | } |
| 2143 | |
| 2144 | |
| 2145 | /* |
| 2146 | * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors |
| 2147 | * |
| 2148 | * 3 2 1 |
| 2149 | * 10987654321098765432109876543210 |
| 2150 | * 001000 00011001101 |
| 2151 | * rt ----- |
| 2152 | * rs ----- |
| 2153 | * rd ----- |
| 2154 | */ |
| 2155 | static char *ADDU_QB(uint64 instruction, Dis_info *info) |
| 2156 | { |
| 2157 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2158 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2159 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2160 | |
| 2161 | const char *rd = GPR(rd_value, info); |
| 2162 | const char *rs = GPR(rs_value, info); |
| 2163 | const char *rt = GPR(rt_value, info); |
| 2164 | |
| 2165 | return img_format("ADDU.QB %s, %s, %s", rd, rs, rt); |
| 2166 | } |
| 2167 | |
| 2168 | |
| 2169 | /* |
| 2170 | * [DSP] ADDU_S.PH rd, rt, rs - Add two pairs of unsigned halfwords with 16-bit |
| 2171 | * saturation |
| 2172 | * |
| 2173 | * 3 2 1 |
| 2174 | * 10987654321098765432109876543210 |
| 2175 | * 001000 10100001101 |
| 2176 | * rt ----- |
| 2177 | * rs ----- |
| 2178 | * rd ----- |
| 2179 | */ |
| 2180 | static char *ADDU_S_PH(uint64 instruction, Dis_info *info) |
| 2181 | { |
| 2182 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2183 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2184 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2185 | |
| 2186 | const char *rd = GPR(rd_value, info); |
| 2187 | const char *rs = GPR(rs_value, info); |
| 2188 | const char *rt = GPR(rt_value, info); |
| 2189 | |
| 2190 | return img_format("ADDU_S.PH %s, %s, %s", rd, rs, rt); |
| 2191 | } |
| 2192 | |
| 2193 | |
| 2194 | /* |
| 2195 | * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors |
| 2196 | * |
| 2197 | * 3 2 1 |
| 2198 | * 10987654321098765432109876543210 |
| 2199 | * 001000 10011001101 |
| 2200 | * rt ----- |
| 2201 | * rs ----- |
| 2202 | * rd ----- |
| 2203 | */ |
| 2204 | static char *ADDU_S_QB(uint64 instruction, Dis_info *info) |
| 2205 | { |
| 2206 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2207 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2208 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2209 | |
| 2210 | const char *rd = GPR(rd_value, info); |
| 2211 | const char *rs = GPR(rs_value, info); |
| 2212 | const char *rt = GPR(rt_value, info); |
| 2213 | |
| 2214 | return img_format("ADDU_S.QB %s, %s, %s", rd, rs, rt); |
| 2215 | } |
| 2216 | |
| 2217 | |
| 2218 | /* |
| 2219 | * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift |
| 2220 | * to Halve Results |
| 2221 | * |
| 2222 | * 3 2 1 |
| 2223 | * 10987654321098765432109876543210 |
| 2224 | * 001000 00101001101 |
| 2225 | * rt ----- |
| 2226 | * rs ----- |
| 2227 | * rd ----- |
| 2228 | */ |
| 2229 | static char *ADDUH_QB(uint64 instruction, Dis_info *info) |
| 2230 | { |
| 2231 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2232 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2233 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2234 | |
| 2235 | const char *rd = GPR(rd_value, info); |
| 2236 | const char *rs = GPR(rs_value, info); |
| 2237 | const char *rt = GPR(rt_value, info); |
| 2238 | |
| 2239 | return img_format("ADDUH.QB %s, %s, %s", rd, rs, rt); |
| 2240 | } |
| 2241 | |
| 2242 | |
| 2243 | /* |
| 2244 | * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift |
| 2245 | * to Halve Results |
| 2246 | * |
| 2247 | * 3 2 1 |
| 2248 | * 10987654321098765432109876543210 |
| 2249 | * 001000 10101001101 |
| 2250 | * rt ----- |
| 2251 | * rs ----- |
| 2252 | * rd ----- |
| 2253 | */ |
| 2254 | static char *ADDUH_R_QB(uint64 instruction, Dis_info *info) |
| 2255 | { |
| 2256 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2257 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2258 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2259 | |
| 2260 | const char *rd = GPR(rd_value, info); |
| 2261 | const char *rs = GPR(rs_value, info); |
| 2262 | const char *rt = GPR(rt_value, info); |
| 2263 | |
| 2264 | return img_format("ADDUH_R.QB %s, %s, %s", rd, rs, rt); |
| 2265 | } |
| 2266 | |
| 2267 | /* |
| 2268 | * ADDWC rd, rt, rs - Add Word with Carry Bit |
| 2269 | * |
| 2270 | * 3 2 1 |
| 2271 | * 10987654321098765432109876543210 |
| 2272 | * 001000 x1111000101 |
| 2273 | * rt ----- |
| 2274 | * rs ----- |
| 2275 | * rd ----- |
| 2276 | */ |
| 2277 | static char *ADDWC(uint64 instruction, Dis_info *info) |
| 2278 | { |
| 2279 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2280 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2281 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2282 | |
| 2283 | const char *rd = GPR(rd_value, info); |
| 2284 | const char *rs = GPR(rs_value, info); |
| 2285 | const char *rt = GPR(rt_value, info); |
| 2286 | |
| 2287 | return img_format("ADDWC %s, %s, %s", rd, rs, rt); |
| 2288 | } |
| 2289 | |
| 2290 | |
| 2291 | /* |
| 2292 | * |
| 2293 | * |
| 2294 | * 3 2 1 |
| 2295 | * 10987654321098765432109876543210 |
| 2296 | * 001000 x1110000101 |
| 2297 | * rt ----- |
| 2298 | * rs ----- |
| 2299 | * rd ----- |
| 2300 | */ |
| 2301 | static char *ALUIPC(uint64 instruction, Dis_info *info) |
| 2302 | { |
| 2303 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2304 | int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction); |
| 2305 | |
| 2306 | const char *rt = GPR(rt_value, info); |
| 2307 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2308 | |
| 2309 | return img_format("ALUIPC %s, %%pcrel_hi(%s)", rt, s); |
| 2310 | } |
| 2311 | |
| 2312 | |
| 2313 | /* |
| 2314 | * AND[16] rt3, rs3 - |
| 2315 | * |
| 2316 | * 5432109876543210 |
| 2317 | * 101100 |
| 2318 | * rt3 --- |
| 2319 | * rs3 --- |
| 2320 | * eu ---- |
| 2321 | */ |
| 2322 | static char *AND_16_(uint64 instruction, Dis_info *info) |
| 2323 | { |
| 2324 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2325 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 2326 | |
| 2327 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2328 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 2329 | |
| 2330 | return img_format("AND %s, %s", rs3, rt3); |
| 2331 | } |
| 2332 | |
| 2333 | |
| 2334 | /* |
| 2335 | * |
| 2336 | * |
| 2337 | * 3 2 1 |
| 2338 | * 10987654321098765432109876543210 |
| 2339 | * 001000 x1110000101 |
| 2340 | * rt ----- |
| 2341 | * rs ----- |
| 2342 | * rd ----- |
| 2343 | */ |
| 2344 | static char *AND_32_(uint64 instruction, Dis_info *info) |
| 2345 | { |
| 2346 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2347 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2348 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 2349 | |
| 2350 | const char *rd = GPR(rd_value, info); |
| 2351 | const char *rs = GPR(rs_value, info); |
| 2352 | const char *rt = GPR(rt_value, info); |
| 2353 | |
| 2354 | return img_format("AND %s, %s, %s", rd, rs, rt); |
| 2355 | } |
| 2356 | |
| 2357 | |
| 2358 | /* |
| 2359 | * ANDI rt, rs, u - |
| 2360 | * |
| 2361 | * 5432109876543210 |
| 2362 | * 101100 |
| 2363 | * rt3 --- |
| 2364 | * rs3 --- |
| 2365 | * eu ---- |
| 2366 | */ |
| 2367 | static char *ANDI_16_(uint64 instruction, Dis_info *info) |
| 2368 | { |
| 2369 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2370 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 2371 | uint64 eu_value = extract_eu_3_2_1_0(instruction); |
| 2372 | |
| 2373 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2374 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 2375 | uint64 eu = encode_eu_from_u_andi16(eu_value); |
| 2376 | |
| 2377 | return img_format("ANDI %s, %s, 0x%" PRIx64, rt3, rs3, eu); |
| 2378 | } |
| 2379 | |
| 2380 | |
| 2381 | /* |
| 2382 | * |
| 2383 | * |
| 2384 | * 3 2 1 |
| 2385 | * 10987654321098765432109876543210 |
| 2386 | * 001000 x1110000101 |
| 2387 | * rt ----- |
| 2388 | * rs ----- |
| 2389 | * rd ----- |
| 2390 | */ |
| 2391 | static char *ANDI_32_(uint64 instruction, Dis_info *info) |
| 2392 | { |
| 2393 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2394 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2395 | uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); |
| 2396 | |
| 2397 | const char *rt = GPR(rt_value, info); |
| 2398 | const char *rs = GPR(rs_value, info); |
| 2399 | |
| 2400 | return img_format("ANDI %s, %s, 0x%" PRIx64, rt, rs, u_value); |
| 2401 | } |
| 2402 | |
| 2403 | |
| 2404 | /* |
| 2405 | * |
| 2406 | * |
| 2407 | * 3 2 1 |
| 2408 | * 10987654321098765432109876543210 |
| 2409 | * 001000 x1110000101 |
| 2410 | * rt ----- |
| 2411 | * rs ----- |
| 2412 | * rd ----- |
| 2413 | */ |
| 2414 | static char *APPEND(uint64 instruction, Dis_info *info) |
| 2415 | { |
| 2416 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2417 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2418 | uint64 sa_value = extract_sa_15_14_13_12_11(instruction); |
| 2419 | |
| 2420 | const char *rt = GPR(rt_value, info); |
| 2421 | const char *rs = GPR(rs_value, info); |
| 2422 | |
| 2423 | return img_format("APPEND %s, %s, 0x%" PRIx64, rt, rs, sa_value); |
| 2424 | } |
| 2425 | |
| 2426 | |
| 2427 | /* |
| 2428 | * |
| 2429 | * |
| 2430 | * 3 2 1 |
| 2431 | * 10987654321098765432109876543210 |
| 2432 | * 001000 x1110000101 |
| 2433 | * rt ----- |
| 2434 | * rs ----- |
| 2435 | * rd ----- |
| 2436 | */ |
| 2437 | static char *ASET(uint64 instruction, Dis_info *info) |
| 2438 | { |
| 2439 | uint64 bit_value = extract_bit_23_22_21(instruction); |
| 2440 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2441 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
| 2442 | |
| 2443 | const char *rs = GPR(rs_value, info); |
| 2444 | |
| 2445 | return img_format("ASET 0x%" PRIx64 ", %" PRId64 "(%s)", |
| 2446 | bit_value, s_value, rs); |
| 2447 | } |
| 2448 | |
| 2449 | |
| 2450 | /* |
| 2451 | * |
| 2452 | * |
| 2453 | * 3 2 1 |
| 2454 | * 10987654321098765432109876543210 |
| 2455 | * 001000 x1110000101 |
| 2456 | * rt ----- |
| 2457 | * rs ----- |
| 2458 | * rd ----- |
| 2459 | */ |
| 2460 | static char *BALC_16_(uint64 instruction, Dis_info *info) |
| 2461 | { |
| 2462 | int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction); |
| 2463 | |
| 2464 | g_autofree char *s = ADDRESS(s_value, 2, info); |
| 2465 | |
| 2466 | return img_format("BALC %s", s); |
| 2467 | } |
| 2468 | |
| 2469 | |
| 2470 | /* |
| 2471 | * |
| 2472 | * |
| 2473 | * 3 2 1 |
| 2474 | * 10987654321098765432109876543210 |
| 2475 | * 001000 x1110000101 |
| 2476 | * rt ----- |
| 2477 | * rs ----- |
| 2478 | * rd ----- |
| 2479 | */ |
| 2480 | static char *BALC_32_(uint64 instruction, Dis_info *info) |
| 2481 | { |
| 2482 | int64 s_value = extract_s__se25_0_24_to_1_s1(instruction); |
| 2483 | |
| 2484 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2485 | |
| 2486 | return img_format("BALC %s", s); |
| 2487 | } |
| 2488 | |
| 2489 | |
| 2490 | /* |
| 2491 | * |
| 2492 | * |
| 2493 | * 3 2 1 |
| 2494 | * 10987654321098765432109876543210 |
| 2495 | * 001000 x1110000101 |
| 2496 | * rt ----- |
| 2497 | * rs ----- |
| 2498 | * rd ----- |
| 2499 | */ |
| 2500 | static char *BALRSC(uint64 instruction, Dis_info *info) |
| 2501 | { |
| 2502 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2503 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2504 | |
| 2505 | const char *rt = GPR(rt_value, info); |
| 2506 | const char *rs = GPR(rs_value, info); |
| 2507 | |
| 2508 | return img_format("BALRSC %s, %s", rt, rs); |
| 2509 | } |
| 2510 | |
| 2511 | |
| 2512 | /* |
| 2513 | * |
| 2514 | * |
| 2515 | * 3 2 1 |
| 2516 | * 10987654321098765432109876543210 |
| 2517 | * 001000 x1110000101 |
| 2518 | * rt ----- |
| 2519 | * rs ----- |
| 2520 | * rd ----- |
| 2521 | */ |
| 2522 | static char *BBEQZC(uint64 instruction, Dis_info *info) |
| 2523 | { |
| 2524 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2525 | uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); |
| 2526 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2527 | |
| 2528 | const char *rt = GPR(rt_value, info); |
| 2529 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2530 | |
| 2531 | return img_format("BBEQZC %s, 0x%" PRIx64 ", %s", rt, bit_value, s); |
| 2532 | } |
| 2533 | |
| 2534 | |
| 2535 | /* |
| 2536 | * |
| 2537 | * |
| 2538 | * 3 2 1 |
| 2539 | * 10987654321098765432109876543210 |
| 2540 | * 001000 x1110000101 |
| 2541 | * rt ----- |
| 2542 | * rs ----- |
| 2543 | * rd ----- |
| 2544 | */ |
| 2545 | static char *BBNEZC(uint64 instruction, Dis_info *info) |
| 2546 | { |
| 2547 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2548 | uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); |
| 2549 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2550 | |
| 2551 | const char *rt = GPR(rt_value, info); |
| 2552 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2553 | |
| 2554 | return img_format("BBNEZC %s, 0x%" PRIx64 ", %s", rt, bit_value, s); |
| 2555 | } |
| 2556 | |
| 2557 | |
| 2558 | /* |
| 2559 | * |
| 2560 | * |
| 2561 | * 3 2 1 |
| 2562 | * 10987654321098765432109876543210 |
| 2563 | * 001000 x1110000101 |
| 2564 | * rt ----- |
| 2565 | * rs ----- |
| 2566 | * rd ----- |
| 2567 | */ |
| 2568 | static char *BC_16_(uint64 instruction, Dis_info *info) |
| 2569 | { |
| 2570 | int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction); |
| 2571 | |
| 2572 | g_autofree char *s = ADDRESS(s_value, 2, info); |
| 2573 | |
| 2574 | return img_format("BC %s", s); |
| 2575 | } |
| 2576 | |
| 2577 | |
| 2578 | /* |
| 2579 | * |
| 2580 | * |
| 2581 | * 3 2 1 |
| 2582 | * 10987654321098765432109876543210 |
| 2583 | * 001000 x1110000101 |
| 2584 | * rt ----- |
| 2585 | * rs ----- |
| 2586 | * rd ----- |
| 2587 | */ |
| 2588 | static char *BC_32_(uint64 instruction, Dis_info *info) |
| 2589 | { |
| 2590 | int64 s_value = extract_s__se25_0_24_to_1_s1(instruction); |
| 2591 | |
| 2592 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2593 | |
| 2594 | return img_format("BC %s", s); |
| 2595 | } |
| 2596 | |
| 2597 | |
| 2598 | /* |
| 2599 | * |
| 2600 | * |
| 2601 | * 3 2 1 |
| 2602 | * 10987654321098765432109876543210 |
| 2603 | * 001000 x1110000101 |
| 2604 | * rt ----- |
| 2605 | * rs ----- |
| 2606 | * rd ----- |
| 2607 | */ |
| 2608 | static char *BC1EQZC(uint64 instruction, Dis_info *info) |
| 2609 | { |
| 2610 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 2611 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2612 | |
| 2613 | const char *ft = FPR(ft_value, info); |
| 2614 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2615 | |
| 2616 | return img_format("BC1EQZC %s, %s", ft, s); |
| 2617 | } |
| 2618 | |
| 2619 | |
| 2620 | /* |
| 2621 | * |
| 2622 | * |
| 2623 | * 3 2 1 |
| 2624 | * 10987654321098765432109876543210 |
| 2625 | * 001000 x1110000101 |
| 2626 | * rt ----- |
| 2627 | * rs ----- |
| 2628 | * rd ----- |
| 2629 | */ |
| 2630 | static char *BC1NEZC(uint64 instruction, Dis_info *info) |
| 2631 | { |
| 2632 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 2633 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2634 | |
| 2635 | const char *ft = FPR(ft_value, info); |
| 2636 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2637 | |
| 2638 | return img_format("BC1NEZC %s, %s", ft, s); |
| 2639 | } |
| 2640 | |
| 2641 | |
| 2642 | /* |
| 2643 | * |
| 2644 | * |
| 2645 | * 3 2 1 |
| 2646 | * 10987654321098765432109876543210 |
| 2647 | * 001000 x1110000101 |
| 2648 | * rt ----- |
| 2649 | * rs ----- |
| 2650 | * rd ----- |
| 2651 | */ |
| 2652 | static char *BC2EQZC(uint64 instruction, Dis_info *info) |
| 2653 | { |
| 2654 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
| 2655 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2656 | |
| 2657 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2658 | |
| 2659 | return img_format("BC2EQZC CP%" PRIu64 ", %s", ct_value, s); |
| 2660 | } |
| 2661 | |
| 2662 | |
| 2663 | /* |
| 2664 | * |
| 2665 | * |
| 2666 | * 3 2 1 |
| 2667 | * 10987654321098765432109876543210 |
| 2668 | * 001000 x1110000101 |
| 2669 | * rt ----- |
| 2670 | * rs ----- |
| 2671 | * rd ----- |
| 2672 | */ |
| 2673 | static char *BC2NEZC(uint64 instruction, Dis_info *info) |
| 2674 | { |
| 2675 | uint64 ct_value = extract_ct_25_24_23_22_21(instruction); |
| 2676 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2677 | |
| 2678 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2679 | |
| 2680 | return img_format("BC2NEZC CP%" PRIu64 ", %s", ct_value, s); |
| 2681 | } |
| 2682 | |
| 2683 | |
| 2684 | /* |
| 2685 | * |
| 2686 | * |
| 2687 | * 3 2 1 |
| 2688 | * 10987654321098765432109876543210 |
| 2689 | * 001000 x1110000101 |
| 2690 | * rt ----- |
| 2691 | * rs ----- |
| 2692 | * rd ----- |
| 2693 | */ |
| 2694 | static char *BEQC_16_(uint64 instruction, Dis_info *info) |
| 2695 | { |
| 2696 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2697 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 2698 | uint64 u_value = extract_u_3_2_1_0__s1(instruction); |
| 2699 | |
| 2700 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 2701 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2702 | g_autofree char *u = ADDRESS(u_value, 2, info); |
| 2703 | |
| 2704 | return img_format("BEQC %s, %s, %s", rs3, rt3, u); |
| 2705 | } |
| 2706 | |
| 2707 | |
| 2708 | /* |
| 2709 | * |
| 2710 | * |
| 2711 | * 3 2 1 |
| 2712 | * 10987654321098765432109876543210 |
| 2713 | * 001000 x1110000101 |
| 2714 | * rt ----- |
| 2715 | * rs ----- |
| 2716 | * rd ----- |
| 2717 | */ |
| 2718 | static char *BEQC_32_(uint64 instruction, Dis_info *info) |
| 2719 | { |
| 2720 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2721 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2722 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2723 | |
| 2724 | const char *rs = GPR(rs_value, info); |
| 2725 | const char *rt = GPR(rt_value, info); |
| 2726 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2727 | |
| 2728 | return img_format("BEQC %s, %s, %s", rs, rt, s); |
| 2729 | } |
| 2730 | |
| 2731 | |
| 2732 | /* |
| 2733 | * |
| 2734 | * |
| 2735 | * 3 2 1 |
| 2736 | * 10987654321098765432109876543210 |
| 2737 | * 001000 x1110000101 |
| 2738 | * rt ----- |
| 2739 | * rs ----- |
| 2740 | * rd ----- |
| 2741 | */ |
| 2742 | static char *BEQIC(uint64 instruction, Dis_info *info) |
| 2743 | { |
| 2744 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2745 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 2746 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2747 | |
| 2748 | const char *rt = GPR(rt_value, info); |
| 2749 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2750 | |
| 2751 | return img_format("BEQIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 2752 | } |
| 2753 | |
| 2754 | |
| 2755 | /* |
| 2756 | * |
| 2757 | * |
| 2758 | * 3 2 1 |
| 2759 | * 10987654321098765432109876543210 |
| 2760 | * 001000 x1110000101 |
| 2761 | * rt ----- |
| 2762 | * rs ----- |
| 2763 | * rd ----- |
| 2764 | */ |
| 2765 | static char *BEQZC_16_(uint64 instruction, Dis_info *info) |
| 2766 | { |
| 2767 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2768 | int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction); |
| 2769 | |
| 2770 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2771 | g_autofree char *s = ADDRESS(s_value, 2, info); |
| 2772 | |
| 2773 | return img_format("BEQZC %s, %s", rt3, s); |
| 2774 | } |
| 2775 | |
| 2776 | |
| 2777 | /* |
| 2778 | * |
| 2779 | * |
| 2780 | * 3 2 1 |
| 2781 | * 10987654321098765432109876543210 |
| 2782 | * 001000 x1110000101 |
| 2783 | * rt ----- |
| 2784 | * rs ----- |
| 2785 | * rd ----- |
| 2786 | */ |
| 2787 | static char *BGEC(uint64 instruction, Dis_info *info) |
| 2788 | { |
| 2789 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2790 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2791 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2792 | |
| 2793 | const char *rs = GPR(rs_value, info); |
| 2794 | const char *rt = GPR(rt_value, info); |
| 2795 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2796 | |
| 2797 | return img_format("BGEC %s, %s, %s", rs, rt, s); |
| 2798 | } |
| 2799 | |
| 2800 | |
| 2801 | /* |
| 2802 | * |
| 2803 | * |
| 2804 | * 3 2 1 |
| 2805 | * 10987654321098765432109876543210 |
| 2806 | * 001000 x1110000101 |
| 2807 | * rt ----- |
| 2808 | * rs ----- |
| 2809 | * rd ----- |
| 2810 | */ |
| 2811 | static char *BGEIC(uint64 instruction, Dis_info *info) |
| 2812 | { |
| 2813 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2814 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 2815 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2816 | |
| 2817 | const char *rt = GPR(rt_value, info); |
| 2818 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2819 | |
| 2820 | return img_format("BGEIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 2821 | } |
| 2822 | |
| 2823 | |
| 2824 | /* |
| 2825 | * |
| 2826 | * |
| 2827 | * 3 2 1 |
| 2828 | * 10987654321098765432109876543210 |
| 2829 | * 001000 x1110000101 |
| 2830 | * rt ----- |
| 2831 | * rs ----- |
| 2832 | * rd ----- |
| 2833 | */ |
| 2834 | static char *BGEIUC(uint64 instruction, Dis_info *info) |
| 2835 | { |
| 2836 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2837 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 2838 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2839 | |
| 2840 | const char *rt = GPR(rt_value, info); |
| 2841 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2842 | |
| 2843 | return img_format("BGEIUC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 2844 | } |
| 2845 | |
| 2846 | |
| 2847 | /* |
| 2848 | * |
| 2849 | * |
| 2850 | * 3 2 1 |
| 2851 | * 10987654321098765432109876543210 |
| 2852 | * 001000 x1110000101 |
| 2853 | * rt ----- |
| 2854 | * rs ----- |
| 2855 | * rd ----- |
| 2856 | */ |
| 2857 | static char *BGEUC(uint64 instruction, Dis_info *info) |
| 2858 | { |
| 2859 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2860 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2861 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2862 | |
| 2863 | const char *rs = GPR(rs_value, info); |
| 2864 | const char *rt = GPR(rt_value, info); |
| 2865 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2866 | |
| 2867 | return img_format("BGEUC %s, %s, %s", rs, rt, s); |
| 2868 | } |
| 2869 | |
| 2870 | |
| 2871 | /* |
| 2872 | * |
| 2873 | * |
| 2874 | * 3 2 1 |
| 2875 | * 10987654321098765432109876543210 |
| 2876 | * 001000 x1110000101 |
| 2877 | * rt ----- |
| 2878 | * rs ----- |
| 2879 | * rd ----- |
| 2880 | */ |
| 2881 | static char *BLTC(uint64 instruction, Dis_info *info) |
| 2882 | { |
| 2883 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2884 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2885 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2886 | |
| 2887 | const char *rs = GPR(rs_value, info); |
| 2888 | const char *rt = GPR(rt_value, info); |
| 2889 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2890 | |
| 2891 | return img_format("BLTC %s, %s, %s", rs, rt, s); |
| 2892 | } |
| 2893 | |
| 2894 | |
| 2895 | /* |
| 2896 | * |
| 2897 | * |
| 2898 | * 3 2 1 |
| 2899 | * 10987654321098765432109876543210 |
| 2900 | * 001000 x1110000101 |
| 2901 | * rt ----- |
| 2902 | * rs ----- |
| 2903 | * rd ----- |
| 2904 | */ |
| 2905 | static char *BLTIC(uint64 instruction, Dis_info *info) |
| 2906 | { |
| 2907 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2908 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 2909 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2910 | |
| 2911 | const char *rt = GPR(rt_value, info); |
| 2912 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2913 | |
| 2914 | return img_format("BLTIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 2915 | } |
| 2916 | |
| 2917 | |
| 2918 | /* |
| 2919 | * |
| 2920 | * |
| 2921 | * 3 2 1 |
| 2922 | * 10987654321098765432109876543210 |
| 2923 | * 001000 x1110000101 |
| 2924 | * rt ----- |
| 2925 | * rs ----- |
| 2926 | * rd ----- |
| 2927 | */ |
| 2928 | static char *BLTIUC(uint64 instruction, Dis_info *info) |
| 2929 | { |
| 2930 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2931 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 2932 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 2933 | |
| 2934 | const char *rt = GPR(rt_value, info); |
| 2935 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2936 | |
| 2937 | return img_format("BLTIUC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 2938 | } |
| 2939 | |
| 2940 | |
| 2941 | /* |
| 2942 | * |
| 2943 | * |
| 2944 | * 3 2 1 |
| 2945 | * 10987654321098765432109876543210 |
| 2946 | * 001000 x1110000101 |
| 2947 | * rt ----- |
| 2948 | * rs ----- |
| 2949 | * rd ----- |
| 2950 | */ |
| 2951 | static char *BLTUC(uint64 instruction, Dis_info *info) |
| 2952 | { |
| 2953 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 2954 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 2955 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 2956 | |
| 2957 | const char *rs = GPR(rs_value, info); |
| 2958 | const char *rt = GPR(rt_value, info); |
| 2959 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 2960 | |
| 2961 | return img_format("BLTUC %s, %s, %s", rs, rt, s); |
| 2962 | } |
| 2963 | |
| 2964 | |
| 2965 | /* |
| 2966 | * |
| 2967 | * |
| 2968 | * 3 2 1 |
| 2969 | * 10987654321098765432109876543210 |
| 2970 | * 001000 x1110000101 |
| 2971 | * rt ----- |
| 2972 | * rs ----- |
| 2973 | * rd ----- |
| 2974 | */ |
| 2975 | static char *BNEC_16_(uint64 instruction, Dis_info *info) |
| 2976 | { |
| 2977 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 2978 | uint64 rs3_value = extract_rs3_6_5_4(instruction); |
| 2979 | uint64 u_value = extract_u_3_2_1_0__s1(instruction); |
| 2980 | |
| 2981 | const char *rs3 = GPR(decode_gpr_gpr3(rs3_value, info), info); |
| 2982 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 2983 | g_autofree char *u = ADDRESS(u_value, 2, info); |
| 2984 | |
| 2985 | return img_format("BNEC %s, %s, %s", rs3, rt3, u); |
| 2986 | } |
| 2987 | |
| 2988 | |
| 2989 | /* |
| 2990 | * |
| 2991 | * |
| 2992 | * 3 2 1 |
| 2993 | * 10987654321098765432109876543210 |
| 2994 | * 001000 x1110000101 |
| 2995 | * rt ----- |
| 2996 | * rs ----- |
| 2997 | * rd ----- |
| 2998 | */ |
| 2999 | static char *BNEC_32_(uint64 instruction, Dis_info *info) |
| 3000 | { |
| 3001 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3002 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3003 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 3004 | |
| 3005 | const char *rs = GPR(rs_value, info); |
| 3006 | const char *rt = GPR(rt_value, info); |
| 3007 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 3008 | |
| 3009 | return img_format("BNEC %s, %s, %s", rs, rt, s); |
| 3010 | } |
| 3011 | |
| 3012 | |
| 3013 | /* |
| 3014 | * |
| 3015 | * |
| 3016 | * 3 2 1 |
| 3017 | * 10987654321098765432109876543210 |
| 3018 | * 001000 x1110000101 |
| 3019 | * rt ----- |
| 3020 | * rs ----- |
| 3021 | * rd ----- |
| 3022 | */ |
| 3023 | static char *BNEIC(uint64 instruction, Dis_info *info) |
| 3024 | { |
| 3025 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3026 | uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); |
| 3027 | int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction); |
| 3028 | |
| 3029 | const char *rt = GPR(rt_value, info); |
| 3030 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 3031 | |
| 3032 | return img_format("BNEIC %s, 0x%" PRIx64 ", %s", rt, u_value, s); |
| 3033 | } |
| 3034 | |
| 3035 | |
| 3036 | /* |
| 3037 | * |
| 3038 | * |
| 3039 | * 3 2 1 |
| 3040 | * 10987654321098765432109876543210 |
| 3041 | * 001000 x1110000101 |
| 3042 | * rt ----- |
| 3043 | * rs ----- |
| 3044 | * rd ----- |
| 3045 | */ |
| 3046 | static char *BNEZC_16_(uint64 instruction, Dis_info *info) |
| 3047 | { |
| 3048 | uint64 rt3_value = extract_rt3_9_8_7(instruction); |
| 3049 | int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction); |
| 3050 | |
| 3051 | const char *rt3 = GPR(decode_gpr_gpr3(rt3_value, info), info); |
| 3052 | g_autofree char *s = ADDRESS(s_value, 2, info); |
| 3053 | |
| 3054 | return img_format("BNEZC %s, %s", rt3, s); |
| 3055 | } |
| 3056 | |
| 3057 | |
| 3058 | /* |
| 3059 | * [DSP] BPOSGE32C offset - Branch on greater than or equal to value 32 in |
| 3060 | * DSPControl Pos field |
| 3061 | * |
| 3062 | * 3 2 1 |
| 3063 | * 10987654321098765432109876543210 |
| 3064 | * 100010xxxxx0010001 |
| 3065 | * s[13:1] ------------- |
| 3066 | * s[14] - |
| 3067 | */ |
| 3068 | static char *BPOSGE32C(uint64 instruction, Dis_info *info) |
| 3069 | { |
| 3070 | int64 s_value = extract_s__se14_0_13_to_1_s1(instruction); |
| 3071 | |
| 3072 | g_autofree char *s = ADDRESS(s_value, 4, info); |
| 3073 | |
| 3074 | return img_format("BPOSGE32C %s", s); |
| 3075 | } |
| 3076 | |
| 3077 | |
| 3078 | /* |
| 3079 | * |
| 3080 | * |
| 3081 | * 3 2 1 |
| 3082 | * 10987654321098765432109876543210 |
| 3083 | * 001000 x1110000101 |
| 3084 | * rt ----- |
| 3085 | * rs ----- |
| 3086 | * rd ----- |
| 3087 | */ |
| 3088 | static char *BREAK_16_(uint64 instruction, Dis_info *info) |
| 3089 | { |
| 3090 | uint64 code_value = extract_code_2_1_0(instruction); |
| 3091 | |
| 3092 | |
| 3093 | return img_format("BREAK 0x%" PRIx64, code_value); |
| 3094 | } |
| 3095 | |
| 3096 | |
| 3097 | /* |
| 3098 | * BREAK code - Break. Cause a Breakpoint exception |
| 3099 | * |
| 3100 | * 3 2 1 |
| 3101 | * 10987654321098765432109876543210 |
| 3102 | * 001000 x1110000101 |
| 3103 | * rt ----- |
| 3104 | * rs ----- |
| 3105 | * rd ----- |
| 3106 | */ |
| 3107 | static char *BREAK_32_(uint64 instruction, Dis_info *info) |
| 3108 | { |
| 3109 | uint64 code_value = extract_code_18_to_0(instruction); |
| 3110 | |
| 3111 | |
| 3112 | return img_format("BREAK 0x%" PRIx64, code_value); |
| 3113 | } |
| 3114 | |
| 3115 | |
| 3116 | /* |
| 3117 | * |
| 3118 | * |
| 3119 | * 3 2 1 |
| 3120 | * 10987654321098765432109876543210 |
| 3121 | * 001000 x1110000101 |
| 3122 | * rt ----- |
| 3123 | * rs ----- |
| 3124 | * rd ----- |
| 3125 | */ |
| 3126 | static char *BRSC(uint64 instruction, Dis_info *info) |
| 3127 | { |
| 3128 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3129 | |
| 3130 | const char *rs = GPR(rs_value, info); |
| 3131 | |
| 3132 | return img_format("BRSC %s", rs); |
| 3133 | } |
| 3134 | |
| 3135 | |
| 3136 | /* |
| 3137 | * |
| 3138 | * |
| 3139 | * 3 2 1 |
| 3140 | * 10987654321098765432109876543210 |
| 3141 | * 001000 x1110000101 |
| 3142 | * rt ----- |
| 3143 | * rs ----- |
| 3144 | * rd ----- |
| 3145 | */ |
| 3146 | static char *CACHE(uint64 instruction, Dis_info *info) |
| 3147 | { |
| 3148 | uint64 op_value = extract_op_25_24_23_22_21(instruction); |
| 3149 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3150 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
| 3151 | |
| 3152 | const char *rs = GPR(rs_value, info); |
| 3153 | |
| 3154 | return img_format("CACHE 0x%" PRIx64 ", %" PRId64 "(%s)", |
| 3155 | op_value, s_value, rs); |
| 3156 | } |
| 3157 | |
| 3158 | |
| 3159 | /* |
| 3160 | * |
| 3161 | * |
| 3162 | * 3 2 1 |
| 3163 | * 10987654321098765432109876543210 |
| 3164 | * 001000 x1110000101 |
| 3165 | * rt ----- |
| 3166 | * rs ----- |
| 3167 | * rd ----- |
| 3168 | */ |
| 3169 | static char *CACHEE(uint64 instruction, Dis_info *info) |
| 3170 | { |
| 3171 | uint64 op_value = extract_op_25_24_23_22_21(instruction); |
| 3172 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3173 | int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction); |
| 3174 | |
| 3175 | const char *rs = GPR(rs_value, info); |
| 3176 | |
| 3177 | return img_format("CACHEE 0x%" PRIx64 ", %" PRId64 "(%s)", |
| 3178 | op_value, s_value, rs); |
| 3179 | } |
| 3180 | |
| 3181 | |
| 3182 | /* |
| 3183 | * |
| 3184 | * |
| 3185 | * 3 2 1 |
| 3186 | * 10987654321098765432109876543210 |
| 3187 | * 001000 x1110000101 |
| 3188 | * rt ----- |
| 3189 | * rs ----- |
| 3190 | * rd ----- |
| 3191 | */ |
| 3192 | static char *CEIL_L_D(uint64 instruction, Dis_info *info) |
| 3193 | { |
| 3194 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3195 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3196 | |
| 3197 | const char *ft = FPR(ft_value, info); |
| 3198 | const char *fs = FPR(fs_value, info); |
| 3199 | |
| 3200 | return img_format("CEIL.L.D %s, %s", ft, fs); |
| 3201 | } |
| 3202 | |
| 3203 | |
| 3204 | /* |
| 3205 | * |
| 3206 | * |
| 3207 | * 3 2 1 |
| 3208 | * 10987654321098765432109876543210 |
| 3209 | * 001000 x1110000101 |
| 3210 | * rt ----- |
| 3211 | * rs ----- |
| 3212 | * rd ----- |
| 3213 | */ |
| 3214 | static char *CEIL_L_S(uint64 instruction, Dis_info *info) |
| 3215 | { |
| 3216 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3217 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3218 | |
| 3219 | const char *ft = FPR(ft_value, info); |
| 3220 | const char *fs = FPR(fs_value, info); |
| 3221 | |
| 3222 | return img_format("CEIL.L.S %s, %s", ft, fs); |
| 3223 | } |
| 3224 | |
| 3225 | |
| 3226 | /* |
| 3227 | * |
| 3228 | * |
| 3229 | * 3 2 1 |
| 3230 | * 10987654321098765432109876543210 |
| 3231 | * 001000 x1110000101 |
| 3232 | * rt ----- |
| 3233 | * rs ----- |
| 3234 | * rd ----- |
| 3235 | */ |
| 3236 | static char *CEIL_W_D(uint64 instruction, Dis_info *info) |
| 3237 | { |
| 3238 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3239 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3240 | |
| 3241 | const char *ft = FPR(ft_value, info); |
| 3242 | const char *fs = FPR(fs_value, info); |
| 3243 | |
| 3244 | return img_format("CEIL.W.D %s, %s", ft, fs); |
| 3245 | } |
| 3246 | |
| 3247 | |
| 3248 | /* |
| 3249 | * |
| 3250 | * |
| 3251 | * 3 2 1 |
| 3252 | * 10987654321098765432109876543210 |
| 3253 | * 001000 x1110000101 |
| 3254 | * rt ----- |
| 3255 | * rs ----- |
| 3256 | * rd ----- |
| 3257 | */ |
| 3258 | static char *CEIL_W_S(uint64 instruction, Dis_info *info) |
| 3259 | { |
| 3260 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3261 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3262 | |
| 3263 | const char *ft = FPR(ft_value, info); |
| 3264 | const char *fs = FPR(fs_value, info); |
| 3265 | |
| 3266 | return img_format("CEIL.W.S %s, %s", ft, fs); |
| 3267 | } |
| 3268 | |
| 3269 | |
| 3270 | /* |
| 3271 | * |
| 3272 | * |
| 3273 | * 3 2 1 |
| 3274 | * 10987654321098765432109876543210 |
| 3275 | * 001000 x1110000101 |
| 3276 | * rt ----- |
| 3277 | * rs ----- |
| 3278 | * rd ----- |
| 3279 | */ |
| 3280 | static char *CFC1(uint64 instruction, Dis_info *info) |
| 3281 | { |
| 3282 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3283 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
| 3284 | |
| 3285 | const char *rt = GPR(rt_value, info); |
| 3286 | |
| 3287 | return img_format("CFC1 %s, CP%" PRIu64, rt, cs_value); |
| 3288 | } |
| 3289 | |
| 3290 | |
| 3291 | /* |
| 3292 | * |
| 3293 | * |
| 3294 | * 3 2 1 |
| 3295 | * 10987654321098765432109876543210 |
| 3296 | * 001000 x1110000101 |
| 3297 | * rt ----- |
| 3298 | * rs ----- |
| 3299 | * rd ----- |
| 3300 | */ |
| 3301 | static char *CFC2(uint64 instruction, Dis_info *info) |
| 3302 | { |
| 3303 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3304 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
| 3305 | |
| 3306 | const char *rt = GPR(rt_value, info); |
| 3307 | |
| 3308 | return img_format("CFC2 %s, CP%" PRIu64, rt, cs_value); |
| 3309 | } |
| 3310 | |
| 3311 | |
| 3312 | /* |
| 3313 | * |
| 3314 | * |
| 3315 | * 3 2 1 |
| 3316 | * 10987654321098765432109876543210 |
| 3317 | * 001000 x1110000101 |
| 3318 | * rt ----- |
| 3319 | * rs ----- |
| 3320 | * rd ----- |
| 3321 | */ |
| 3322 | static char *CLASS_D(uint64 instruction, Dis_info *info) |
| 3323 | { |
| 3324 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3325 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3326 | |
| 3327 | const char *ft = FPR(ft_value, info); |
| 3328 | const char *fs = FPR(fs_value, info); |
| 3329 | |
| 3330 | return img_format("CLASS.D %s, %s", ft, fs); |
| 3331 | } |
| 3332 | |
| 3333 | |
| 3334 | /* |
| 3335 | * |
| 3336 | * |
| 3337 | * 3 2 1 |
| 3338 | * 10987654321098765432109876543210 |
| 3339 | * 001000 x1110000101 |
| 3340 | * rt ----- |
| 3341 | * rs ----- |
| 3342 | * rd ----- |
| 3343 | */ |
| 3344 | static char *CLASS_S(uint64 instruction, Dis_info *info) |
| 3345 | { |
| 3346 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3347 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3348 | |
| 3349 | const char *ft = FPR(ft_value, info); |
| 3350 | const char *fs = FPR(fs_value, info); |
| 3351 | |
| 3352 | return img_format("CLASS.S %s, %s", ft, fs); |
| 3353 | } |
| 3354 | |
| 3355 | |
| 3356 | /* |
| 3357 | * |
| 3358 | * |
| 3359 | * 3 2 1 |
| 3360 | * 10987654321098765432109876543210 |
| 3361 | * 001000 x1110000101 |
| 3362 | * rt ----- |
| 3363 | * rs ----- |
| 3364 | * rd ----- |
| 3365 | */ |
| 3366 | static char *CLO(uint64 instruction, Dis_info *info) |
| 3367 | { |
| 3368 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3369 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3370 | |
| 3371 | const char *rt = GPR(rt_value, info); |
| 3372 | const char *rs = GPR(rs_value, info); |
| 3373 | |
| 3374 | return img_format("CLO %s, %s", rt, rs); |
| 3375 | } |
| 3376 | |
| 3377 | |
| 3378 | /* |
| 3379 | * |
| 3380 | * |
| 3381 | * 3 2 1 |
| 3382 | * 10987654321098765432109876543210 |
| 3383 | * 001000 x1110000101 |
| 3384 | * rt ----- |
| 3385 | * rs ----- |
| 3386 | * rd ----- |
| 3387 | */ |
| 3388 | static char *CLZ(uint64 instruction, Dis_info *info) |
| 3389 | { |
| 3390 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3391 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3392 | |
| 3393 | const char *rt = GPR(rt_value, info); |
| 3394 | const char *rs = GPR(rs_value, info); |
| 3395 | |
| 3396 | return img_format("CLZ %s, %s", rt, rs); |
| 3397 | } |
| 3398 | |
| 3399 | |
| 3400 | /* |
| 3401 | * |
| 3402 | * |
| 3403 | * 3 2 1 |
| 3404 | * 10987654321098765432109876543210 |
| 3405 | * 001000 x1110000101 |
| 3406 | * rt ----- |
| 3407 | * rs ----- |
| 3408 | * rd ----- |
| 3409 | */ |
| 3410 | static char *CMP_AF_D(uint64 instruction, Dis_info *info) |
| 3411 | { |
| 3412 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3413 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3414 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3415 | |
| 3416 | const char *fd = FPR(fd_value, info); |
| 3417 | const char *fs = FPR(fs_value, info); |
| 3418 | const char *ft = FPR(ft_value, info); |
| 3419 | |
| 3420 | return img_format("CMP.AF.D %s, %s, %s", fd, fs, ft); |
| 3421 | } |
| 3422 | |
| 3423 | |
| 3424 | /* |
| 3425 | * |
| 3426 | * |
| 3427 | * 3 2 1 |
| 3428 | * 10987654321098765432109876543210 |
| 3429 | * 001000 x1110000101 |
| 3430 | * rt ----- |
| 3431 | * rs ----- |
| 3432 | * rd ----- |
| 3433 | */ |
| 3434 | static char *CMP_AF_S(uint64 instruction, Dis_info *info) |
| 3435 | { |
| 3436 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3437 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3438 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3439 | |
| 3440 | const char *fd = FPR(fd_value, info); |
| 3441 | const char *fs = FPR(fs_value, info); |
| 3442 | const char *ft = FPR(ft_value, info); |
| 3443 | |
| 3444 | return img_format("CMP.AF.S %s, %s, %s", fd, fs, ft); |
| 3445 | } |
| 3446 | |
| 3447 | |
| 3448 | /* |
| 3449 | * |
| 3450 | * |
| 3451 | * 3 2 1 |
| 3452 | * 10987654321098765432109876543210 |
| 3453 | * 001000 x1110000101 |
| 3454 | * rt ----- |
| 3455 | * rs ----- |
| 3456 | * rd ----- |
| 3457 | */ |
| 3458 | static char *CMP_EQ_D(uint64 instruction, Dis_info *info) |
| 3459 | { |
| 3460 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3461 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3462 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3463 | |
| 3464 | const char *fd = FPR(fd_value, info); |
| 3465 | const char *fs = FPR(fs_value, info); |
| 3466 | const char *ft = FPR(ft_value, info); |
| 3467 | |
| 3468 | return img_format("CMP.EQ.D %s, %s, %s", fd, fs, ft); |
| 3469 | } |
| 3470 | |
| 3471 | |
| 3472 | /* |
| 3473 | * [DSP] CMP.EQ.PH rs, rt - Compare vectors of signed integer halfword values |
| 3474 | * |
| 3475 | * 3 2 1 |
| 3476 | * 10987654321098765432109876543210 |
| 3477 | * 001000 xxxxxx0000000101 |
| 3478 | * rt ----- |
| 3479 | * rs ----- |
| 3480 | */ |
| 3481 | static char *CMP_EQ_PH(uint64 instruction, Dis_info *info) |
| 3482 | { |
| 3483 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3484 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3485 | |
| 3486 | const char *rs = GPR(rs_value, info); |
| 3487 | const char *rt = GPR(rt_value, info); |
| 3488 | |
| 3489 | return img_format("CMP.EQ.PH %s, %s", rs, rt); |
| 3490 | } |
| 3491 | |
| 3492 | |
| 3493 | /* |
| 3494 | * |
| 3495 | * |
| 3496 | * 3 2 1 |
| 3497 | * 10987654321098765432109876543210 |
| 3498 | * 001000 x1110000101 |
| 3499 | * rt ----- |
| 3500 | * rs ----- |
| 3501 | * rd ----- |
| 3502 | */ |
| 3503 | static char *CMP_EQ_S(uint64 instruction, Dis_info *info) |
| 3504 | { |
| 3505 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3506 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3507 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3508 | |
| 3509 | const char *fd = FPR(fd_value, info); |
| 3510 | const char *fs = FPR(fs_value, info); |
| 3511 | const char *ft = FPR(ft_value, info); |
| 3512 | |
| 3513 | return img_format("CMP.EQ.S %s, %s, %s", fd, fs, ft); |
| 3514 | } |
| 3515 | |
| 3516 | |
| 3517 | /* |
| 3518 | * |
| 3519 | * |
| 3520 | * 3 2 1 |
| 3521 | * 10987654321098765432109876543210 |
| 3522 | * 001000 x1110000101 |
| 3523 | * rt ----- |
| 3524 | * rs ----- |
| 3525 | * rd ----- |
| 3526 | */ |
| 3527 | static char *CMP_LE_D(uint64 instruction, Dis_info *info) |
| 3528 | { |
| 3529 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3530 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3531 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3532 | |
| 3533 | const char *fd = FPR(fd_value, info); |
| 3534 | const char *fs = FPR(fs_value, info); |
| 3535 | const char *ft = FPR(ft_value, info); |
| 3536 | |
| 3537 | return img_format("CMP.LE.D %s, %s, %s", fd, fs, ft); |
| 3538 | } |
| 3539 | |
| 3540 | |
| 3541 | /* |
| 3542 | * [DSP] CMP.LE.PH rs, rt - Compare vectors of signed integer halfword values |
| 3543 | * |
| 3544 | * 3 2 1 |
| 3545 | * 10987654321098765432109876543210 |
| 3546 | * 001000 xxxxxx0010000101 |
| 3547 | * rt ----- |
| 3548 | * rs ----- |
| 3549 | */ |
| 3550 | static char *CMP_LE_PH(uint64 instruction, Dis_info *info) |
| 3551 | { |
| 3552 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3553 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3554 | |
| 3555 | const char *rs = GPR(rs_value, info); |
| 3556 | const char *rt = GPR(rt_value, info); |
| 3557 | |
| 3558 | return img_format("CMP.LE.PH %s, %s", rs, rt); |
| 3559 | } |
| 3560 | |
| 3561 | |
| 3562 | /* |
| 3563 | * |
| 3564 | * |
| 3565 | * 3 2 1 |
| 3566 | * 10987654321098765432109876543210 |
| 3567 | * 001000 x1110000101 |
| 3568 | * rt ----- |
| 3569 | * rs ----- |
| 3570 | * rd ----- |
| 3571 | */ |
| 3572 | static char *CMP_LE_S(uint64 instruction, Dis_info *info) |
| 3573 | { |
| 3574 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3575 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3576 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3577 | |
| 3578 | const char *fd = FPR(fd_value, info); |
| 3579 | const char *fs = FPR(fs_value, info); |
| 3580 | const char *ft = FPR(ft_value, info); |
| 3581 | |
| 3582 | return img_format("CMP.LE.S %s, %s, %s", fd, fs, ft); |
| 3583 | } |
| 3584 | |
| 3585 | |
| 3586 | /* |
| 3587 | * |
| 3588 | * |
| 3589 | * 3 2 1 |
| 3590 | * 10987654321098765432109876543210 |
| 3591 | * 001000 x1110000101 |
| 3592 | * rt ----- |
| 3593 | * rs ----- |
| 3594 | * rd ----- |
| 3595 | */ |
| 3596 | static char *CMP_LT_D(uint64 instruction, Dis_info *info) |
| 3597 | { |
| 3598 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3599 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3600 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3601 | |
| 3602 | const char *fd = FPR(fd_value, info); |
| 3603 | const char *fs = FPR(fs_value, info); |
| 3604 | const char *ft = FPR(ft_value, info); |
| 3605 | |
| 3606 | return img_format("CMP.LT.D %s, %s, %s", fd, fs, ft); |
| 3607 | } |
| 3608 | |
| 3609 | |
| 3610 | /* |
| 3611 | * [DSP] CMP.LT.PH rs, rt - Compare vectors of signed integer halfword values |
| 3612 | * |
| 3613 | * 3 2 1 |
| 3614 | * 10987654321098765432109876543210 |
| 3615 | * 001000 xxxxxx0001000101 |
| 3616 | * rt ----- |
| 3617 | * rs ----- |
| 3618 | */ |
| 3619 | static char *CMP_LT_PH(uint64 instruction, Dis_info *info) |
| 3620 | { |
| 3621 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 3622 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 3623 | |
| 3624 | const char *rs = GPR(rs_value, info); |
| 3625 | const char *rt = GPR(rt_value, info); |
| 3626 | |
| 3627 | return img_format("CMP.LT.PH %s, %s", rs, rt); |
| 3628 | } |
| 3629 | |
| 3630 | |
| 3631 | /* |
| 3632 | * |
| 3633 | * |
| 3634 | * 3 2 1 |
| 3635 | * 10987654321098765432109876543210 |
| 3636 | * 001000 x1110000101 |
| 3637 | * rt ----- |
| 3638 | * rs ----- |
| 3639 | * rd ----- |
| 3640 | */ |
| 3641 | static char *CMP_LT_S(uint64 instruction, Dis_info *info) |
| 3642 | { |
| 3643 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3644 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3645 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3646 | |
| 3647 | const char *fd = FPR(fd_value, info); |
| 3648 | const char *fs = FPR(fs_value, info); |
| 3649 | const char *ft = FPR(ft_value, info); |
| 3650 | |
| 3651 | return img_format("CMP.LT.S %s, %s, %s", fd, fs, ft); |
| 3652 | } |
| 3653 | |
| 3654 | |
| 3655 | /* |
| 3656 | * |
| 3657 | * |
| 3658 | * 3 2 1 |
| 3659 | * 10987654321098765432109876543210 |
| 3660 | * 001000 x1110000101 |
| 3661 | * rt ----- |
| 3662 | * rs ----- |
| 3663 | * rd ----- |
| 3664 | */ |
| 3665 | static char *CMP_NE_D(uint64 instruction, Dis_info *info) |
| 3666 | { |
| 3667 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3668 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3669 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3670 | |
| 3671 | const char *fd = FPR(fd_value, info); |
| 3672 | const char *fs = FPR(fs_value, info); |
| 3673 | const char *ft = FPR(ft_value, info); |
| 3674 | |
| 3675 | return img_format("CMP.NE.D %s, %s, %s", fd, fs, ft); |
| 3676 | } |
| 3677 | |
| 3678 | |
| 3679 | /* |
| 3680 | * |
| 3681 | * |
| 3682 | * 3 2 1 |
| 3683 | * 10987654321098765432109876543210 |
| 3684 | * 001000 x1110000101 |
| 3685 | * rt ----- |
| 3686 | * rs ----- |
| 3687 | * rd ----- |
| 3688 | */ |
| 3689 | static char *CMP_NE_S(uint64 instruction, Dis_info *info) |
| 3690 | { |
| 3691 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3692 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3693 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3694 | |
| 3695 | const char *fd = FPR(fd_value, info); |
| 3696 | const char *fs = FPR(fs_value, info); |
| 3697 | const char *ft = FPR(ft_value, info); |
| 3698 | |
| 3699 | return img_format("CMP.NE.S %s, %s, %s", fd, fs, ft); |
| 3700 | } |
| 3701 | |
| 3702 | |
| 3703 | /* |
| 3704 | * |
| 3705 | * |
| 3706 | * 3 2 1 |
| 3707 | * 10987654321098765432109876543210 |
| 3708 | * 001000 x1110000101 |
| 3709 | * rt ----- |
| 3710 | * rs ----- |
| 3711 | * rd ----- |
| 3712 | */ |
| 3713 | static char *CMP_OR_D(uint64 instruction, Dis_info *info) |
| 3714 | { |
| 3715 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3716 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3717 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3718 | |
| 3719 | const char *fd = FPR(fd_value, info); |
| 3720 | const char *fs = FPR(fs_value, info); |
| 3721 | const char *ft = FPR(ft_value, info); |
| 3722 | |
| 3723 | return img_format("CMP.OR.D %s, %s, %s", fd, fs, ft); |
| 3724 | } |
| 3725 | |
| 3726 | |
| 3727 | /* |
| 3728 | * |
| 3729 | * |
| 3730 | * 3 2 1 |
| 3731 | * 10987654321098765432109876543210 |
| 3732 | * 001000 x1110000101 |
| 3733 | * rt ----- |
| 3734 | * rs ----- |
| 3735 | * rd ----- |
| 3736 | */ |
| 3737 | static char *CMP_OR_S(uint64 instruction, Dis_info *info) |
| 3738 | { |
| 3739 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3740 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3741 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3742 | |
| 3743 | const char *fd = FPR(fd_value, info); |
| 3744 | const char *fs = FPR(fs_value, info); |
| 3745 | const char *ft = FPR(ft_value, info); |
| 3746 | |
| 3747 | return img_format("CMP.OR.S %s, %s, %s", fd, fs, ft); |
| 3748 | } |
| 3749 | |
| 3750 | |
| 3751 | /* |
| 3752 | * |
| 3753 | * |
| 3754 | * 3 2 1 |
| 3755 | * 10987654321098765432109876543210 |
| 3756 | * 001000 x1110000101 |
| 3757 | * rt ----- |
| 3758 | * rs ----- |
| 3759 | * rd ----- |
| 3760 | */ |
| 3761 | static char *CMP_SAF_D(uint64 instruction, Dis_info *info) |
| 3762 | { |
| 3763 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3764 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3765 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3766 | |
| 3767 | const char *fd = FPR(fd_value, info); |
| 3768 | const char *fs = FPR(fs_value, info); |
| 3769 | const char *ft = FPR(ft_value, info); |
| 3770 | |
| 3771 | return img_format("CMP.SAF.D %s, %s, %s", fd, fs, ft); |
| 3772 | } |
| 3773 | |
| 3774 | |
| 3775 | /* |
| 3776 | * |
| 3777 | * |
| 3778 | * 3 2 1 |
| 3779 | * 10987654321098765432109876543210 |
| 3780 | * 001000 x1110000101 |
| 3781 | * rt ----- |
| 3782 | * rs ----- |
| 3783 | * rd ----- |
| 3784 | */ |
| 3785 | static char *CMP_SAF_S(uint64 instruction, Dis_info *info) |
| 3786 | { |
| 3787 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3788 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3789 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3790 | |
| 3791 | const char *fd = FPR(fd_value, info); |
| 3792 | const char *fs = FPR(fs_value, info); |
| 3793 | const char *ft = FPR(ft_value, info); |
| 3794 | |
| 3795 | return img_format("CMP.SAF.S %s, %s, %s", fd, fs, ft); |
| 3796 | } |
| 3797 | |
| 3798 | |
| 3799 | /* |
| 3800 | * |
| 3801 | * |
| 3802 | * 3 2 1 |
| 3803 | * 10987654321098765432109876543210 |
| 3804 | * 001000 x1110000101 |
| 3805 | * rt ----- |
| 3806 | * rs ----- |
| 3807 | * rd ----- |
| 3808 | */ |
| 3809 | static char *CMP_SEQ_D(uint64 instruction, Dis_info *info) |
| 3810 | { |
| 3811 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3812 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3813 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3814 | |
| 3815 | const char *fd = FPR(fd_value, info); |
| 3816 | const char *fs = FPR(fs_value, info); |
| 3817 | const char *ft = FPR(ft_value, info); |
| 3818 | |
| 3819 | return img_format("CMP.SEQ.D %s, %s, %s", fd, fs, ft); |
| 3820 | } |
| 3821 | |
| 3822 | |
| 3823 | /* |
| 3824 | * |
| 3825 | * |
| 3826 | * 3 2 1 |
| 3827 | * 10987654321098765432109876543210 |
| 3828 | * 001000 x1110000101 |
| 3829 | * rt ----- |
| 3830 | * rs ----- |
| 3831 | * rd ----- |
| 3832 | */ |
| 3833 | static char *CMP_SEQ_S(uint64 instruction, Dis_info *info) |
| 3834 | { |
| 3835 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3836 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3837 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3838 | |
| 3839 | const char *fd = FPR(fd_value, info); |
| 3840 | const char *fs = FPR(fs_value, info); |
| 3841 | const char *ft = FPR(ft_value, info); |
| 3842 | |
| 3843 | return img_format("CMP.SEQ.S %s, %s, %s", fd, fs, ft); |
| 3844 | } |
| 3845 | |
| 3846 | |
| 3847 | /* |
| 3848 | * |
| 3849 | * |
| 3850 | * 3 2 1 |
| 3851 | * 10987654321098765432109876543210 |
| 3852 | * 001000 x1110000101 |
| 3853 | * rt ----- |
| 3854 | * rs ----- |
| 3855 | * rd ----- |
| 3856 | */ |
| 3857 | static char *CMP_SLE_D(uint64 instruction, Dis_info *info) |
| 3858 | { |
| 3859 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3860 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3861 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3862 | |
| 3863 | const char *fd = FPR(fd_value, info); |
| 3864 | const char *fs = FPR(fs_value, info); |
| 3865 | const char *ft = FPR(ft_value, info); |
| 3866 | |
| 3867 | return img_format("CMP.SLE.D %s, %s, %s", fd, fs, ft); |
| 3868 | } |
| 3869 | |
| 3870 | |
| 3871 | /* |
| 3872 | * |
| 3873 | * |
| 3874 | * 3 2 1 |
| 3875 | * 10987654321098765432109876543210 |
| 3876 | * 001000 x1110000101 |
| 3877 | * rt ----- |
| 3878 | * rs ----- |
| 3879 | * rd ----- |
| 3880 | */ |
| 3881 | static char *CMP_SLE_S(uint64 instruction, Dis_info *info) |
| 3882 | { |
| 3883 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3884 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3885 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3886 | |
| 3887 | const char *fd = FPR(fd_value, info); |
| 3888 | const char *fs = FPR(fs_value, info); |
| 3889 | const char *ft = FPR(ft_value, info); |
| 3890 | |
| 3891 | return img_format("CMP.SLE.S %s, %s, %s", fd, fs, ft); |
| 3892 | } |
| 3893 | |
| 3894 | |
| 3895 | /* |
| 3896 | * |
| 3897 | * |
| 3898 | * 3 2 1 |
| 3899 | * 10987654321098765432109876543210 |
| 3900 | * 001000 x1110000101 |
| 3901 | * rt ----- |
| 3902 | * rs ----- |
| 3903 | * rd ----- |
| 3904 | */ |
| 3905 | static char *CMP_SLT_D(uint64 instruction, Dis_info *info) |
| 3906 | { |
| 3907 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3908 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3909 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3910 | |
| 3911 | const char *fd = FPR(fd_value, info); |
| 3912 | const char *fs = FPR(fs_value, info); |
| 3913 | const char *ft = FPR(ft_value, info); |
| 3914 | |
| 3915 | return img_format("CMP.SLT.D %s, %s, %s", fd, fs, ft); |
| 3916 | } |
| 3917 | |
| 3918 | |
| 3919 | /* |
| 3920 | * |
| 3921 | * |
| 3922 | * 3 2 1 |
| 3923 | * 10987654321098765432109876543210 |
| 3924 | * 001000 x1110000101 |
| 3925 | * rt ----- |
| 3926 | * rs ----- |
| 3927 | * rd ----- |
| 3928 | */ |
| 3929 | static char *CMP_SLT_S(uint64 instruction, Dis_info *info) |
| 3930 | { |
| 3931 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3932 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3933 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3934 | |
| 3935 | const char *fd = FPR(fd_value, info); |
| 3936 | const char *fs = FPR(fs_value, info); |
| 3937 | const char *ft = FPR(ft_value, info); |
| 3938 | |
| 3939 | return img_format("CMP.SLT.S %s, %s, %s", fd, fs, ft); |
| 3940 | } |
| 3941 | |
| 3942 | |
| 3943 | /* |
| 3944 | * |
| 3945 | * |
| 3946 | * 3 2 1 |
| 3947 | * 10987654321098765432109876543210 |
| 3948 | * 001000 x1110000101 |
| 3949 | * rt ----- |
| 3950 | * rs ----- |
| 3951 | * rd ----- |
| 3952 | */ |
| 3953 | static char *CMP_SNE_D(uint64 instruction, Dis_info *info) |
| 3954 | { |
| 3955 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3956 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3957 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3958 | |
| 3959 | const char *fd = FPR(fd_value, info); |
| 3960 | const char *fs = FPR(fs_value, info); |
| 3961 | const char *ft = FPR(ft_value, info); |
| 3962 | |
| 3963 | return img_format("CMP.SNE.D %s, %s, %s", fd, fs, ft); |
| 3964 | } |
| 3965 | |
| 3966 | |
| 3967 | /* |
| 3968 | * |
| 3969 | * |
| 3970 | * 3 2 1 |
| 3971 | * 10987654321098765432109876543210 |
| 3972 | * 001000 x1110000101 |
| 3973 | * rt ----- |
| 3974 | * rs ----- |
| 3975 | * rd ----- |
| 3976 | */ |
| 3977 | static char *CMP_SNE_S(uint64 instruction, Dis_info *info) |
| 3978 | { |
| 3979 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 3980 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 3981 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 3982 | |
| 3983 | const char *fd = FPR(fd_value, info); |
| 3984 | const char *fs = FPR(fs_value, info); |
| 3985 | const char *ft = FPR(ft_value, info); |
| 3986 | |
| 3987 | return img_format("CMP.SNE.S %s, %s, %s", fd, fs, ft); |
| 3988 | } |
| 3989 | |
| 3990 | |
| 3991 | /* |
| 3992 | * |
| 3993 | * |
| 3994 | * 3 2 1 |
| 3995 | * 10987654321098765432109876543210 |
| 3996 | * 001000 x1110000101 |
| 3997 | * rt ----- |
| 3998 | * rs ----- |
| 3999 | * rd ----- |
| 4000 | */ |
| 4001 | static char *CMP_SOR_D(uint64 instruction, Dis_info *info) |
| 4002 | { |
| 4003 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4004 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4005 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4006 | |
| 4007 | const char *fd = FPR(fd_value, info); |
| 4008 | const char *fs = FPR(fs_value, info); |
| 4009 | const char *ft = FPR(ft_value, info); |
| 4010 | |
| 4011 | return img_format("CMP.SOR.D %s, %s, %s", fd, fs, ft); |
| 4012 | } |
| 4013 | |
| 4014 | |
| 4015 | /* |
| 4016 | * |
| 4017 | * |
| 4018 | * 3 2 1 |
| 4019 | * 10987654321098765432109876543210 |
| 4020 | * 001000 x1110000101 |
| 4021 | * rt ----- |
| 4022 | * rs ----- |
| 4023 | * rd ----- |
| 4024 | */ |
| 4025 | static char *CMP_SOR_S(uint64 instruction, Dis_info *info) |
| 4026 | { |
| 4027 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4028 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4029 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4030 | |
| 4031 | const char *fd = FPR(fd_value, info); |
| 4032 | const char *fs = FPR(fs_value, info); |
| 4033 | const char *ft = FPR(ft_value, info); |
| 4034 | |
| 4035 | return img_format("CMP.SOR.S %s, %s, %s", fd, fs, ft); |
| 4036 | } |
| 4037 | |
| 4038 | |
| 4039 | /* |
| 4040 | * |
| 4041 | * |
| 4042 | * 3 2 1 |
| 4043 | * 10987654321098765432109876543210 |
| 4044 | * 001000 x1110000101 |
| 4045 | * rt ----- |
| 4046 | * rs ----- |
| 4047 | * rd ----- |
| 4048 | */ |
| 4049 | static char *CMP_SUEQ_D(uint64 instruction, Dis_info *info) |
| 4050 | { |
| 4051 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4052 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4053 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4054 | |
| 4055 | const char *fd = FPR(fd_value, info); |
| 4056 | const char *fs = FPR(fs_value, info); |
| 4057 | const char *ft = FPR(ft_value, info); |
| 4058 | |
| 4059 | return img_format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft); |
| 4060 | } |
| 4061 | |
| 4062 | |
| 4063 | /* |
| 4064 | * |
| 4065 | * |
| 4066 | * 3 2 1 |
| 4067 | * 10987654321098765432109876543210 |
| 4068 | * 001000 x1110000101 |
| 4069 | * rt ----- |
| 4070 | * rs ----- |
| 4071 | * rd ----- |
| 4072 | */ |
| 4073 | static char *CMP_SUEQ_S(uint64 instruction, Dis_info *info) |
| 4074 | { |
| 4075 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4076 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4077 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4078 | |
| 4079 | const char *fd = FPR(fd_value, info); |
| 4080 | const char *fs = FPR(fs_value, info); |
| 4081 | const char *ft = FPR(ft_value, info); |
| 4082 | |
| 4083 | return img_format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft); |
| 4084 | } |
| 4085 | |
| 4086 | |
| 4087 | /* |
| 4088 | * |
| 4089 | * |
| 4090 | * 3 2 1 |
| 4091 | * 10987654321098765432109876543210 |
| 4092 | * 001000 x1110000101 |
| 4093 | * rt ----- |
| 4094 | * rs ----- |
| 4095 | * rd ----- |
| 4096 | */ |
| 4097 | static char *CMP_SULE_D(uint64 instruction, Dis_info *info) |
| 4098 | { |
| 4099 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4100 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4101 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4102 | |
| 4103 | const char *fd = FPR(fd_value, info); |
| 4104 | const char *fs = FPR(fs_value, info); |
| 4105 | const char *ft = FPR(ft_value, info); |
| 4106 | |
| 4107 | return img_format("CMP.SULE.D %s, %s, %s", fd, fs, ft); |
| 4108 | } |
| 4109 | |
| 4110 | |
| 4111 | /* |
| 4112 | * |
| 4113 | * |
| 4114 | * 3 2 1 |
| 4115 | * 10987654321098765432109876543210 |
| 4116 | * 001000 x1110000101 |
| 4117 | * rt ----- |
| 4118 | * rs ----- |
| 4119 | * rd ----- |
| 4120 | */ |
| 4121 | static char *CMP_SULE_S(uint64 instruction, Dis_info *info) |
| 4122 | { |
| 4123 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4124 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4125 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4126 | |
| 4127 | const char *fd = FPR(fd_value, info); |
| 4128 | const char *fs = FPR(fs_value, info); |
| 4129 | const char *ft = FPR(ft_value, info); |
| 4130 | |
| 4131 | return img_format("CMP.SULE.S %s, %s, %s", fd, fs, ft); |
| 4132 | } |
| 4133 | |
| 4134 | |
| 4135 | /* |
| 4136 | * |
| 4137 | * |
| 4138 | * 3 2 1 |
| 4139 | * 10987654321098765432109876543210 |
| 4140 | * 001000 x1110000101 |
| 4141 | * rt ----- |
| 4142 | * rs ----- |
| 4143 | * rd ----- |
| 4144 | */ |
| 4145 | static char *CMP_SULT_D(uint64 instruction, Dis_info *info) |
| 4146 | { |
| 4147 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4148 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4149 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4150 | |
| 4151 | const char *fd = FPR(fd_value, info); |
| 4152 | const char *fs = FPR(fs_value, info); |
| 4153 | const char *ft = FPR(ft_value, info); |
| 4154 | |
| 4155 | return img_format("CMP.SULT.D %s, %s, %s", fd, fs, ft); |
| 4156 | } |
| 4157 | |
| 4158 | |
| 4159 | /* |
| 4160 | * |
| 4161 | * |
| 4162 | * 3 2 1 |
| 4163 | * 10987654321098765432109876543210 |
| 4164 | * 001000 x1110000101 |
| 4165 | * rt ----- |
| 4166 | * rs ----- |
| 4167 | * rd ----- |
| 4168 | */ |
| 4169 | static char *CMP_SULT_S(uint64 instruction, Dis_info *info) |
| 4170 | { |
| 4171 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4172 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4173 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4174 | |
| 4175 | const char *fd = FPR(fd_value, info); |
| 4176 | const char *fs = FPR(fs_value, info); |
| 4177 | const char *ft = FPR(ft_value, info); |
| 4178 | |
| 4179 | return img_format("CMP.SULT.S %s, %s, %s", fd, fs, ft); |
| 4180 | } |
| 4181 | |
| 4182 | |
| 4183 | /* |
| 4184 | * |
| 4185 | * |
| 4186 | * 3 2 1 |
| 4187 | * 10987654321098765432109876543210 |
| 4188 | * 001000 x1110000101 |
| 4189 | * rt ----- |
| 4190 | * rs ----- |
| 4191 | * rd ----- |
| 4192 | */ |
| 4193 | static char *CMP_SUN_D(uint64 instruction, Dis_info *info) |
| 4194 | { |
| 4195 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4196 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4197 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4198 | |
| 4199 | const char *fd = FPR(fd_value, info); |
| 4200 | const char *fs = FPR(fs_value, info); |
| 4201 | const char *ft = FPR(ft_value, info); |
| 4202 | |
| 4203 | return img_format("CMP.SUN.D %s, %s, %s", fd, fs, ft); |
| 4204 | } |
| 4205 | |
| 4206 | |
| 4207 | /* |
| 4208 | * |
| 4209 | * |
| 4210 | * 3 2 1 |
| 4211 | * 10987654321098765432109876543210 |
| 4212 | * 001000 x1110000101 |
| 4213 | * rt ----- |
| 4214 | * rs ----- |
| 4215 | * rd ----- |
| 4216 | */ |
| 4217 | static char *CMP_SUNE_D(uint64 instruction, Dis_info *info) |
| 4218 | { |
| 4219 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4220 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4221 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4222 | |
| 4223 | const char *fd = FPR(fd_value, info); |
| 4224 | const char *fs = FPR(fs_value, info); |
| 4225 | const char *ft = FPR(ft_value, info); |
| 4226 | |
| 4227 | return img_format("CMP.SUNE.D %s, %s, %s", fd, fs, ft); |
| 4228 | } |
| 4229 | |
| 4230 | |
| 4231 | /* |
| 4232 | * |
| 4233 | * |
| 4234 | * 3 2 1 |
| 4235 | * 10987654321098765432109876543210 |
| 4236 | * 001000 x1110000101 |
| 4237 | * rt ----- |
| 4238 | * rs ----- |
| 4239 | * rd ----- |
| 4240 | */ |
| 4241 | static char *CMP_SUNE_S(uint64 instruction, Dis_info *info) |
| 4242 | { |
| 4243 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4244 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4245 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4246 | |
| 4247 | const char *fd = FPR(fd_value, info); |
| 4248 | const char *fs = FPR(fs_value, info); |
| 4249 | const char *ft = FPR(ft_value, info); |
| 4250 | |
| 4251 | return img_format("CMP.SUNE.S %s, %s, %s", fd, fs, ft); |
| 4252 | } |
| 4253 | |
| 4254 | |
| 4255 | /* |
| 4256 | * |
| 4257 | * |
| 4258 | * 3 2 1 |
| 4259 | * 10987654321098765432109876543210 |
| 4260 | * 001000 x1110000101 |
| 4261 | * rt ----- |
| 4262 | * rs ----- |
| 4263 | * rd ----- |
| 4264 | */ |
| 4265 | static char *CMP_SUN_S(uint64 instruction, Dis_info *info) |
| 4266 | { |
| 4267 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4268 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4269 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4270 | |
| 4271 | const char *fd = FPR(fd_value, info); |
| 4272 | const char *fs = FPR(fs_value, info); |
| 4273 | const char *ft = FPR(ft_value, info); |
| 4274 | |
| 4275 | return img_format("CMP.SUN.S %s, %s, %s", fd, fs, ft); |
| 4276 | } |
| 4277 | |
| 4278 | |
| 4279 | /* |
| 4280 | * |
| 4281 | * |
| 4282 | * 3 2 1 |
| 4283 | * 10987654321098765432109876543210 |
| 4284 | * 001000 x1110000101 |
| 4285 | * rt ----- |
| 4286 | * rs ----- |
| 4287 | * rd ----- |
| 4288 | */ |
| 4289 | static char *CMP_UEQ_D(uint64 instruction, Dis_info *info) |
| 4290 | { |
| 4291 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4292 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4293 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4294 | |
| 4295 | const char *fd = FPR(fd_value, info); |
| 4296 | const char *fs = FPR(fs_value, info); |
| 4297 | const char *ft = FPR(ft_value, info); |
| 4298 | |
| 4299 | return img_format("CMP.UEQ.D %s, %s, %s", fd, fs, ft); |
| 4300 | } |
| 4301 | |
| 4302 | |
| 4303 | /* |
| 4304 | * |
| 4305 | * |
| 4306 | * 3 2 1 |
| 4307 | * 10987654321098765432109876543210 |
| 4308 | * 001000 x1110000101 |
| 4309 | * rt ----- |
| 4310 | * rs ----- |
| 4311 | * rd ----- |
| 4312 | */ |
| 4313 | static char *CMP_UEQ_S(uint64 instruction, Dis_info *info) |
| 4314 | { |
| 4315 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4316 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4317 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4318 | |
| 4319 | const char *fd = FPR(fd_value, info); |
| 4320 | const char *fs = FPR(fs_value, info); |
| 4321 | const char *ft = FPR(ft_value, info); |
| 4322 | |
| 4323 | return img_format("CMP.UEQ.S %s, %s, %s", fd, fs, ft); |
| 4324 | } |
| 4325 | |
| 4326 | |
| 4327 | /* |
| 4328 | * |
| 4329 | * |
| 4330 | * 3 2 1 |
| 4331 | * 10987654321098765432109876543210 |
| 4332 | * 001000 x1110000101 |
| 4333 | * rt ----- |
| 4334 | * rs ----- |
| 4335 | * rd ----- |
| 4336 | */ |
| 4337 | static char *CMP_ULE_D(uint64 instruction, Dis_info *info) |
| 4338 | { |
| 4339 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4340 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4341 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4342 | |
| 4343 | const char *fd = FPR(fd_value, info); |
| 4344 | const char *fs = FPR(fs_value, info); |
| 4345 | const char *ft = FPR(ft_value, info); |
| 4346 | |
| 4347 | return img_format("CMP.ULE.D %s, %s, %s", fd, fs, ft); |
| 4348 | } |
| 4349 | |
| 4350 | |
| 4351 | /* |
| 4352 | * |
| 4353 | * |
| 4354 | * 3 2 1 |
| 4355 | * 10987654321098765432109876543210 |
| 4356 | * 001000 x1110000101 |
| 4357 | * rt ----- |
| 4358 | * rs ----- |
| 4359 | * rd ----- |
| 4360 | */ |
| 4361 | static char *CMP_ULE_S(uint64 instruction, Dis_info *info) |
| 4362 | { |
| 4363 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4364 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4365 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4366 | |
| 4367 | const char *fd = FPR(fd_value, info); |
| 4368 | const char *fs = FPR(fs_value, info); |
| 4369 | const char *ft = FPR(ft_value, info); |
| 4370 | |
| 4371 | return img_format("CMP.ULE.S %s, %s, %s", fd, fs, ft); |
| 4372 | } |
| 4373 | |
| 4374 | |
| 4375 | /* |
| 4376 | * |
| 4377 | * |
| 4378 | * 3 2 1 |
| 4379 | * 10987654321098765432109876543210 |
| 4380 | * 001000 x1110000101 |
| 4381 | * rt ----- |
| 4382 | * rs ----- |
| 4383 | * rd ----- |
| 4384 | */ |
| 4385 | static char *CMP_ULT_D(uint64 instruction, Dis_info *info) |
| 4386 | { |
| 4387 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4388 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4389 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4390 | |
| 4391 | const char *fd = FPR(fd_value, info); |
| 4392 | const char *fs = FPR(fs_value, info); |
| 4393 | const char *ft = FPR(ft_value, info); |
| 4394 | |
| 4395 | return img_format("CMP.ULT.D %s, %s, %s", fd, fs, ft); |
| 4396 | } |
| 4397 | |
| 4398 | |
| 4399 | /* |
| 4400 | * |
| 4401 | * |
| 4402 | * 3 2 1 |
| 4403 | * 10987654321098765432109876543210 |
| 4404 | * 001000 x1110000101 |
| 4405 | * rt ----- |
| 4406 | * rs ----- |
| 4407 | * rd ----- |
| 4408 | */ |
| 4409 | static char *CMP_ULT_S(uint64 instruction, Dis_info *info) |
| 4410 | { |
| 4411 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4412 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4413 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4414 | |
| 4415 | const char *fd = FPR(fd_value, info); |
| 4416 | const char *fs = FPR(fs_value, info); |
| 4417 | const char *ft = FPR(ft_value, info); |
| 4418 | |
| 4419 | return img_format("CMP.ULT.S %s, %s, %s", fd, fs, ft); |
| 4420 | } |
| 4421 | |
| 4422 | |
| 4423 | /* |
| 4424 | * |
| 4425 | * |
| 4426 | * 3 2 1 |
| 4427 | * 10987654321098765432109876543210 |
| 4428 | * 001000 x1110000101 |
| 4429 | * rt ----- |
| 4430 | * rs ----- |
| 4431 | * rd ----- |
| 4432 | */ |
| 4433 | static char *CMP_UN_D(uint64 instruction, Dis_info *info) |
| 4434 | { |
| 4435 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4436 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4437 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4438 | |
| 4439 | const char *fd = FPR(fd_value, info); |
| 4440 | const char *fs = FPR(fs_value, info); |
| 4441 | const char *ft = FPR(ft_value, info); |
| 4442 | |
| 4443 | return img_format("CMP.UN.D %s, %s, %s", fd, fs, ft); |
| 4444 | } |
| 4445 | |
| 4446 | |
| 4447 | /* |
| 4448 | * |
| 4449 | * |
| 4450 | * 3 2 1 |
| 4451 | * 10987654321098765432109876543210 |
| 4452 | * 001000 x1110000101 |
| 4453 | * rt ----- |
| 4454 | * rs ----- |
| 4455 | * rd ----- |
| 4456 | */ |
| 4457 | static char *CMP_UNE_D(uint64 instruction, Dis_info *info) |
| 4458 | { |
| 4459 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4460 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4461 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4462 | |
| 4463 | const char *fd = FPR(fd_value, info); |
| 4464 | const char *fs = FPR(fs_value, info); |
| 4465 | const char *ft = FPR(ft_value, info); |
| 4466 | |
| 4467 | return img_format("CMP.UNE.D %s, %s, %s", fd, fs, ft); |
| 4468 | } |
| 4469 | |
| 4470 | |
| 4471 | /* |
| 4472 | * |
| 4473 | * |
| 4474 | * 3 2 1 |
| 4475 | * 10987654321098765432109876543210 |
| 4476 | * 001000 x1110000101 |
| 4477 | * rt ----- |
| 4478 | * rs ----- |
| 4479 | * rd ----- |
| 4480 | */ |
| 4481 | static char *CMP_UNE_S(uint64 instruction, Dis_info *info) |
| 4482 | { |
| 4483 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4484 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4485 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4486 | |
| 4487 | const char *fd = FPR(fd_value, info); |
| 4488 | const char *fs = FPR(fs_value, info); |
| 4489 | const char *ft = FPR(ft_value, info); |
| 4490 | |
| 4491 | return img_format("CMP.UNE.S %s, %s, %s", fd, fs, ft); |
| 4492 | } |
| 4493 | |
| 4494 | |
| 4495 | /* |
| 4496 | * |
| 4497 | * |
| 4498 | * 3 2 1 |
| 4499 | * 10987654321098765432109876543210 |
| 4500 | * 001000 x1110000101 |
| 4501 | * rt ----- |
| 4502 | * rs ----- |
| 4503 | * rd ----- |
| 4504 | */ |
| 4505 | static char *CMP_UN_S(uint64 instruction, Dis_info *info) |
| 4506 | { |
| 4507 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4508 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4509 | uint64 fd_value = extract_fd_15_14_13_12_11(instruction); |
| 4510 | |
| 4511 | const char *fd = FPR(fd_value, info); |
| 4512 | const char *fs = FPR(fs_value, info); |
| 4513 | const char *ft = FPR(ft_value, info); |
| 4514 | |
| 4515 | return img_format("CMP.UN.S %s, %s, %s", fd, fs, ft); |
| 4516 | } |
| 4517 | |
| 4518 | |
| 4519 | /* |
| 4520 | * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of |
| 4521 | * four bytes and write result to GPR and DSPControl |
| 4522 | * |
| 4523 | * 3 2 1 |
| 4524 | * 10987654321098765432109876543210 |
| 4525 | * 001000 x0110000101 |
| 4526 | * rt ----- |
| 4527 | * rs ----- |
| 4528 | * rd ----- |
| 4529 | */ |
| 4530 | static char *CMPGDU_EQ_QB(uint64 instruction, Dis_info *info) |
| 4531 | { |
| 4532 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4533 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4534 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4535 | |
| 4536 | const char *rd = GPR(rd_value, info); |
| 4537 | const char *rs = GPR(rs_value, info); |
| 4538 | const char *rt = GPR(rt_value, info); |
| 4539 | |
| 4540 | return img_format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt); |
| 4541 | } |
| 4542 | |
| 4543 | |
| 4544 | /* |
| 4545 | * [DSP] CMPGDU.LE.QB rd, rs, rt - Compare unsigned vector of |
| 4546 | * four bytes and write result to GPR and DSPControl |
| 4547 | * |
| 4548 | * 3 2 1 |
| 4549 | * 10987654321098765432109876543210 |
| 4550 | * 001000 x1000000101 |
| 4551 | * rt ----- |
| 4552 | * rs ----- |
| 4553 | * rd ----- |
| 4554 | */ |
| 4555 | static char *CMPGDU_LE_QB(uint64 instruction, Dis_info *info) |
| 4556 | { |
| 4557 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4558 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4559 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4560 | |
| 4561 | const char *rd = GPR(rd_value, info); |
| 4562 | const char *rs = GPR(rs_value, info); |
| 4563 | const char *rt = GPR(rt_value, info); |
| 4564 | |
| 4565 | return img_format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt); |
| 4566 | } |
| 4567 | |
| 4568 | |
| 4569 | /* |
| 4570 | * [DSP] CMPGDU.EQ.QB rd, rs, rt - Compare unsigned vector of |
| 4571 | * four bytes and write result to GPR and DSPControl |
| 4572 | * |
| 4573 | * 3 2 1 |
| 4574 | * 10987654321098765432109876543210 |
| 4575 | * 001000 x0111000101 |
| 4576 | * rt ----- |
| 4577 | * rs ----- |
| 4578 | * rd ----- |
| 4579 | */ |
| 4580 | static char *CMPGDU_LT_QB(uint64 instruction, Dis_info *info) |
| 4581 | { |
| 4582 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4583 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4584 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4585 | |
| 4586 | const char *rd = GPR(rd_value, info); |
| 4587 | const char *rs = GPR(rs_value, info); |
| 4588 | const char *rt = GPR(rt_value, info); |
| 4589 | |
| 4590 | return img_format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt); |
| 4591 | } |
| 4592 | |
| 4593 | |
| 4594 | /* |
| 4595 | * [DSP] CMPGU.EQ.QB rd, rs, rt - Compare vectors of unsigned |
| 4596 | * byte values and write result to a GPR |
| 4597 | * |
| 4598 | * 3 2 1 |
| 4599 | * 10987654321098765432109876543210 |
| 4600 | * 001000 x0011000101 |
| 4601 | * rt ----- |
| 4602 | * rs ----- |
| 4603 | * rd ----- |
| 4604 | */ |
| 4605 | static char *CMPGU_EQ_QB(uint64 instruction, Dis_info *info) |
| 4606 | { |
| 4607 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4608 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4609 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4610 | |
| 4611 | const char *rd = GPR(rd_value, info); |
| 4612 | const char *rs = GPR(rs_value, info); |
| 4613 | const char *rt = GPR(rt_value, info); |
| 4614 | |
| 4615 | return img_format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt); |
| 4616 | } |
| 4617 | |
| 4618 | |
| 4619 | /* |
| 4620 | * [DSP] CMPGU.LE.QB rd, rs, rt - Compare vectors of unsigned |
| 4621 | * byte values and write result to a GPR |
| 4622 | * |
| 4623 | * 3 2 1 |
| 4624 | * 10987654321098765432109876543210 |
| 4625 | * 001000 x0101000101 |
| 4626 | * rt ----- |
| 4627 | * rs ----- |
| 4628 | * rd ----- |
| 4629 | */ |
| 4630 | static char *CMPGU_LE_QB(uint64 instruction, Dis_info *info) |
| 4631 | { |
| 4632 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4633 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4634 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4635 | |
| 4636 | const char *rd = GPR(rd_value, info); |
| 4637 | const char *rs = GPR(rs_value, info); |
| 4638 | const char *rt = GPR(rt_value, info); |
| 4639 | |
| 4640 | return img_format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt); |
| 4641 | } |
| 4642 | |
| 4643 | |
| 4644 | /* |
| 4645 | * [DSP] CMPGU.LT.QB rd, rs, rt - Compare vectors of unsigned |
| 4646 | * byte values and write result to a GPR |
| 4647 | * |
| 4648 | * 3 2 1 |
| 4649 | * 10987654321098765432109876543210 |
| 4650 | * 001000 x0100000101 |
| 4651 | * rt ----- |
| 4652 | * rs ----- |
| 4653 | * rd ----- |
| 4654 | */ |
| 4655 | static char *CMPGU_LT_QB(uint64 instruction, Dis_info *info) |
| 4656 | { |
| 4657 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4658 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4659 | uint64 rd_value = extract_rd_15_14_13_12_11(instruction); |
| 4660 | |
| 4661 | const char *rd = GPR(rd_value, info); |
| 4662 | const char *rs = GPR(rs_value, info); |
| 4663 | const char *rt = GPR(rt_value, info); |
| 4664 | |
| 4665 | return img_format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt); |
| 4666 | } |
| 4667 | |
| 4668 | |
| 4669 | /* |
| 4670 | * [DSP] CMPU.EQ.QB rd, rs, rt - Compare vectors of unsigned |
| 4671 | * byte values |
| 4672 | * |
| 4673 | * 3 2 1 |
| 4674 | * 10987654321098765432109876543210 |
| 4675 | * 001000 xxxxxx1001000101 |
| 4676 | * rt ----- |
| 4677 | * rs ----- |
| 4678 | */ |
| 4679 | static char *CMPU_EQ_QB(uint64 instruction, Dis_info *info) |
| 4680 | { |
| 4681 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4682 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4683 | |
| 4684 | const char *rs = GPR(rs_value, info); |
| 4685 | const char *rt = GPR(rt_value, info); |
| 4686 | |
| 4687 | return img_format("CMPU.EQ.QB %s, %s", rs, rt); |
| 4688 | } |
| 4689 | |
| 4690 | |
| 4691 | /* |
| 4692 | * [DSP] CMPU.LE.QB rd, rs, rt - Compare vectors of unsigned |
| 4693 | * byte values |
| 4694 | * |
| 4695 | * 3 2 1 |
| 4696 | * 10987654321098765432109876543210 |
| 4697 | * 001000 xxxxxx1011000101 |
| 4698 | * rt ----- |
| 4699 | * rs ----- |
| 4700 | */ |
| 4701 | static char *CMPU_LE_QB(uint64 instruction, Dis_info *info) |
| 4702 | { |
| 4703 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4704 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4705 | |
| 4706 | const char *rs = GPR(rs_value, info); |
| 4707 | const char *rt = GPR(rt_value, info); |
| 4708 | |
| 4709 | return img_format("CMPU.LE.QB %s, %s", rs, rt); |
| 4710 | } |
| 4711 | |
| 4712 | |
| 4713 | /* |
| 4714 | * [DSP] CMPU.LT.QB rd, rs, rt - Compare vectors of unsigned |
| 4715 | * byte values |
| 4716 | * |
| 4717 | * 3 2 1 |
| 4718 | * 10987654321098765432109876543210 |
| 4719 | * 001000 xxxxxx1010000101 |
| 4720 | * rt ----- |
| 4721 | * rs ----- |
| 4722 | */ |
| 4723 | static char *CMPU_LT_QB(uint64 instruction, Dis_info *info) |
| 4724 | { |
| 4725 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4726 | uint64 rs_value = extract_rs_20_19_18_17_16(instruction); |
| 4727 | |
| 4728 | const char *rs = GPR(rs_value, info); |
| 4729 | const char *rt = GPR(rt_value, info); |
| 4730 | |
| 4731 | return img_format("CMPU.LT.QB %s, %s", rs, rt); |
| 4732 | } |
| 4733 | |
| 4734 | |
| 4735 | /* |
| 4736 | * |
| 4737 | * |
| 4738 | * 3 2 1 |
| 4739 | * 10987654321098765432109876543210 |
| 4740 | * 001000 x1110000101 |
| 4741 | * rt ----- |
| 4742 | * rs ----- |
| 4743 | * rd ----- |
| 4744 | */ |
| 4745 | static char *COP2_1(uint64 instruction, Dis_info *info) |
| 4746 | { |
| 4747 | uint64 cofun_value = extract_cofun_25_24_23(instruction); |
| 4748 | |
| 4749 | |
| 4750 | return img_format("COP2_1 0x%" PRIx64, cofun_value); |
| 4751 | } |
| 4752 | |
| 4753 | |
| 4754 | /* |
| 4755 | * |
| 4756 | * |
| 4757 | * 3 2 1 |
| 4758 | * 10987654321098765432109876543210 |
| 4759 | * 001000 x1110000101 |
| 4760 | * rt ----- |
| 4761 | * rs ----- |
| 4762 | * rd ----- |
| 4763 | */ |
| 4764 | static char *CTC1(uint64 instruction, Dis_info *info) |
| 4765 | { |
| 4766 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4767 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
| 4768 | |
| 4769 | const char *rt = GPR(rt_value, info); |
| 4770 | |
| 4771 | return img_format("CTC1 %s, CP%" PRIu64, rt, cs_value); |
| 4772 | } |
| 4773 | |
| 4774 | |
| 4775 | /* |
| 4776 | * |
| 4777 | * |
| 4778 | * 3 2 1 |
| 4779 | * 10987654321098765432109876543210 |
| 4780 | * 001000 x1110000101 |
| 4781 | * rt ----- |
| 4782 | * rs ----- |
| 4783 | * rd ----- |
| 4784 | */ |
| 4785 | static char *CTC2(uint64 instruction, Dis_info *info) |
| 4786 | { |
| 4787 | uint64 rt_value = extract_rt_25_24_23_22_21(instruction); |
| 4788 | uint64 cs_value = extract_cs_20_19_18_17_16(instruction); |
| 4789 | |
| 4790 | const char *rt = GPR(rt_value, info); |
| 4791 | |
| 4792 | return img_format("CTC2 %s, CP%" PRIu64, rt, cs_value); |
| 4793 | } |
| 4794 | |
| 4795 | |
| 4796 | /* |
| 4797 | * |
| 4798 | * |
| 4799 | * 3 2 1 |
| 4800 | * 10987654321098765432109876543210 |
| 4801 | * 001000 x1110000101 |
| 4802 | * rt ----- |
| 4803 | * rs ----- |
| 4804 | * rd ----- |
| 4805 | */ |
| 4806 | static char *CVT_D_L(uint64 instruction, Dis_info *info) |
| 4807 | { |
| 4808 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4809 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4810 | |
| 4811 | const char *ft = FPR(ft_value, info); |
| 4812 | const char *fs = FPR(fs_value, info); |
| 4813 | |
| 4814 | return img_format("CVT.D.L %s, %s", ft, fs); |
| 4815 | } |
| 4816 | |
| 4817 | |
| 4818 | /* |
| 4819 | * |
| 4820 | * |
| 4821 | * 3 2 1 |
| 4822 | * 10987654321098765432109876543210 |
| 4823 | * 001000 x1110000101 |
| 4824 | * rt ----- |
| 4825 | * rs ----- |
| 4826 | * rd ----- |
| 4827 | */ |
| 4828 | static char *CVT_D_S(uint64 instruction, Dis_info *info) |
| 4829 | { |
| 4830 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4831 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4832 | |
| 4833 | const char *ft = FPR(ft_value, info); |
| 4834 | const char *fs = FPR(fs_value, info); |
| 4835 | |
| 4836 | return img_format("CVT.D.S %s, %s", ft, fs); |
| 4837 | } |
| 4838 | |
| 4839 | |
| 4840 | /* |
| 4841 | * |
| 4842 | * |
| 4843 | * 3 2 1 |
| 4844 | * 10987654321098765432109876543210 |
| 4845 | * 001000 x1110000101 |
| 4846 | * rt ----- |
| 4847 | * rs ----- |
| 4848 | * rd ----- |
| 4849 | */ |
| 4850 | static char *CVT_D_W(uint64 instruction, Dis_info *info) |
| 4851 | { |
| 4852 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4853 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4854 | |
| 4855 | const char *ft = FPR(ft_value, info); |
| 4856 | const char *fs = FPR(fs_value, info); |
| 4857 | |
| 4858 | return img_format("CVT.D.W %s, %s", ft, fs); |
| 4859 | } |
| 4860 | |
| 4861 | |
| 4862 | /* |
| 4863 | * |
| 4864 | * |
| 4865 | * 3 2 1 |
| 4866 | * 10987654321098765432109876543210 |
| 4867 | * 001000 x1110000101 |
| 4868 | * rt ----- |
| 4869 | * rs ----- |
| 4870 | * rd ----- |
| 4871 | */ |
| 4872 | static char *CVT_L_D(uint64 instruction, Dis_info *info) |
| 4873 | { |
| 4874 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4875 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4876 | |
| 4877 | const char *ft = FPR(ft_value, info); |
| 4878 | const char *fs = FPR(fs_value, info); |
| 4879 | |
| 4880 | return img_format("CVT.L.D %s, %s", ft, fs); |
| 4881 | } |
| 4882 | |
| 4883 | |
| 4884 | /* |
| 4885 | * |
| 4886 | * |
| 4887 | * 3 2 1 |
| 4888 | * 10987654321098765432109876543210 |
| 4889 | * 001000 x1110000101 |
| 4890 | * rt ----- |
| 4891 | * rs ----- |
| 4892 | * rd ----- |
| 4893 | */ |
| 4894 | static char *CVT_L_S(uint64 instruction, Dis_info *info) |
| 4895 | { |
| 4896 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4897 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4898 | |
| 4899 | const char *ft = FPR(ft_value, info); |
| 4900 | const char *fs = FPR(fs_value, info); |
| 4901 | |
| 4902 | return img_format("CVT.L.S %s, %s", ft, fs); |
| 4903 | } |
| 4904 | |
| 4905 | |
| 4906 | /* |
| 4907 | * |
| 4908 | * |
| 4909 | * 3 2 1 |
| 4910 | * 10987654321098765432109876543210 |
| 4911 | * 001000 x1110000101 |
| 4912 | * rt ----- |
| 4913 | * rs ----- |
| 4914 | * rd ----- |
| 4915 | */ |
| 4916 | static char *CVT_S_D(uint64 instruction, Dis_info *info) |
| 4917 | { |
| 4918 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4919 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4920 | |
| 4921 | const char *ft = FPR(ft_value, info); |
| 4922 | const char *fs = FPR(fs_value, info); |
| 4923 | |
| 4924 | return img_format("CVT.S.D %s, %s", ft, fs); |
| 4925 | } |
| 4926 | |
| 4927 | |
| 4928 | /* |
| 4929 | * |
| 4930 | * |
| 4931 | * 3 2 1 |
| 4932 | * 10987654321098765432109876543210 |
| 4933 | * 001000 x1110000101 |
| 4934 | * rt ----- |
| 4935 | * rs ----- |
| 4936 | * rd ----- |
| 4937 | */ |
| 4938 | static char *CVT_S_L(uint64 instruction, Dis_info *info) |
| 4939 | { |
| 4940 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4941 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4942 | |
| 4943 | const char *ft = FPR(ft_value, info); |
| 4944 | const char *fs = FPR(fs_value, info); |
| 4945 | |
| 4946 | return img_format("CVT.S.L %s, %s", ft, fs); |
| 4947 | } |
| 4948 | |
| 4949 | |
| 4950 | /* |
| 4951 | * |
| 4952 | * |
| 4953 | * 3 2 1 |
| 4954 | * 10987654321098765432109876543210 |
| 4955 | * 001000 x1110000101 |
| 4956 | * rt ----- |
| 4957 | * rs ----- |
| 4958 | * rd ----- |
| 4959 | */ |
| 4960 | static char *CVT_S_PL(uint64 instruction, Dis_info *info) |
| 4961 | { |
| 4962 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4963 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4964 | |
| 4965 | const char *ft = FPR(ft_value, info); |
| 4966 | const char *fs = FPR(fs_value, info); |
| 4967 | |
| 4968 | return img_format("CVT.S.PL %s, %s", ft, fs); |
| 4969 | } |
| 4970 | |
| 4971 | |
| 4972 | /* |
| 4973 | * |
| 4974 | * |
| 4975 | * 3 2 1 |
| 4976 | * 10987654321098765432109876543210 |
| 4977 | * 001000 x1110000101 |
| 4978 | * rt ----- |
| 4979 | * rs ----- |
| 4980 | * rd ----- |
| 4981 | */ |
| 4982 | static char *CVT_S_PU(uint64 instruction, Dis_info *info) |
| 4983 | { |
| 4984 | uint64 ft_value = extract_ft_25_24_23_22_21(instruction); |
| 4985 | uint64 fs_value = extract_fs_20_19_18_17_16(instruction); |
| 4986 | |
| 4987 | const char *ft = FPR(ft_value, info); |
| 4988 | const char *fs = FPR(fs_value, info); |
| 4989 | |
| 4990 | return img_format("CVT.S.PU %s, %s", ft, fs); |
| 4991 | } |
| 4992 | |
| 4993 | |
| 4994 | /* |
| 4995 | * |
| 4996 | * |
| 4997 | * 3 2 1 |
| 4998 | * 10987654321098765432109876543210 |
| 4999 | * 001000 x1110000101 |
| 5000 | * rt ----- |
Showing first 5,000 of 21,990 lines.
View raw