| 1 | /* |
| 2 | * QEMU RISC-V Disassembler for xthead. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 5 | */ |
| 6 | |
| 7 | #include "qemu/osdep.h" |
| 8 | #include "disas/riscv.h" |
| 9 | #include "disas/riscv-xthead.h" |
| 10 | |
| 11 | #define OP(N, ...) static const rv_opcode_data op_##N = { __VA_ARGS__ }; |
| 12 | #include "riscv-xthead-op.c.inc" |
| 13 | #undef OP |
| 14 | |
| 15 | const rv_opcode_data *decode_xtheadba(rv_decode *dec, rv_isa isa) |
| 16 | { |
| 17 | rv_inst inst = dec->inst; |
| 18 | |
| 19 | switch (((inst >> 0) & 0b11)) { |
| 20 | case 3: |
| 21 | switch (((inst >> 2) & 0b11111)) { |
| 22 | case 2: |
| 23 | /* custom-0 */ |
| 24 | switch ((inst >> 12) & 0b111) { |
| 25 | case 1: |
| 26 | switch ((inst >> 25) & 0b1111111) { |
| 27 | case 0b0000000: |
| 28 | case 0b0000001: |
| 29 | case 0b0000010: |
| 30 | case 0b0000011: return &op_th_addsl; |
| 31 | } |
| 32 | break; |
| 33 | } |
| 34 | break; |
| 35 | /* custom-0 */ |
| 36 | } |
| 37 | break; |
| 38 | } |
| 39 | |
| 40 | return NULL; |
| 41 | } |
| 42 | |
| 43 | const rv_opcode_data *decode_xtheadbb(rv_decode *dec, rv_isa isa) |
| 44 | { |
| 45 | rv_inst inst = dec->inst; |
| 46 | |
| 47 | switch (((inst >> 0) & 0b11)) { |
| 48 | case 3: |
| 49 | switch (((inst >> 2) & 0b11111)) { |
| 50 | case 2: |
| 51 | /* custom-0 */ |
| 52 | switch ((inst >> 12) & 0b111) { |
| 53 | case 1: |
| 54 | switch ((inst >> 25) & 0b1111111) { |
| 55 | case 0b0001010: return &op_th_srriw; |
| 56 | case 0b1000000: |
| 57 | if (((inst >> 20) & 0b11111) == 0) { |
| 58 | return &op_th_tstnbz; |
| 59 | } |
| 60 | break; |
| 61 | case 0b1000001: |
| 62 | if (((inst >> 20) & 0b11111) == 0) { |
| 63 | return &op_th_rev; |
| 64 | } |
| 65 | break; |
| 66 | case 0b1000010: |
| 67 | if (((inst >> 20) & 0b11111) == 0) { |
| 68 | return &op_th_ff0; |
| 69 | } |
| 70 | break; |
| 71 | case 0b1000011: |
| 72 | if (((inst >> 20) & 0b11111) == 0) { |
| 73 | return &op_th_ff1; |
| 74 | } |
| 75 | break; |
| 76 | case 0b1000100: |
| 77 | case 0b1001000: |
| 78 | if (((inst >> 20) & 0b11111) == 0) { |
| 79 | return &op_th_revw; |
| 80 | } |
| 81 | break; |
| 82 | case 0b0001000: |
| 83 | case 0b0001001: |
| 84 | return &op_th_srri; |
| 85 | break; |
| 86 | } |
| 87 | break; |
| 88 | case 2: return &op_th_ext; |
| 89 | case 3: return &op_th_extu; |
| 90 | } |
| 91 | break; |
| 92 | /* custom-0 */ |
| 93 | } |
| 94 | break; |
| 95 | } |
| 96 | |
| 97 | return NULL; |
| 98 | } |
| 99 | |
| 100 | const rv_opcode_data *decode_xtheadbs(rv_decode *dec, rv_isa isa) |
| 101 | { |
| 102 | rv_inst inst = dec->inst; |
| 103 | |
| 104 | switch (((inst >> 0) & 0b11)) { |
| 105 | case 3: |
| 106 | switch (((inst >> 2) & 0b11111)) { |
| 107 | case 2: |
| 108 | /* custom-0 */ |
| 109 | switch ((inst >> 12) & 0b111) { |
| 110 | case 1: |
| 111 | switch ((inst >> 26) & 0b111111) { |
| 112 | case 0b100010: return &op_th_tst; |
| 113 | } |
| 114 | break; |
| 115 | } |
| 116 | break; |
| 117 | /* custom-0 */ |
| 118 | } |
| 119 | break; |
| 120 | } |
| 121 | |
| 122 | return NULL; |
| 123 | } |
| 124 | |
| 125 | const rv_opcode_data *decode_xtheadcmo(rv_decode *dec, rv_isa isa) |
| 126 | { |
| 127 | rv_inst inst = dec->inst; |
| 128 | |
| 129 | switch (((inst >> 0) & 0b11)) { |
| 130 | case 3: |
| 131 | switch (((inst >> 2) & 0b11111)) { |
| 132 | case 2: |
| 133 | /* custom-0 */ |
| 134 | switch ((inst >> 12) & 0b111) { |
| 135 | case 0: |
| 136 | switch ((inst >> 20 & 0b111111111111)) { |
| 137 | case 0b000000000001: |
| 138 | if (((inst >> 20) & 0b11111) == 0) { |
| 139 | return &op_th_dcache_call; |
| 140 | } |
| 141 | break; |
| 142 | case 0b000000000011: |
| 143 | if (((inst >> 20) & 0b11111) == 0) { |
| 144 | return &op_th_dcache_ciall; |
| 145 | } |
| 146 | break; |
| 147 | case 0b000000000010: |
| 148 | if (((inst >> 20) & 0b11111) == 0) { |
| 149 | return &op_th_dcache_iall; |
| 150 | } |
| 151 | break; |
| 152 | case 0b000000101001: return &op_th_dcache_cpa; |
| 153 | case 0b000000101011: return &op_th_dcache_cipa; |
| 154 | case 0b000000101010: return &op_th_dcache_ipa; |
| 155 | case 0b000000100101: return &op_th_dcache_cva; |
| 156 | case 0b000000100111: return &op_th_dcache_civa; |
| 157 | case 0b000000100110: return &op_th_dcache_iva; |
| 158 | case 0b000000100001: return &op_th_dcache_csw; |
| 159 | case 0b000000100011: return &op_th_dcache_cisw; |
| 160 | case 0b000000100010: return &op_th_dcache_isw; |
| 161 | case 0b000000101000: return &op_th_dcache_cpal1; |
| 162 | case 0b000000100100: return &op_th_dcache_cval1; |
| 163 | case 0b000000010000: |
| 164 | if (((inst >> 20) & 0b11111) == 0) { |
| 165 | return &op_th_icache_iall; |
| 166 | } |
| 167 | break; |
| 168 | case 0b000000010001: |
| 169 | if (((inst >> 20) & 0b11111) == 0) { |
| 170 | return &op_th_icache_ialls; |
| 171 | } |
| 172 | break; |
| 173 | case 0b000000111000: return &op_th_icache_ipa; |
| 174 | case 0b000000110000: return &op_th_icache_iva; |
| 175 | case 0b000000010101: |
| 176 | if (((inst >> 20) & 0b11111) == 0) { |
| 177 | return &op_th_l2cache_call; |
| 178 | } |
| 179 | break; |
| 180 | case 0b000000010111: |
| 181 | if (((inst >> 20) & 0b11111) == 0) { |
| 182 | return &op_th_l2cache_ciall; |
| 183 | } |
| 184 | break; |
| 185 | case 0b000000010110: |
| 186 | if (((inst >> 20) & 0b11111) == 0) { |
| 187 | return &op_th_l2cache_iall; |
| 188 | } |
| 189 | break; |
| 190 | } |
| 191 | break; |
| 192 | } |
| 193 | break; |
| 194 | /* custom-0 */ |
| 195 | } |
| 196 | break; |
| 197 | } |
| 198 | |
| 199 | return NULL; |
| 200 | } |
| 201 | |
| 202 | const rv_opcode_data *decode_xtheadcondmov(rv_decode *dec, rv_isa isa) |
| 203 | { |
| 204 | rv_inst inst = dec->inst; |
| 205 | |
| 206 | switch (((inst >> 0) & 0b11)) { |
| 207 | case 3: |
| 208 | switch (((inst >> 2) & 0b11111)) { |
| 209 | case 2: |
| 210 | /* custom-0 */ |
| 211 | switch ((inst >> 12) & 0b111) { |
| 212 | case 1: |
| 213 | switch ((inst >> 25) & 0b1111111) { |
| 214 | case 0b0100000: return &op_th_mveqz; |
| 215 | case 0b0100001: return &op_th_mvnez; |
| 216 | } |
| 217 | break; |
| 218 | } |
| 219 | break; |
| 220 | /* custom-0 */ |
| 221 | } |
| 222 | break; |
| 223 | } |
| 224 | |
| 225 | return NULL; |
| 226 | } |
| 227 | |
| 228 | const rv_opcode_data *decode_xtheadfmemidx(rv_decode *dec, rv_isa isa) |
| 229 | { |
| 230 | rv_inst inst = dec->inst; |
| 231 | |
| 232 | switch (((inst >> 0) & 0b11)) { |
| 233 | case 3: |
| 234 | switch (((inst >> 2) & 0b11111)) { |
| 235 | case 2: |
| 236 | /* custom-0 */ |
| 237 | switch ((inst >> 12) & 0b111) { |
| 238 | case 6: |
| 239 | switch ((inst >> 27) & 0b11111) { |
| 240 | case 8: return &op_th_flrw; |
| 241 | case 10: return &op_th_flurw; |
| 242 | case 12: return &op_th_flrd; |
| 243 | case 14: return &op_th_flurd; |
| 244 | } |
| 245 | break; |
| 246 | case 7: |
| 247 | switch ((inst >> 27) & 0b11111) { |
| 248 | case 8: return &op_th_fsrw; |
| 249 | case 10: return &op_th_fsurw; |
| 250 | case 12: return &op_th_fsrd; |
| 251 | case 14: return &op_th_fsurd; |
| 252 | } |
| 253 | break; |
| 254 | } |
| 255 | break; |
| 256 | /* custom-0 */ |
| 257 | } |
| 258 | break; |
| 259 | } |
| 260 | |
| 261 | return NULL; |
| 262 | } |
| 263 | |
| 264 | const rv_opcode_data *decode_xtheadfmv(rv_decode *dec, rv_isa isa) |
| 265 | { |
| 266 | rv_inst inst = dec->inst; |
| 267 | |
| 268 | switch (((inst >> 0) & 0b11)) { |
| 269 | case 3: |
| 270 | switch (((inst >> 2) & 0b11111)) { |
| 271 | case 2: |
| 272 | /* custom-0 */ |
| 273 | switch ((inst >> 12) & 0b111) { |
| 274 | case 1: |
| 275 | switch ((inst >> 25) & 0b1111111) { |
| 276 | case 0b1010000: |
| 277 | if (((inst >> 20) & 0b11111) == 0) { |
| 278 | return &op_th_fmv_hw_x; |
| 279 | } |
| 280 | break; |
| 281 | case 0b1100000: |
| 282 | if (((inst >> 20) & 0b11111) == 0) { |
| 283 | return &op_th_fmv_x_hw; |
| 284 | } |
| 285 | break; |
| 286 | } |
| 287 | break; |
| 288 | } |
| 289 | break; |
| 290 | /* custom-0 */ |
| 291 | } |
| 292 | break; |
| 293 | } |
| 294 | |
| 295 | return NULL; |
| 296 | } |
| 297 | |
| 298 | const rv_opcode_data *decode_xtheadmac(rv_decode *dec, rv_isa isa) |
| 299 | { |
| 300 | rv_inst inst = dec->inst; |
| 301 | |
| 302 | switch (((inst >> 0) & 0b11)) { |
| 303 | case 3: |
| 304 | switch (((inst >> 2) & 0b11111)) { |
| 305 | case 2: |
| 306 | /* custom-0 */ |
| 307 | switch ((inst >> 12) & 0b111) { |
| 308 | case 1: |
| 309 | switch ((inst >> 25) & 0b1111111) { |
| 310 | case 0b0010000: return &op_th_mula; |
| 311 | case 0b0010001: return &op_th_muls; |
| 312 | case 0b0010010: return &op_th_mulaw; |
| 313 | case 0b0010011: return &op_th_mulsw; |
| 314 | case 0b0010100: return &op_th_mulah; |
| 315 | case 0b0010101: return &op_th_mulsh; |
| 316 | } |
| 317 | break; |
| 318 | } |
| 319 | break; |
| 320 | /* custom-0 */ |
| 321 | } |
| 322 | break; |
| 323 | } |
| 324 | |
| 325 | return NULL; |
| 326 | } |
| 327 | |
| 328 | const rv_opcode_data *decode_xtheadmemidx(rv_decode *dec, rv_isa isa) |
| 329 | { |
| 330 | rv_inst inst = dec->inst; |
| 331 | |
| 332 | switch (((inst >> 0) & 0b11)) { |
| 333 | case 3: |
| 334 | switch (((inst >> 2) & 0b11111)) { |
| 335 | case 2: |
| 336 | /* custom-0 */ |
| 337 | switch ((inst >> 12) & 0b111) { |
| 338 | case 4: |
| 339 | switch ((inst >> 27) & 0b11111) { |
| 340 | case 0: return &op_th_lrb; |
| 341 | case 1: return &op_th_lbib; |
| 342 | case 2: return &op_th_lurb; |
| 343 | case 3: return &op_th_lbia; |
| 344 | case 4: return &op_th_lrh; |
| 345 | case 5: return &op_th_lhib; |
| 346 | case 6: return &op_th_lurh; |
| 347 | case 7: return &op_th_lhia; |
| 348 | case 8: return &op_th_lrw; |
| 349 | case 9: return &op_th_lwib; |
| 350 | case 10: return &op_th_lurw; |
| 351 | case 11: return &op_th_lwia; |
| 352 | case 12: return &op_th_lrd; |
| 353 | case 13: return &op_th_ldib; |
| 354 | case 14: return &op_th_lurd; |
| 355 | case 15: return &op_th_ldia; |
| 356 | case 16: return &op_th_lrbu; |
| 357 | case 17: return &op_th_lbuib; |
| 358 | case 18: return &op_th_lurbu; |
| 359 | case 19: return &op_th_lbuia; |
| 360 | case 20: return &op_th_lrhu; |
| 361 | case 21: return &op_th_lhuib; |
| 362 | case 22: return &op_th_lurhu; |
| 363 | case 23: return &op_th_lhuia; |
| 364 | case 24: return &op_th_lrwu; |
| 365 | case 25: return &op_th_lwuib; |
| 366 | case 26: return &op_th_lurwu; |
| 367 | case 27: return &op_th_lwuia; |
| 368 | } |
| 369 | break; |
| 370 | case 5: |
| 371 | switch ((inst >> 27) & 0b11111) { |
| 372 | case 0: return &op_th_srb; |
| 373 | case 1: return &op_th_sbib; |
| 374 | case 2: return &op_th_surb; |
| 375 | case 3: return &op_th_sbia; |
| 376 | case 4: return &op_th_srh; |
| 377 | case 5: return &op_th_shib; |
| 378 | case 6: return &op_th_surh; |
| 379 | case 7: return &op_th_shia; |
| 380 | case 8: return &op_th_srw; |
| 381 | case 9: return &op_th_swib; |
| 382 | case 10: return &op_th_surw; |
| 383 | case 11: return &op_th_swia; |
| 384 | case 12: return &op_th_srd; |
| 385 | case 13: return &op_th_sdib; |
| 386 | case 14: return &op_th_surd; |
| 387 | case 15: return &op_th_sdia; |
| 388 | } |
| 389 | break; |
| 390 | break; |
| 391 | } |
| 392 | break; |
| 393 | /* custom-0 */ |
| 394 | } |
| 395 | break; |
| 396 | } |
| 397 | |
| 398 | return NULL; |
| 399 | } |
| 400 | |
| 401 | const rv_opcode_data *decode_xtheadmempair(rv_decode *dec, rv_isa isa) |
| 402 | { |
| 403 | rv_inst inst = dec->inst; |
| 404 | |
| 405 | switch (((inst >> 0) & 0b11)) { |
| 406 | case 3: |
| 407 | switch (((inst >> 2) & 0b11111)) { |
| 408 | case 2: |
| 409 | /* custom-0 */ |
| 410 | switch ((inst >> 12) & 0b111) { |
| 411 | case 4: |
| 412 | switch ((inst >> 27) & 0b11111) { |
| 413 | case 28: return &op_th_lwd; |
| 414 | case 30: return &op_th_lwud; |
| 415 | case 31: return &op_th_ldd; |
| 416 | } |
| 417 | break; |
| 418 | case 5: |
| 419 | switch ((inst >> 27) & 0b11111) { |
| 420 | case 28: return &op_th_swd; |
| 421 | case 31: return &op_th_sdd; |
| 422 | } |
| 423 | break; |
| 424 | } |
| 425 | break; |
| 426 | /* custom-0 */ |
| 427 | } |
| 428 | break; |
| 429 | } |
| 430 | |
| 431 | return NULL; |
| 432 | } |
| 433 | |
| 434 | const rv_opcode_data *decode_xtheadsync(rv_decode *dec, rv_isa isa) |
| 435 | { |
| 436 | rv_inst inst = dec->inst; |
| 437 | |
| 438 | switch (((inst >> 0) & 0b11)) { |
| 439 | case 3: |
| 440 | switch (((inst >> 2) & 0b11111)) { |
| 441 | case 2: |
| 442 | /* custom-0 */ |
| 443 | switch ((inst >> 12) & 0b111) { |
| 444 | case 0: |
| 445 | switch ((inst >> 25) & 0b1111111) { |
| 446 | case 0b0000010: return &op_th_sfence_vmas; |
| 447 | case 0b0000000: |
| 448 | switch ((inst >> 20) & 0b11111) { |
| 449 | case 0b11000: return &op_th_sync; |
| 450 | case 0b11010: return &op_th_sync_i; |
| 451 | case 0b11011: return &op_th_sync_is; |
| 452 | case 0b11001: return &op_th_sync_s; |
| 453 | } |
| 454 | break; |
| 455 | } |
| 456 | break; |
| 457 | } |
| 458 | break; |
| 459 | /* custom-0 */ |
| 460 | } |
| 461 | break; |
| 462 | } |
| 463 | |
| 464 | return NULL; |
| 465 | } |