| 1 | Aspeed family boards (``anacapa-bmc``, ``ast2500-evb``, ``ast2600-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``gb200nvl-bmc``, ``fby35-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``supermicrox11-bmc``, ``supermicrox11spi-bmc``, ``tiogapass-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``) |
| 2 | =============================================================================================================================================================================================================================================================================================================================================== |
| 3 | |
| 4 | The QEMU Aspeed machines model BMCs of various OpenPOWER systems and |
| 5 | Aspeed evaluation boards. They are based on different releases of the |
| 6 | Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the |
| 7 | AST2500 with an ARM1176JZS CPU (800MHz), the AST2600 |
| 8 | with dual cores Arm Cortex-A7 CPUs (1.2GHz). |
| 9 | |
| 10 | The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C, |
| 11 | etc. |
| 12 | |
| 13 | AST2400 SoC based machines : |
| 14 | |
| 15 | - ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC |
| 16 | - ``quanta-q71l-bmc`` OpenBMC Quanta BMC |
| 17 | - ``supermicrox11-bmc`` Supermicro X11 BMC (ARM926EJ-S) |
| 18 | - ``supermicrox11spi-bmc`` Supermicro X11 SPI BMC (ARM1176) |
| 19 | |
| 20 | AST2500 SoC based machines : |
| 21 | |
| 22 | - ``ast2500-evb`` Aspeed AST2500 Evaluation board |
| 23 | - ``romulus-bmc`` OpenPOWER Romulus POWER9 BMC |
| 24 | - ``witherspoon-bmc`` OpenPOWER Witherspoon POWER9 BMC |
| 25 | - ``g220a-bmc`` Bytedance G220A BMC |
| 26 | - ``yosemitev2-bmc`` Facebook YosemiteV2 BMC |
| 27 | - ``tiogapass-bmc`` Facebook Tiogapass BMC |
| 28 | |
| 29 | AST2600 SoC based machines : |
| 30 | |
| 31 | - ``ast2600-evb`` Aspeed AST2600 Evaluation board (Cortex-A7) |
| 32 | - ``rainier-bmc`` IBM Rainier POWER10 BMC |
| 33 | - ``fuji-bmc`` Facebook Fuji BMC |
| 34 | - ``bletchley-bmc`` Facebook Bletchley BMC |
| 35 | - ``fby35-bmc`` Facebook fby35 BMC |
| 36 | - ``anacapa-bmc`` Facebook Anacapa BMC |
| 37 | - ``gb200nvl-bmc`` Nvidia GB200nvl BMC |
| 38 | |
| 39 | Supported devices |
| 40 | ----------------- |
| 41 | |
| 42 | * SMP (for the AST2600 Cortex-A7) |
| 43 | * Interrupt Controller (VIC) |
| 44 | * Timer Controller |
| 45 | * RTC Controller |
| 46 | * I2C Controller, including the new register interface of the AST2600 |
| 47 | * System Control Unit (SCU) |
| 48 | * SRAM mapping |
| 49 | * X-DMA Controller (basic interface) |
| 50 | * Static Memory Controller (SMC or FMC) - Only SPI Flash support |
| 51 | * SPI Memory Controller |
| 52 | * USB 2.0 Controller |
| 53 | * SD/MMC storage controllers |
| 54 | * SDRAM controller (dummy interface for basic settings and training) |
| 55 | * Watchdog Controller |
| 56 | * GPIO Controller (Master only) |
| 57 | * UART |
| 58 | * Ethernet controllers |
| 59 | * Front LEDs (PCA9552 on I2C bus) |
| 60 | * LPC Peripheral Controller (a subset of subdevices are supported) |
| 61 | * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA |
| 62 | * ADC |
| 63 | * Secure Boot Controller (AST2600) |
| 64 | * eMMC Boot Controller (dummy) |
| 65 | * PECI Controller (minimal) |
| 66 | * I3C Controller |
| 67 | * Internal Bridge Controller (SLI dummy) |
| 68 | |
| 69 | |
| 70 | Missing devices |
| 71 | --------------- |
| 72 | |
| 73 | * Coprocessor support |
| 74 | * PWM and Fan Controller |
| 75 | * Slave GPIO Controller |
| 76 | * Super I/O Controller |
| 77 | * PCI-Express 1 Controller |
| 78 | * Graphic Display Controller |
| 79 | * MCTP Controller |
| 80 | * Mailbox Controller |
| 81 | * Virtual UART |
| 82 | * eSPI Controller |
| 83 | |
| 84 | Boot options |
| 85 | ------------ |
| 86 | |
| 87 | The Aspeed machines can be started using the ``-kernel`` and ``-dtb`` options |
| 88 | to load a Linux kernel or from a firmware. Images can be downloaded from the |
| 89 | OpenBMC jenkins : |
| 90 | |
| 91 | https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/ |
| 92 | |
| 93 | or directly from the OpenBMC GitHub release repository : |
| 94 | |
| 95 | https://github.com/openbmc/openbmc/releases |
| 96 | |
| 97 | or directly from the ASPEED Forked OpenBMC GitHub release repository : |
| 98 | |
| 99 | https://github.com/AspeedTech-BMC/openbmc/releases |
| 100 | |
| 101 | Booting from a kernel image |
| 102 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 103 | |
| 104 | To boot a kernel directly from a Linux build tree: |
| 105 | |
| 106 | .. code-block:: bash |
| 107 | |
| 108 | $ qemu-system-arm -M ast2600-evb -nographic \ |
| 109 | -kernel arch/arm/boot/zImage \ |
| 110 | -dtb arch/arm/boot/dts/aspeed-ast2600-evb.dtb \ |
| 111 | -initrd rootfs.cpio |
| 112 | |
| 113 | Booting from a flash image |
| 114 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 115 | |
| 116 | The machine options specific to Aspeed to boot from a flash image are : |
| 117 | |
| 118 | * ``execute-in-place`` which emulates the boot from the CE0 flash |
| 119 | device by using the FMC controller to load the instructions, and |
| 120 | not simply from RAM. This takes a little longer. |
| 121 | |
| 122 | * ``fmc-model`` to change the default FMC Flash model. FW needs |
| 123 | support for the chip model to boot. |
| 124 | |
| 125 | * ``spi-model`` to change the default SPI Flash model. |
| 126 | |
| 127 | To boot the machine from the flash image, use an MTD drive : |
| 128 | |
| 129 | .. code-block:: bash |
| 130 | |
| 131 | $ qemu-system-arm -M romulus-bmc -nic user \ |
| 132 | -drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic |
| 133 | |
| 134 | To use other flash models, for instance a different FMC chip and a |
| 135 | bigger (64M) SPI for the ``ast2500-evb`` machine, run : |
| 136 | |
| 137 | .. code-block:: bash |
| 138 | |
| 139 | -M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f |
| 140 | |
| 141 | When more flexibility is needed to define the flash devices, to use |
| 142 | different flash models or define all flash devices (up to 8), the |
| 143 | ``-nodefaults`` QEMU option can be used to avoid creating the default |
| 144 | flash devices. |
| 145 | |
| 146 | Flash devices should then be created from the command line and attached |
| 147 | to a block device : |
| 148 | |
| 149 | .. code-block:: bash |
| 150 | |
| 151 | $ qemu-system-arm -M ast2600-evb \ |
| 152 | -blockdev node-name=fmc0,driver=file,filename=/path/to/fmc0.img \ |
| 153 | -device mx66u51235f,bus=ssi.0,cs=0x0,drive=fmc0 \ |
| 154 | -blockdev node-name=fmc1,driver=file,filename=/path/to/fmc1.img \ |
| 155 | -device mx66u51235f,bus=ssi.0,cs=0x1,drive=fmc1 \ |
| 156 | -blockdev node-name=spi1,driver=file,filename=/path/to/spi1.img \ |
| 157 | -device mx66u51235f,cs=0x0,bus=ssi.1,drive=spi1 \ |
| 158 | -nographic -nodefaults |
| 159 | |
| 160 | In that case, the machine boots fetching instructions from the FMC0 |
| 161 | device. It is slower to start but closer to what HW does. Using the |
| 162 | machine option ``execute-in-place`` has a similar effect. |
| 163 | |
| 164 | Booting from an eMMC image |
| 165 | ^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 166 | |
| 167 | The machine options specific to Aspeed machines to boot from an eMMC |
| 168 | image are : |
| 169 | |
| 170 | * ``boot-emmc`` to set or unset boot from eMMC (AST2600). |
| 171 | |
| 172 | Only the ``ast2600-evb`` and ``rainier-emmc`` machines have support to |
| 173 | boot from an eMMC device. In this case, the machine assumes that the |
| 174 | eMMC image includes special boot partitions. Such an image can be |
| 175 | built this way : |
| 176 | |
| 177 | .. code-block:: bash |
| 178 | |
| 179 | $ dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M |
| 180 | $ dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc |
| 181 | $ dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K |
| 182 | $ cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img |
| 183 | $ truncate --size 16GB mmc.img |
| 184 | |
| 185 | Boot the machine ``rainier-emmc`` with : |
| 186 | |
| 187 | .. code-block:: bash |
| 188 | |
| 189 | $ qemu-system-arm -M rainier-bmc \ |
| 190 | -drive file=mmc.img,format=raw,if=sd,index=2 \ |
| 191 | -nographic |
| 192 | |
| 193 | The ``boot-emmc`` option can be set or unset, to change the default |
| 194 | boot mode of machine: SPI or eMMC. This can be useful to boot the |
| 195 | ``ast2600-evb`` machine from an eMMC device (default being SPI) or to |
| 196 | boot the ``rainier-bmc`` machine from a flash device (default being |
| 197 | eMMC). |
| 198 | |
| 199 | As an example, here is how to to boot the ``rainier-bmc`` machine from |
| 200 | the flash device with ``boot-emmc=false`` and let the machine use an |
| 201 | eMMC image : |
| 202 | |
| 203 | .. code-block:: bash |
| 204 | |
| 205 | $ qemu-system-arm -M rainier-bmc,boot-emmc=false \ |
| 206 | -drive file=flash.img,format=raw,if=mtd \ |
| 207 | -drive file=mmc.img,format=raw,if=sd,index=2 \ |
| 208 | -nographic |
| 209 | |
| 210 | It should be noted that in this case the eMMC device must not have |
| 211 | boot partitions, otherwise the contents will not be accessible to the |
| 212 | machine. This limitation is due to the use of the ``-drive`` |
| 213 | interface. |
| 214 | |
| 215 | Ideally, one should be able to define the eMMC device and the |
| 216 | associated backend directly on the command line, such as : |
| 217 | |
| 218 | .. code-block:: bash |
| 219 | |
| 220 | -blockdev node-name=emmc0,driver=file,filename=mmc.img \ |
| 221 | -device emmc,bus=sdhci-bus.2,drive=emmc0,boot-partition-size=1048576,boot-config=8 |
| 222 | |
| 223 | This is not yet supported (as of QEMU-10.0). Work is needed to |
| 224 | refactor the sdhci bus model. |
| 225 | |
| 226 | Other booting options |
| 227 | ^^^^^^^^^^^^^^^^^^^^^ |
| 228 | |
| 229 | Other machine options specific to Aspeed machines are : |
| 230 | |
| 231 | * ``bmc-console`` to change the default console device. Most of the |
| 232 | machines use the ``UART5`` device for a boot console, which is |
| 233 | mapped on ``/dev/ttyS4`` under Linux, but it is not always the |
| 234 | case. |
| 235 | |
| 236 | To change the boot console and use device ``UART3`` (``/dev/ttyS2`` |
| 237 | under Linux), use : |
| 238 | |
| 239 | .. code-block:: bash |
| 240 | |
| 241 | -M ast2500-evb,bmc-console=uart3 |
| 242 | |
| 243 | OTP Option |
| 244 | ^^^^^^^^^^ |
| 245 | |
| 246 | Both the AST2600 and AST1030 chips use the same One Time Programmable |
| 247 | (OTP) memory module, which is utilized for configuration, key storage, |
| 248 | and storing user-programmable data. This OTP memory module is managed |
| 249 | by the Secure Boot Controller (SBC). The following options can be |
| 250 | specified or omitted based on your needs. |
| 251 | |
| 252 | * When the options are specified, the pre-generated configuration |
| 253 | file will be used as the OTP memory storage. |
| 254 | |
| 255 | * When the options are omitted, an internal memory buffer will be |
| 256 | used to store the OTP memory data. |
| 257 | |
| 258 | .. code-block:: bash |
| 259 | |
| 260 | -blockdev driver=file,filename=otpmem.img,node-name=otp \ |
| 261 | -global aspeed-otp.drive=otp \ |
| 262 | |
| 263 | The following bash command can be used to generate a default |
| 264 | configuration file for OTP memory: |
| 265 | |
| 266 | .. code-block:: bash |
| 267 | |
| 268 | if [ ! -f otpmem.img ]; then |
| 269 | for i in $(seq 1 2048); do |
| 270 | printf '\x00\x00\x00\x00\xff\xff\xff\xff' |
| 271 | done > otpmem.img |
| 272 | fi |
| 273 | |
| 274 | Aspeed 2700 family boards (``ast2700-evb``, ``ast2700fc``) |
| 275 | ========================================================== |
| 276 | |
| 277 | The QEMU Aspeed machines model BMCs of Aspeed evaluation boards. |
| 278 | They are based on different releases of the Aspeed SoC : |
| 279 | the AST2700 with quad cores Arm Cortex-A35 64 bits CPUs (1.6GHz). |
| 280 | |
| 281 | The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C, |
| 282 | etc. |
| 283 | |
| 284 | AST2700 SoC based machines : |
| 285 | |
| 286 | - ``ast2700-evb`` Aspeed AST2700 Evaluation board (Cortex-A35) |
| 287 | - ``ast2700fc`` Aspeed AST2700 Evaluation board (Cortex-A35 + Cortex-M4) |
| 288 | |
| 289 | Supported devices |
| 290 | ----------------- |
| 291 | * Interrupt Controller |
| 292 | * Timer Controller |
| 293 | * RTC Controller |
| 294 | * I2C Controller |
| 295 | * System Control Unit (SCU) |
| 296 | * SRAM mapping |
| 297 | * X-DMA Controller (basic interface) |
| 298 | * Static Memory Controller (SMC or FMC) - Only SPI Flash support |
| 299 | * SPI Memory Controller |
| 300 | * USB 2.0 Controller |
| 301 | * SD/MMC storage controllers |
| 302 | * SDRAM controller (dummy interface for basic settings and training) |
| 303 | * Watchdog Controller |
| 304 | * GPIO Controller (Master only) |
| 305 | * UART |
| 306 | * Ethernet controllers |
| 307 | * Front LEDs (PCA9552 on I2C bus) |
| 308 | * LPC Peripheral Controller (a subset of subdevices are supported) |
| 309 | * Hash/Crypto Engine (HACE) - Hash support only. TODO: Crypto |
| 310 | * ADC |
| 311 | * eMMC Boot Controller (dummy) |
| 312 | * PECI Controller (minimal) |
| 313 | * I3C Controller |
| 314 | * Internal Bridge Controller (SLI dummy) |
| 315 | |
| 316 | Missing devices |
| 317 | --------------- |
| 318 | * PWM and Fan Controller |
| 319 | * Slave GPIO Controller |
| 320 | * Super I/O Controller |
| 321 | * PCI-Express 1 Controller |
| 322 | * Graphic Display Controller |
| 323 | * MCTP Controller |
| 324 | * Mailbox Controller |
| 325 | * Virtual UART |
| 326 | * eSPI Controller |
| 327 | |
| 328 | Boot options |
| 329 | ------------ |
| 330 | |
| 331 | Images can be downloaded from the ASPEED Forked OpenBMC GitHub release repository : |
| 332 | |
| 333 | https://github.com/AspeedTech-BMC/openbmc/releases |
| 334 | |
| 335 | Booting the ast2700-evb machine |
| 336 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 337 | |
| 338 | Boot the AST2700 machine from the flash image. |
| 339 | |
| 340 | There are two supported methods for booting the AST2700 machine with a flash image: |
| 341 | |
| 342 | Manual boot using ``-device loader``: |
| 343 | |
| 344 | It causes all 4 CPU cores to start execution from address ``0x430000000``, which |
| 345 | corresponds to the BL31 image load address. |
| 346 | |
| 347 | .. code-block:: bash |
| 348 | |
| 349 | IMGDIR=ast2700-default |
| 350 | |
| 351 | $ qemu-system-aarch64 -M ast2700-evb \ |
| 352 | -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot.bin \ |
| 353 | -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \ |
| 354 | -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \ |
| 355 | -device loader,cpu-num=0,addr=0x430000000 \ |
| 356 | -device loader,cpu-num=1,addr=0x430000000 \ |
| 357 | -device loader,cpu-num=2,addr=0x430000000 \ |
| 358 | -device loader,cpu-num=3,addr=0x430000000 \ |
| 359 | -smp 4 \ |
| 360 | -drive file=${IMGDIR}/image-bmc,format=raw,if=mtd \ |
| 361 | -nographic |
| 362 | |
| 363 | Boot using a virtual boot ROM (``-bios``): |
| 364 | |
| 365 | If users do not specify the ``-bios option``, QEMU will attempt to load the |
| 366 | default vbootrom image ``ast27x0_bootrom.bin`` from either the current working |
| 367 | directory or the ``pc-bios`` directory within the QEMU source tree. |
| 368 | |
| 369 | .. code-block:: bash |
| 370 | |
| 371 | $ qemu-system-aarch64 -M ast2700-evb \ |
| 372 | -drive file=image-bmc,format=raw,if=mtd \ |
| 373 | -nographic |
| 374 | |
| 375 | The ``-bios`` option allows users to specify a custom path for the vbootrom |
| 376 | image to be loaded during boot. This will load the vbootrom image from the |
| 377 | specified path in the ${HOME} directory. |
| 378 | |
| 379 | .. code-block:: bash |
| 380 | |
| 381 | -bios ${HOME}/ast27x0_bootrom.bin |
| 382 | |
| 383 | Booting the ast2700fc machine |
| 384 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 385 | |
| 386 | AST2700 features four Cortex-A35 primary processors and two Cortex-M4 coprocessors. |
| 387 | **ast2700-evb** machine focuses on emulating the four Cortex-A35 primary processors, |
| 388 | **ast2700fc** machine extends **ast2700-evb** by adding support for the two Cortex-M4 coprocessors. |
| 389 | |
| 390 | Steps to boot the AST2700fc machine: |
| 391 | |
| 392 | 1. Ensure you have the following AST2700A1 binaries available in a directory |
| 393 | |
| 394 | * u-boot-nodtb.bin |
| 395 | * u-boot.dtb |
| 396 | * bl31.bin |
| 397 | * optee/tee-raw.bin |
| 398 | * image-bmc |
| 399 | * zephyr-aspeed-ssp.elf (for SSP firmware, CPU 5) |
| 400 | * zephyr-aspeed-tsp.elf (for TSP firmware, CPU 6) |
| 401 | |
| 402 | 2. Execute the following command to start ``ast2700fc`` machine: |
| 403 | |
| 404 | .. code-block:: bash |
| 405 | |
| 406 | IMGDIR=ast2700-default |
| 407 | |
| 408 | $ qemu-system-aarch64 -M ast2700fc \ |
| 409 | -device loader,force-raw=on,addr=0x400000000,file=${IMGDIR}/u-boot.bin \ |
| 410 | -device loader,force-raw=on,addr=0x430000000,file=${IMGDIR}/bl31.bin \ |
| 411 | -device loader,force-raw=on,addr=0x430080000,file=${IMGDIR}/optee/tee-raw.bin \ |
| 412 | -device loader,cpu-num=0,addr=0x430000000 \ |
| 413 | -device loader,cpu-num=1,addr=0x430000000 \ |
| 414 | -device loader,cpu-num=2,addr=0x430000000 \ |
| 415 | -device loader,cpu-num=3,addr=0x430000000 \ |
| 416 | -drive file=${IMGDIR}/image-bmc,if=mtd,format=raw \ |
| 417 | -device loader,file=${IMGDIR}/zephyr-aspeed-ssp.elf,cpu-num=4 \ |
| 418 | -device loader,file=${IMGDIR}/zephyr-aspeed-tsp.elf,cpu-num=5 \ |
| 419 | -serial pty -serial pty -serial pty \ |
| 420 | -snapshot \ |
| 421 | -S -nographic |
| 422 | |
| 423 | After launching QEMU, serial devices will be automatically redirected. |
| 424 | Example output: |
| 425 | |
| 426 | .. code-block:: bash |
| 427 | |
| 428 | char device redirected to /dev/pts/55 (label serial0) |
| 429 | char device redirected to /dev/pts/56 (label serial1) |
| 430 | char device redirected to /dev/pts/57 (label serial2) |
| 431 | |
| 432 | - serial0: Console for the four Cortex-A35 primary processors. |
| 433 | - serial1 and serial2: Consoles for the two Cortex-M4 coprocessors. |
| 434 | |
| 435 | Use ``tio`` or another terminal emulator to connect to the consoles: |
| 436 | |
| 437 | .. code-block:: bash |
| 438 | |
| 439 | $ tio /dev/pts/55 |
| 440 | $ tio /dev/pts/56 |
| 441 | $ tio /dev/pts/57 |
| 442 | |
| 443 | |
| 444 | Aspeed Bridge IC and Platform Root of Trust processor family boards (``ast1030-evb``, ``ast1040-evb``, ``ast1060-evb``) |
| 445 | ======================================================================================================================= |
| 446 | |
| 447 | The QEMU Aspeed machines model Bridge ICs and Platform Root of Trust processors |
| 448 | of various Aspeed evaluation boards. They are based on different members of |
| 449 | the Aspeed AST10x0 SoC family: |
| 450 | |
| 451 | - AST1030 : Bridge IC |
| 452 | - AST1040 : Bridge IC |
| 453 | - AST1060 : Platform Root of Trust processor |
| 454 | |
| 455 | The AST1030 and AST1060 integrate an Arm Cortex-M4F CPU running at 200 MHz. |
| 456 | The AST1040 integrates an Arm Cortex-M4F CPU running at 400 MHz. |
| 457 | |
| 458 | The SoC comes with SRAM, SPI, I2C, etc. |
| 459 | |
| 460 | AST10x0 SoC based machines : |
| 461 | |
| 462 | - ``ast1030-evb`` Aspeed AST1030 Evaluation board (Cortex-M4F) |
| 463 | - ``ast1040-evb`` Aspeed AST1040 Evaluation board (Cortex-M4F) |
| 464 | - ``ast1060-evb`` Aspeed AST1060 Evaluation board (Cortex-M4F) |
| 465 | |
| 466 | Supported devices |
| 467 | ----------------- |
| 468 | |
| 469 | * SMP (for the Cortex-M4F) |
| 470 | * Interrupt Controller (VIC) |
| 471 | * Timer Controller |
| 472 | * I2C Controller |
| 473 | * System Control Unit (SCU) |
| 474 | * SRAM mapping |
| 475 | * Static Memory Controller (SMC or FMC) - Only SPI Flash support |
| 476 | * SPI Memory Controller |
| 477 | * USB 2.0 Controller |
| 478 | * Watchdog Controller |
| 479 | * GPIO Controller (Master only) |
| 480 | * UART |
| 481 | * LPC Peripheral Controller (a subset of subdevices are supported) |
| 482 | * Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA |
| 483 | * ADC |
| 484 | * Secure Boot Controller |
| 485 | * PECI Controller (minimal) |
| 486 | |
| 487 | |
| 488 | Missing devices |
| 489 | --------------- |
| 490 | |
| 491 | * PWM and Fan Controller |
| 492 | * Slave GPIO Controller |
| 493 | * Mailbox Controller |
| 494 | * Virtual UART |
| 495 | * eSPI Controller |
| 496 | * I3C Controller |
| 497 | * SMBus Filter Controller |
| 498 | * QSPI Monitor Controller |
| 499 | |
| 500 | Boot options |
| 501 | ------------ |
| 502 | |
| 503 | The Aspeed machines can be started using the ``-kernel`` to load a |
| 504 | Zephyr OS or from a firmware. Images can be downloaded from the |
| 505 | ASPEED GitHub release repository : |
| 506 | |
| 507 | https://github.com/AspeedTech-BMC/zephyr/releases |
| 508 | |
| 509 | To boot a kernel directly from a Zephyr build tree: |
| 510 | |
| 511 | .. code-block:: bash |
| 512 | |
| 513 | $ qemu-system-arm -M ast1030-evb -nographic \ |
| 514 | -kernel zephyr.bin |