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1 .. _Arm Emulation:
2
3 A-profile CPU architecture support
4 ==================================
5
6 QEMU's TCG emulation includes support for the Armv5, Armv6, Armv7,
7 Armv8 and Armv9 versions of the A-profile architecture. It also has support for
8 the following architecture extensions:
9
10 - FEAT_AA32 (PE Support for AArch32)
11 - FEAT_AA32BF16 (AArch32 BFloat16 instructions)
12 - FEAT_AA32EL0 (Support for AArch32 at EL0)
13 - FEAT_AA32EL1 (Support for AArch32 at EL1)
14 - FEAT_AA32EL2 (Support for AArch32 at EL2)
15 - FEAT_AA32EL3 (Support for AArch32 at EL3)
16 - FEAT_AA32HPD (AArch32 hierarchical permission disables)
17 - FEAT_AA32I8MM (AArch32 Int8 matrix multiplication instructions)
18 - FEAT_AA64 (PE uses AArch64 after last reboot)
19 - FEAT_AA64EL0 (Support for AArch64 at EL0)
20 - FEAT_AA64EL1 (Support for AArch64 at EL1)
21 - FEAT_AA64EL2 (Support for AArch64 at EL2)
22 - FEAT_AA64EL3 (Support for AArch64 at EL3)
23 - FEAT_AdvSIMD (Advanced SIMD Extension)
24 - FEAT_AES (AESD and AESE instructions)
25 - FEAT_AFP (Alternate floating-point behavior)
26 - FEAT_AIE (Memory Attribute Index Enhancement)
27 - FEAT_Armv9_Crypto (Armv9 Cryptographic Extension)
28 - FEAT_ASID16 (16 bit ASID)
29 - FEAT_ASID2 (Concurrent use of two ASIDs)
30 - FEAT_ATS1A (Address Translation operations that ignore stage 1 permissions)
31 - FEAT_BBML1 (Translation table break-before-make level 1)
32 - FEAT_BBML2 (Translation table break-before-make level 2)
33 - FEAT_BF16 (AArch64 BFloat16 instructions)
34 - FEAT_BigEnd (Support for big-endian at EL1 and above)
35 - FEAT_BigEndEL0 (Support for big-endian at EL0)
36 - FEAT_BTI (Branch Target Identification)
37 - FEAT_CCIDX (Extended cache index)
38 - FEAT_CHK (Check Feature Status)
39 - FEAT_CMOW (Control for cache maintenance permission)
40 - FEAT_CMPBR (Compare and Branch instructions)
41 - FEAT_CRC32 (CRC32 instructions)
42 - FEAT_Crypto (Cryptographic Extension)
43 - FEAT_CSSC (Common Short Sequence Compression instructions)
44 - FEAT_CSV2 (Cache speculation variant 2)
45 - FEAT_CSV2_1p1 (Cache speculation variant 2, version 1.1)
46 - FEAT_CSV2_1p2 (Cache speculation variant 2, version 1.2)
47 - FEAT_CSV2_2 (Cache speculation variant 2, version 2)
48 - FEAT_CSV2_3 (Cache speculation variant 2, version 3)
49 - FEAT_CSV3 (Cache speculation variant 3)
50 - FEAT_DGH (Data gathering hint)
51 - FEAT_DIT (Data Independent Timing instructions)
52 - FEAT_DoubleLock (Double Lock)
53 - FEAT_DPB (DC CVAP instruction)
54 - FEAT_DPB2 (DC CVADP instruction)
55 - FEAT_Debugv8p1 (Debug with VHE)
56 - FEAT_Debugv8p2 (Debug changes for v8.2)
57 - FEAT_Debugv8p4 (Debug changes for v8.4)
58 - FEAT_Debugv8p8 (Debug changes for v8.8)
59 - FEAT_DotProd (Advanced SIMD dot product instructions)
60 - FEAT_DoubleFault (Double Fault Extension)
61 - FEAT_E0PD (Preventing EL0 access to halves of address maps)
62 - FEAT_E2H0 (Programming of HCR_EL2.E2H)
63 - FEAT_EBF16 (AArch64 Extended BFloat16 instructions)
64 - FEAT_ECV (Enhanced Counter Virtualization)
65 - FEAT_ECV_POFF (Enhanced Counter Virtualization Physical Offset)
66 - FEAT_EL0 (Support for execution at EL0)
67 - FEAT_EL1 (Support for execution at EL1)
68 - FEAT_EL2 (Support for execution at EL2)
69 - FEAT_EL3 (Support for execution at EL3)
70 - FEAT_EPAC (Enhanced pointer authentication)
71 - FEAT_ETS2 (Enhanced Translation Synchronization)
72 - FEAT_EVT (Enhanced Virtualization Traps)
73 - FEAT_EVT2 (Enhanced Virtualization Traps 2)
74 - FEAT_F8F16MM (8-bit floating-point matrix multiply-accumulate to half-precision)
75 - FEAT_F8F32MM (8-bit floating-point matrix multiply-accumulate to single-precision)
76 - FEAT_F32MM (Single-precision Matrix Multiplication)
77 - FEAT_F64MM (Double-precision Matrix Multiplication)
78 - FEAT_FAMINMAX (Floating-point maximum and minimum absolute value instructions)
79 - FEAT_FCMA (Floating-point complex number instructions)
80 - FEAT_FGT (Fine-Grained Traps)
81 - FEAT_FGWTE3 (Fine-Grained Write Trap EL3)
82 - FEAT_FHM (Floating-point half-precision multiplication instructions)
83 - FEAT_FP (Floating Point extensions)
84 - FEAT_FP16 (Half-precision floating-point data processing)
85 - FEAT_FP8 (FP8 convert instructions)
86 - FEAT_FP8DOT2 (FP8 2-way dot product to half-precision instructions)
87 - FEAT_FP8DOT4 (FP8 4-way dot product to single-precision instructions)
88 - FEAT_FP8FMA (FP8 multiply-accumulate to half-precision and single-precision instructions)
89 - FEAT_FPAC (Faulting on AUT* instructions)
90 - FEAT_FPACCOMBINE (Faulting on combined pointer authentication instructions)
91 - FEAT_FPACC_SPEC (Speculative behavior of combined pointer authentication instructions)
92 - FEAT_FPMR (Floating-point Mode Register)
93 - FEAT_FPRCVT (Floating-Point to/from Integer in Scalar FP register)
94 - FEAT_FRINTTS (Floating-point to integer instructions)
95 - FEAT_FlagM (Flag manipulation instructions v2)
96 - FEAT_FlagM2 (Enhancements to flag manipulation instructions)
97 - FEAT_GCS (Guarded Control Stack Extension)
98 - FEAT_GTG (Guest translation granule size)
99 - FEAT_HAF (Hardware management of the Access flag)
100 - FEAT_HAFDBS (Hardware management of the access flag and dirty bit state)
101 - FEAT_HBC (Hinted conditional branches)
102 - FEAT_HCX (Support for the HCRX_EL2 register)
103 - FEAT_HPDS (Hierarchical permission disables)
104 - FEAT_HPDS2 (Translation table page-based hardware attributes)
105 - FEAT_HPMN0 (Setting of MDCR_EL2.HPMN to zero)
106 - FEAT_I8MM (AArch64 Int8 matrix multiplication instructions)
107 - FEAT_IDST (ID space trap handling)
108 - FEAT_IESB (Implicit error synchronization event)
109 - FEAT_IVIPT (The IVIPT Extension)
110 - FEAT_JSCVT (JavaScript conversion instructions)
111 - FEAT_LittleEnd (Support for little-endian at EL1 and above)
112 - FEAT_LittleEndEL0 (Support for little-endian at EL0)
113 - FEAT_LOR (Limited ordering regions)
114 - FEAT_LPA (Large Physical Address space)
115 - FEAT_LPA2 (Large Physical and virtual Address space v2)
116 - FEAT_LRCPC (Load-acquire RCpc instructions)
117 - FEAT_LRCPC2 (Load-acquire RCpc instructions v2)
118 - FEAT_LSE (Large System Extensions)
119 - FEAT_LSE2 (Large System Extensions v2)
120 - FEAT_LSE128 (128-bit Atomics)
121 - FEAT_LUT (Lookup table instructions with 2-bit and 4-bit indices)
122 - FEAT_LVA (Large Virtual Address space)
123 - FEAT_MEC (Memory Encryption Contexts)
124
125 * This is a register-only implementation without encryption.
126 - FEAT_MixedEnd (Mixed-endian support)
127 - FEAT_MixedEndEL0 (Mixed-endian support at EL0)
128 - FEAT_MOPS (Standardization of memory operations)
129 - FEAT_MTE (Memory Tagging Extension)
130 - FEAT_MTE2 (Memory Tagging Extension)
131 - FEAT_MTE3 (MTE Asymmetric Fault Handling)
132 - FEAT_MTE4 (Enhanced Memory Tagging Extension)
133 - FEAT_MTE_ASYM_FAULT (Memory tagging asymmetric faults)
134 - FEAT_MTE_ASYNC (Asynchronous reporting of Tag Check Fault)
135 - FEAT_MTE_CANONICAL_TAGS (Canonical tag checking)
136 - FEAT_MTE_NO_ADDRESS_TAGS (Address tagging disabled)
137 - FEAT_MTE_PERM (NoTagAccess memory attribute)
138 - FEAT_MTE_STORE_ONLY (Store-only tag checking)
139 - FEAT_MTE_TAGGED_FAR (Full address reporting of Tag Check Fault)
140 - FEAT_NMI (Non-maskable Interrupt)
141 - FEAT_NV (Nested Virtualization)
142 - FEAT_NV2 (Enhanced nested virtualization support)
143 - FEAT_PACIMP (Pointer authentication - IMPLEMENTATION DEFINED algorithm)
144 - FEAT_PACQARMA3 (Pointer authentication - QARMA3 algorithm)
145 - FEAT_PACQARMA5 (Pointer authentication - QARMA5 algorithm)
146 - FEAT_PAN (Privileged access never)
147 - FEAT_PAN2 (AT S1E1R and AT S1E1W instruction variants affected by PSTATE.PAN)
148 - FEAT_PAN3 (Support for SCTLR_ELx.EPAN)
149 - FEAT_PAuth (Pointer authentication)
150 - FEAT_PAuth2 (Enhancements to pointer authentication)
151 - FEAT_PMULL (PMULL, PMULL2 instructions)
152 - FEAT_PMUv3 (PMU extension version 3)
153 - FEAT_PMUv3p1 (PMU Extensions v3.1)
154 - FEAT_PMUv3p4 (PMU Extensions v3.4)
155 - FEAT_PMUv3p5 (PMU Extensions v3.5)
156 - FEAT_RAS (Reliability, availability, and serviceability)
157 - FEAT_RASv1p1 (RAS Extension v1.1)
158 - FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions)
159 - FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental)
160 - FEAT_RME_GPC2 (RME Granule Protection Check 2 Extension)
161 - FEAT_RNG (Random number generator)
162 - FEAT_RNG_TRAP (Trapping support for RNDR/RNDRRS)
163 - FEAT_RPRES (Increased precision of FRECPE and FRSQRTE)
164 - FEAT_S1PIE (Stage 1 permission indirections)
165 - FEAT_S2FWB (Stage 2 forced Write-Back)
166 - FEAT_S2PIE (Stage 2 permission indirections)
167 - FEAT_S2TGran16K (Support for 16KB memory translation granule size at stage 2)
168 - FEAT_S2TGran4K (Support for 4KB memory translation granule size at stage 2)
169 - FEAT_S2TGran64K (Support for 64KB memory translation granule size at stage 2)
170 - FEAT_SB (Speculation Barrier)
171 - FEAT_SCTLR2 (Extension to SCTLR_ELx)
172 - FEAT_Secure (Support for Secure state)
173 - FEAT_SEL2 (Secure EL2)
174 - FEAT_SHA1 (SHA1 instructions)
175 - FEAT_SHA256 (SHA256 instructions)
176 - FEAT_SHA3 (Advanced SIMD SHA3 instructions)
177 - FEAT_SHA512 (Advanced SIMD SHA512 instructions)
178 - FEAT_SM3 (Advanced SIMD SM3 instructions)
179 - FEAT_SM4 (Advanced SIMD SM4 instructions)
180 - FEAT_SME (Scalable Matrix Extension)
181 - FEAT_SME2 (Scalable Matrix Extension version 2)
182 - FEAT_SME2p1 (Scalable Matrix Extension version 2.1)
183 - FEAT_SME2p2 (Scalable Matrix Extension version 2.2)
184 - FEAT_SME_B16B16 (Non-widening BFloat16 arithmetic for SME2)
185 - FEAT_SME_FA64 (Full A64 instruction set in Streaming SVE mode)
186 - FEAT_SME_F16F16 (Non-widening half-precision FP16 arithmetic for SME2)
187 - FEAT_SME_F64F64 (Double-precision floating-point outer product instructions)
188 - FEAT_SME_F8F16 (SME2 ZA-targeting FP8 multiply-accumulate, dot product, and outer product to half-precision instructions)
189 - FEAT_SME_F8F32 (SME2 ZA-targeting FP8 multiply-accumulate, dot product, and outer product to single-precision instructions)
190 - FEAT_SME_I16I64 (16-bit to 64-bit integer widening outer product instructions)
191 - FEAT_SME_LUTv2 (Lookup table instructions with 4-bit indices and 8-bit elements)
192 - FEAT_SME_MOP4 (Quarter-tile outer product instructions)
193 - FEAT_SME_TMOP (Structured sparsity outer product instructions)
194 - FEAT_SSVE_AES (Streaming SVE Mode Advanced Encryption Standard and 128-bit polynomial multiply long instructions)
195 - FEAT_SSVE_BitPerm (Streaming Scalable Vector Bit Permutes instructions)
196 - FEAT_SSVE_FEXPA (Streaming FEXPA instruction)
197 - FEAT_SSVE_FP8DOT2 (SVE2 FP8 2-way dot product to half-precision instructions in Streaming SVE mode)
198 - FEAT_SSVE_FP8DOT4 (SVE2 FP8 4-way dot product to single-precision instructions in Streaming SVE mode)
199 - FEAT_SSVE_FP8FMA (SVE2 FP8 multiply-accumulate to half-precision and single-precision instructions in Streaming SVE mode)
200 - FEAT_SVE (Scalable Vector Extension)
201 - FEAT_SVE_AES (Scalable Vector AES instructions)
202 - FEAT_SVE_AES2 (SVE multi-vector Advanced Encryption Standard and 128-bit polynomial multiply long instructions)
203 - FEAT_SVE_B16B16 (Non-widening BFloat16 arithmetic for SVE2)
204 - FEAT_SVE_BFSCALE (BFloat16 Floating-Point Adjust Exponent)
205 - FEAT_SVE_BitPerm (Scalable Vector Bit Permutes instructions)
206 - FEAT_SVE_PMULL128 (Scalable Vector PMULL instructions)
207 - FEAT_SVE_SHA3 (Scalable Vector SHA3 instructions)
208 - FEAT_SVE_SM4 (Scalable Vector SM4 instructions)
209 - FEAT_SVE2 (Scalable Vector Extension version 2)
210 - FEAT_SVE2p1 (Scalable Vector Extension version 2.1)
211 - FEAT_SVE2p2 (Scalable Vector Extension version 2.2)
212 - FEAT_SPECRES (Speculation restriction instructions)
213 - FEAT_SSBS (Speculative Store Bypass Safe)
214 - FEAT_SSBS2 (MRS and MSR instructions for SSBS version 2)
215 - FEAT_TCR2 (Support for TCR2_ELx)
216 - FEAT_TGran16K (Support for 16KB memory translation granule size at stage 1)
217 - FEAT_TGran4K (Support for 4KB memory translation granule size at stage 1)
218 - FEAT_TGran64K (Support for 64KB memory translation granule size at stage 1)
219 - FEAT_TIDCP1 (EL0 use of IMPLEMENTATION DEFINED functionality)
220 - FEAT_TLBIOS (TLB invalidate instructions in Outer Shareable domain)
221 - FEAT_TLBIRANGE (TLB invalidate range instructions)
222 - FEAT_TTCNP (Translation table Common not private translations)
223 - FEAT_TTL (Translation Table Level)
224 - FEAT_TTST (Small translation tables)
225 - FEAT_UAO (Unprivileged Access Override control)
226 - FEAT_VHE (Virtualization Host Extensions)
227 - FEAT_VMID16 (16-bit VMID)
228 - FEAT_WFxT (WFE and WFI instructions with timeout)
229 - FEAT_XNX (Translation table stage 2 Unprivileged Execute-never)
230 - FEAT_XS (XS attribute)
231
232 For information on the specifics of these extensions, please refer
233 to the `Arm Architecture Reference Manual for A-profile architecture
234 <https://developer.arm.com/documentation/ddi0487/latest>`_.
235
236 When a specific named CPU is being emulated, only those features which
237 are present in hardware for that CPU are emulated. (If a feature is
238 not in the list above then it is not supported, even if the real
239 hardware should have it.)
240
241 The ``max-v8`` CPU enables all of the listed Armv8-A architecture
242 extensions but none of the Armv9-A architecture extensions.
243
244 The ``max-v9`` CPU enables all of the listed extensions except for
245 those that are prohibited by the Armv9-A architecture: FEAT_AA32EL1,
246 FEAT_AA32EL2, FEAT_AA32EL3, and FEAT_DoubleLock.
247
248 The ``max`` CPU is an alias for ``max-v9`` under AArch64 TCG emulation,
249 an alias for ``max-v8`` under AArch32 TCG emulation, or an alias
250 for ``host`` under hardware virtualization.
251
252 R-profile CPU architecture support
253 ==================================
254
255 QEMU's TCG emulation support for R-profile CPUs is currently limited.
256 We emulate only the Cortex-R5 and Cortex-R5F CPUs.
257
258 M-profile CPU architecture support
259 ==================================
260
261 QEMU's TCG emulation includes support for Armv6-M, Armv7-M, Armv8-M, and
262 Armv8.1-M versions of the M-profile architucture. It also has support
263 for the following architecture extensions:
264
265 - FP (Floating-point Extension)
266 - FPCXT (FPCXT access instructions)
267 - HP (Half-precision floating-point instructions)
268 - LOB (Low Overhead loops and Branch future)
269 - M (Main Extension)
270 - MPU (Memory Protection Unit Extension)
271 - PXN (Privileged Execute Never)
272 - RAS (Reliability, Serviceability and Availability): "minimum RAS Extension" only
273 - S (Security Extension)
274 - ST (System Timer Extension)
275
276 For information on the specifics of these extensions, please refer
277 to the `Armv8-M Arm Architecture Reference Manual
278 <https://developer.arm.com/documentation/ddi0553/latest>`_.
279
280 When a specific named CPU is being emulated, only those features which
281 are present in hardware for that CPU are emulated. (If a feature is
282 not in the list above then it is not supported, even if the real
283 hardware should have it.) There is no equivalent of the ``max`` CPU for
284 M-profile.