master
rst 41 lines 1.4 KB
Raw
1 Tenstorrent Atlantis (``tt-atlantis``)
2 ======================================
3
4 The Tenstorrent Atlantis platform is a collaboration between Tenstorrent
5 and CoreLab Technology. It is based on the Atlantis SoC, which includes
6 the Ascalon-X CPU and other IP from Tenstorrent and CoreLab Technology.
7
8 The Tenstorrent Ascalon-X is a high performance 64-bit RVA23 compliant
9 RISC-V CPU.
10
11 tt-atlantis QEMU model features
12 -------------------------------
13
14 * 8-core Ascalon-X CPU Cluster
15 * RISC-V compliant Advanced Interrupt Architecture
16 * 16550A compatible UART
17
18 Known limitations
19 -----------------
20
21 The QEMU tt-atlantis machine does not yet model every device on the
22 real platform. Notably:
23
24 * There is no PCI host bridge, so virtio-pci devices cannot be
25 attached. Boots that need block storage must use ``-initrd`` with
26 an initramfs.
27 * The DesignWare UART is modelled with QEMU's ns16550-compatible
28 ``serial_mm`` device; DesignWare-specific registers beyond that
29 set return 0.
30
31 Supported software
32 ------------------
33
34 The Tenstorrent Ascalon CPUs avoid proprietary or non-standard
35 extensions, so compatibility with existing software is generally
36 good. The QEMU tt-atlantis machine works with upstream OpenSBI
37 and Linux with default configurations.
38
39 The development board hardware will require some implementation
40 specific setup in firmware which is being developed and may
41 become a requirement or option for the tt-atlantis machine.