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1 /*
2 * B-L475E-IOT01A Discovery Kit machine
3 * (B-L475E-IOT01A IoT Node)
4 *
5 * Copyright (c) 2023-2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
6 * Copyright (c) 2023-2024 Inès Varhol <ines.varhol@telecom-paris.fr>
7 *
8 * SPDX-License-Identifier: GPL-2.0-or-later
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
12 *
13 * This work is heavily inspired by the netduinoplus2 by Alistair Francis.
14 * Original code is licensed under the MIT License:
15 *
16 * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
17 */
18
19 /*
20 * The reference used is the STMicroElectronics UM2153 User manual
21 * Discovery kit for IoT node, multi-channel communication with STM32L4.
22 * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation
23 */
24
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include "hw/core/boards.h"
28 #include "hw/core/qdev-properties.h"
29 #include "qemu/error-report.h"
30 #include "hw/arm/boot.h"
31 #include "hw/core/split-irq.h"
32 #include "hw/arm/machines-qom.h"
33 #include "hw/arm/stm32l4x5_soc.h"
34 #include "hw/gpio/stm32l4x5_gpio.h"
35 #include "hw/display/dm163.h"
36
37 /* B-L475E-IOT01A implementation is inspired from netduinoplus2 and arduino */
38
39 /*
40 * There are actually 14 input pins in the DM163 device.
41 * Here the DM163 input pin EN isn't connected to the STM32L4x5
42 * GPIOs as the IM120417002 colors shield doesn't actually use
43 * this pin to drive the RGB matrix.
44 */
45 #define NUM_DM163_INPUTS 13
46
47 static const unsigned dm163_input[NUM_DM163_INPUTS] = {
48 1 * GPIO_NUM_PINS + 2, /* ROW0 PB2 */
49 0 * GPIO_NUM_PINS + 15, /* ROW1 PA15 */
50 0 * GPIO_NUM_PINS + 2, /* ROW2 PA2 */
51 0 * GPIO_NUM_PINS + 7, /* ROW3 PA7 */
52 0 * GPIO_NUM_PINS + 6, /* ROW4 PA6 */
53 0 * GPIO_NUM_PINS + 5, /* ROW5 PA5 */
54 1 * GPIO_NUM_PINS + 0, /* ROW6 PB0 */
55 0 * GPIO_NUM_PINS + 3, /* ROW7 PA3 */
56 0 * GPIO_NUM_PINS + 4, /* SIN (SDA) PA4 */
57 1 * GPIO_NUM_PINS + 1, /* DCK (SCK) PB1 */
58 2 * GPIO_NUM_PINS + 3, /* RST_B (RST) PC3 */
59 2 * GPIO_NUM_PINS + 4, /* LAT_B (LAT) PC4 */
60 2 * GPIO_NUM_PINS + 5, /* SELBK (SB) PC5 */
61 };
62
63 #define TYPE_B_L475E_IOT01A MACHINE_TYPE_NAME("b-l475e-iot01a")
64 OBJECT_DECLARE_SIMPLE_TYPE(Bl475eMachineState, B_L475E_IOT01A)
65
66 typedef struct Bl475eMachineState {
67 MachineState parent_obj;
68
69 Stm32l4x5SocState soc;
70 SplitIRQ gpio_splitters[NUM_DM163_INPUTS];
71 DM163State dm163;
72 } Bl475eMachineState;
73
74 static void bl475e_init(MachineState *machine)
75 {
76 Bl475eMachineState *s = B_L475E_IOT01A(machine);
77 const Stm32l4x5SocClass *sc;
78 DeviceState *dev, *gpio_out_splitter;
79 unsigned gpio, pin;
80
81 object_initialize_child(OBJECT(machine), "soc", &s->soc,
82 TYPE_STM32L4X5XG_SOC);
83 sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
84
85 sc = STM32L4X5_SOC_GET_CLASS(&s->soc);
86 armv7m_load_kernel(s->soc.armv7m.cpu, machine->kernel_filename, 0,
87 sc->flash_size);
88
89 if (object_class_by_name(TYPE_DM163)) {
90 object_initialize_child(OBJECT(machine), "dm163",
91 &s->dm163, TYPE_DM163);
92 dev = DEVICE(&s->dm163);
93 qdev_realize(dev, NULL, &error_abort);
94
95 for (unsigned i = 0; i < NUM_DM163_INPUTS; i++) {
96 object_initialize_child(OBJECT(machine), "gpio-out-splitters[*]",
97 &s->gpio_splitters[i], TYPE_SPLIT_IRQ);
98 gpio_out_splitter = DEVICE(&s->gpio_splitters[i]);
99 qdev_prop_set_uint32(gpio_out_splitter, "num-lines", 2);
100 qdev_realize(gpio_out_splitter, NULL, &error_fatal);
101
102 qdev_connect_gpio_out(gpio_out_splitter, 0,
103 qdev_get_gpio_in(DEVICE(&s->soc), dm163_input[i]));
104 qdev_connect_gpio_out(gpio_out_splitter, 1,
105 qdev_get_gpio_in(dev, i));
106 gpio = dm163_input[i] / GPIO_NUM_PINS;
107 pin = dm163_input[i] % GPIO_NUM_PINS;
108 qdev_connect_gpio_out(DEVICE(&s->soc.gpio[gpio]), pin,
109 qdev_get_gpio_in(DEVICE(gpio_out_splitter), 0));
110 }
111 }
112 }
113
114 static void bl475e_machine_init(ObjectClass *oc, const void *data)
115 {
116 MachineClass *mc = MACHINE_CLASS(oc);
117 static const char *machine_valid_cpu_types[] = {
118 ARM_CPU_TYPE_NAME("cortex-m4"),
119 NULL
120 };
121 mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)";
122 mc->init = bl475e_init;
123 mc->valid_cpu_types = machine_valid_cpu_types;
124
125 /* SRAM pre-allocated as part of the SoC instantiation */
126 mc->default_ram_size = 0;
127 }
128
129 static const TypeInfo bl475e_machine_type[] = {
130 {
131 .name = TYPE_B_L475E_IOT01A,
132 .parent = TYPE_MACHINE,
133 .instance_size = sizeof(Bl475eMachineState),
134 .class_init = bl475e_machine_init,
135 .interfaces = arm_machine_interfaces,
136 }
137 };
138
139 DEFINE_TYPES(bl475e_machine_type)