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1 /*
2 * Samsung exynos4 SoC based boards emulation
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
5 * Maksim Kozlov <m.kozlov@samsung.com>
6 * Evgeny Voevodin <e.voevodin@samsung.com>
7 * Igor Mitsyanko <i.mitsyanko@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
21 *
22 */
23
24 #include "qemu/osdep.h"
25 #include "qemu/units.h"
26 #include "qapi/error.h"
27 #include "qemu/error-report.h"
28 #include "hw/core/sysbus.h"
29 #include "net/net.h"
30 #include "hw/arm/boot.h"
31 #include "hw/arm/machines-qom.h"
32 #include "system/address-spaces.h"
33 #include "hw/arm/exynos4210.h"
34 #include "hw/net/lan9118.h"
35 #include "hw/core/qdev-properties.h"
36 #include "hw/core/boards.h"
37 #include "hw/core/irq.h"
38 #include "target/arm/cpu-qom.h"
39
40 #define SMDK_LAN9118_BASE_ADDR 0x05000000
41
42 typedef enum Exynos4BoardType {
43 EXYNOS4_BOARD_NURI,
44 EXYNOS4_BOARD_SMDKC210,
45 EXYNOS4_NUM_OF_BOARDS
46 } Exynos4BoardType;
47
48 typedef struct Exynos4BoardState {
49 Exynos4210State soc;
50 MemoryRegion dram0_mem;
51 MemoryRegion dram1_mem;
52 struct arm_boot_info bootinfo;
53 } Exynos4BoardState;
54
55 static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
56 [EXYNOS4_BOARD_NURI] = 0xD33,
57 [EXYNOS4_BOARD_SMDKC210] = 0xB16,
58 };
59
60 static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
61 [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG,
62 [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
63 };
64
65 static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
66 [EXYNOS4_BOARD_NURI] = 1 * GiB,
67 [EXYNOS4_BOARD_SMDKC210] = 1 * GiB,
68 };
69
70 static void lan9215_init(uint32_t base, qemu_irq irq)
71 {
72 DeviceState *dev;
73 SysBusDevice *s;
74
75 /* This should be a 9215 but the 9118 is close enough */
76 dev = qemu_create_nic_device(TYPE_LAN9118, true, NULL);
77 if (dev) {
78 qdev_prop_set_uint32(dev, "mode_16bit", 1);
79 s = SYS_BUS_DEVICE(dev);
80 sysbus_realize_and_unref(s, &error_fatal);
81 sysbus_mmio_map(s, 0, base);
82 sysbus_connect_irq(s, 0, irq);
83 }
84 }
85
86 static void exynos4_boards_init_ram(Exynos4BoardState *s,
87 MemoryRegion *system_mem,
88 unsigned long ram_size)
89 {
90 unsigned long mem_size = ram_size;
91
92 if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) {
93 memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1",
94 mem_size - EXYNOS4210_DRAM_MAX_SIZE,
95 &error_fatal);
96 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR,
97 &s->dram1_mem);
98 mem_size = EXYNOS4210_DRAM_MAX_SIZE;
99 }
100
101 memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size,
102 &error_fatal);
103 memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR,
104 &s->dram0_mem);
105 }
106
107 static Exynos4BoardState *
108 exynos4_boards_init_common(MachineState *machine,
109 Exynos4BoardType board_type)
110 {
111 Exynos4BoardState *s = g_new0(Exynos4BoardState, 1);
112
113 s->bootinfo.loader_start = EXYNOS4210_BASE_BOOT_ADDR;
114 s->bootinfo.smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR;
115 s->bootinfo.write_secondary_boot = exynos4210_write_secondary;
116 s->bootinfo.ram_size = exynos4_board_ram_size[board_type];
117 s->bootinfo.board_id = exynos4_board_id[board_type];
118 s->bootinfo.smp_bootreg_addr = exynos4_board_smp_bootreg_addr[board_type];
119 s->bootinfo.gic_cpu_if_addr = EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
120
121 exynos4_boards_init_ram(s, get_system_memory(),
122 exynos4_board_ram_size[board_type]);
123
124 object_initialize_child(OBJECT(machine), "soc", &s->soc,
125 TYPE_EXYNOS4210_SOC);
126 sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal);
127
128 return s;
129 }
130
131 static void nuri_init(MachineState *machine)
132 {
133 Exynos4BoardState *s = exynos4_boards_init_common(machine,
134 EXYNOS4_BOARD_NURI);
135
136 arm_load_kernel(s->soc.cpu[0], machine, &s->bootinfo);
137 }
138
139 static void smdkc210_init(MachineState *machine)
140 {
141 Exynos4BoardState *s = exynos4_boards_init_common(machine,
142 EXYNOS4_BOARD_SMDKC210);
143
144 lan9215_init(SMDK_LAN9118_BASE_ADDR,
145 qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)]));
146 arm_load_kernel(s->soc.cpu[0], machine, &s->bootinfo);
147 }
148
149 static const char * const valid_cpu_types[] = {
150 ARM_CPU_TYPE_NAME("cortex-a9"),
151 NULL
152 };
153
154 static void nuri_class_init(ObjectClass *oc, const void *data)
155 {
156 MachineClass *mc = MACHINE_CLASS(oc);
157
158 mc->desc = "Samsung NURI board (Exynos4210)";
159 mc->init = nuri_init;
160 mc->valid_cpu_types = valid_cpu_types;
161 mc->max_cpus = EXYNOS4210_NCPUS;
162 mc->min_cpus = EXYNOS4210_NCPUS;
163 mc->default_cpus = EXYNOS4210_NCPUS;
164 mc->ignore_memory_transaction_failures = true;
165 mc->auto_create_sdcard = true;
166 }
167
168 static const TypeInfo nuri_type = {
169 .name = MACHINE_TYPE_NAME("nuri"),
170 .parent = TYPE_MACHINE,
171 .class_init = nuri_class_init,
172 .interfaces = arm_machine_interfaces,
173 };
174
175 static void smdkc210_class_init(ObjectClass *oc, const void *data)
176 {
177 MachineClass *mc = MACHINE_CLASS(oc);
178
179 mc->desc = "Samsung SMDKC210 board (Exynos4210)";
180 mc->init = smdkc210_init;
181 mc->valid_cpu_types = valid_cpu_types;
182 mc->max_cpus = EXYNOS4210_NCPUS;
183 mc->min_cpus = EXYNOS4210_NCPUS;
184 mc->default_cpus = EXYNOS4210_NCPUS;
185 mc->ignore_memory_transaction_failures = true;
186 mc->auto_create_sdcard = true;
187 }
188
189 static const TypeInfo smdkc210_type = {
190 .name = MACHINE_TYPE_NAME("smdkc210"),
191 .parent = TYPE_MACHINE,
192 .class_init = smdkc210_class_init,
193 .interfaces = arm_machine_interfaces,
194 };
195
196 static void exynos4_machines_init(void)
197 {
198 type_register_static(&nuri_type);
199 type_register_static(&smdkc210_type);
200 }
201
202 type_init(exynos4_machines_init)