| 1 | /* |
| 2 | * KZM Board System emulation. |
| 3 | * |
| 4 | * Copyright (c) 2008 OKL and 2011 NICTA |
| 5 | * Written by Hans at OK-Labs |
| 6 | * Updated by Peter Chubb. |
| 7 | * |
| 8 | * This code is licensed under the GPL, version 2 or later. |
| 9 | * See the file `COPYING' in the top level directory. |
| 10 | * |
| 11 | * It (partially) emulates a Kyoto Microcomputer |
| 12 | * KZM-ARM11-01 evaluation board, with a Freescale |
| 13 | * i.MX31 SoC |
| 14 | */ |
| 15 | |
| 16 | #include "qemu/osdep.h" |
| 17 | #include "qapi/error.h" |
| 18 | #include "hw/arm/fsl-imx31.h" |
| 19 | #include "hw/arm/boot.h" |
| 20 | #include "hw/arm/machines-qom.h" |
| 21 | #include "hw/core/boards.h" |
| 22 | #include "qemu/error-report.h" |
| 23 | #include "system/address-spaces.h" |
| 24 | #include "net/net.h" |
| 25 | #include "hw/net/lan9118.h" |
| 26 | #include "hw/char/serial-mm.h" |
| 27 | #include "system/qtest.h" |
| 28 | #include "system/system.h" |
| 29 | #include "qemu/cutils.h" |
| 30 | |
| 31 | /* Memory map for Kzm Emulation Baseboard: |
| 32 | * 0x00000000-0x7fffffff See i.MX31 SOC for support |
| 33 | * 0x80000000-0x8fffffff RAM EMULATED |
| 34 | * 0x90000000-0x9fffffff RAM EMULATED |
| 35 | * 0xa0000000-0xafffffff Flash IGNORED |
| 36 | * 0xb0000000-0xb3ffffff Unavailable IGNORED |
| 37 | * 0xb4000000-0xb4000fff 8-bit free space IGNORED |
| 38 | * 0xb4001000-0xb400100f Board control IGNORED |
| 39 | * 0xb4001003 DIP switch |
| 40 | * 0xb4001010-0xb400101f 7-segment LED IGNORED |
| 41 | * 0xb4001020-0xb400102f LED IGNORED |
| 42 | * 0xb4001030-0xb400103f LED IGNORED |
| 43 | * 0xb4001040-0xb400104f FPGA, UART EMULATED |
| 44 | * 0xb4001050-0xb400105f FPGA, UART EMULATED |
| 45 | * 0xb4001060-0xb40fffff FPGA IGNORED |
| 46 | * 0xb6000000-0xb61fffff LAN controller EMULATED |
| 47 | * 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED |
| 48 | * 0xb6300000-0xb7ffffff Free IGNORED |
| 49 | * 0xb8000000-0xb8004fff Memory control registers IGNORED |
| 50 | * 0xc0000000-0xc3ffffff PCMCIA/CF IGNORED |
| 51 | * 0xc4000000-0xffffffff Reserved IGNORED |
| 52 | */ |
| 53 | |
| 54 | typedef struct IMX31KZM { |
| 55 | FslIMX31State soc; |
| 56 | MemoryRegion ram_alias; |
| 57 | struct arm_boot_info bootinfo; |
| 58 | } IMX31KZM; |
| 59 | |
| 60 | #define KZM_RAM_ADDR (FSL_IMX31_SDRAM0_ADDR) |
| 61 | #define KZM_FPGA_ADDR (FSL_IMX31_CS4_ADDR + 0x1040) |
| 62 | #define KZM_LAN9118_ADDR (FSL_IMX31_CS5_ADDR) |
| 63 | |
| 64 | static void kzm_init(MachineState *machine) |
| 65 | { |
| 66 | IMX31KZM *s = g_new0(IMX31KZM, 1); |
| 67 | unsigned int ram_size; |
| 68 | unsigned int alias_offset; |
| 69 | unsigned int i; |
| 70 | |
| 71 | object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31); |
| 72 | |
| 73 | qdev_realize(DEVICE(&s->soc), NULL, &error_fatal); |
| 74 | |
| 75 | /* Check the amount of memory is compatible with the SOC */ |
| 76 | if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) { |
| 77 | char *sz = size_to_str(FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE); |
| 78 | error_report("RAM size more than %s is not supported", sz); |
| 79 | g_free(sz); |
| 80 | exit(EXIT_FAILURE); |
| 81 | } |
| 82 | |
| 83 | memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR, |
| 84 | machine->ram); |
| 85 | |
| 86 | /* initialize the alias memory if any */ |
| 87 | for (i = 0, ram_size = machine->ram_size, alias_offset = 0; |
| 88 | (i < 2) && ram_size; i++) { |
| 89 | unsigned int size; |
| 90 | static const struct { |
| 91 | hwaddr addr; |
| 92 | unsigned int size; |
| 93 | } ram[2] = { |
| 94 | { FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE }, |
| 95 | { FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE }, |
| 96 | }; |
| 97 | |
| 98 | size = MIN(ram_size, ram[i].size); |
| 99 | |
| 100 | ram_size -= size; |
| 101 | |
| 102 | if (size < ram[i].size) { |
| 103 | memory_region_init_alias(&s->ram_alias, NULL, "ram.alias", |
| 104 | machine->ram, |
| 105 | alias_offset, ram[i].size - size); |
| 106 | memory_region_add_subregion(get_system_memory(), |
| 107 | ram[i].addr + size, &s->ram_alias); |
| 108 | } |
| 109 | |
| 110 | alias_offset += ram[i].size; |
| 111 | } |
| 112 | |
| 113 | if (qemu_find_nic_info("lan9118", true, NULL)) { |
| 114 | lan9118_init(KZM_LAN9118_ADDR, |
| 115 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52)); |
| 116 | } |
| 117 | |
| 118 | if (serial_hd(2)) { /* touchscreen */ |
| 119 | serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0, |
| 120 | qdev_get_gpio_in(DEVICE(&s->soc.avic), 52), |
| 121 | 14745600, serial_hd(2), DEVICE_NATIVE_ENDIAN); |
| 122 | } |
| 123 | |
| 124 | s->bootinfo.loader_start = KZM_RAM_ADDR; |
| 125 | s->bootinfo.board_id = 1722; |
| 126 | s->bootinfo.ram_size = machine->ram_size; |
| 127 | |
| 128 | if (!qtest_enabled()) { |
| 129 | arm_load_kernel(&s->soc.cpu, machine, &s->bootinfo); |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | static void kzm_machine_init(MachineClass *mc) |
| 134 | { |
| 135 | mc->desc = "ARM KZM Emulation Baseboard (ARM1136)"; |
| 136 | mc->init = kzm_init; |
| 137 | mc->ignore_memory_transaction_failures = true; |
| 138 | mc->default_ram_id = "kzm.ram"; |
| 139 | } |
| 140 | |
| 141 | DEFINE_MACHINE_ARM("kzm", kzm_machine_init) |