| 1 | /* omap_sx1.c Support for the Siemens SX1 smartphone emulation. |
| 2 | * |
| 3 | * Copyright (C) 2008 |
| 4 | * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
| 5 | * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com> |
| 6 | * |
| 7 | * based on PalmOne's (TM) PDAs support (palm.c) |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * PalmOne's (TM) PDAs. |
| 12 | * |
| 13 | * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org> |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License as |
| 17 | * published by the Free Software Foundation; either version 2 of |
| 18 | * the License, or (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License along |
| 26 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 27 | */ |
| 28 | #include "qemu/osdep.h" |
| 29 | #include "qemu/units.h" |
| 30 | #include "qapi/error.h" |
| 31 | #include "ui/console.h" |
| 32 | #include "hw/arm/omap.h" |
| 33 | #include "hw/core/boards.h" |
| 34 | #include "hw/arm/boot.h" |
| 35 | #include "hw/arm/machines-qom.h" |
| 36 | #include "hw/block/flash.h" |
| 37 | #include "system/qtest.h" |
| 38 | #include "system/address-spaces.h" |
| 39 | #include "qemu/cutils.h" |
| 40 | #include "qemu/error-report.h" |
| 41 | |
| 42 | |
| 43 | /*****************************************************************************/ |
| 44 | /* Siemens SX1 Cellphone V1 */ |
| 45 | /* - ARM OMAP310 processor |
| 46 | * - SRAM 192 kB |
| 47 | * - SDRAM 32 MB at 0x10000000 |
| 48 | * - Boot flash 16 MB at 0x00000000 |
| 49 | * - Application flash 8 MB at 0x04000000 |
| 50 | * - 3 serial ports |
| 51 | * - 1 SecureDigital |
| 52 | * - 1 LCD display |
| 53 | * - 1 RTC |
| 54 | */ |
| 55 | |
| 56 | /*****************************************************************************/ |
| 57 | /* Siemens SX1 Cellphone V2 */ |
| 58 | /* - ARM OMAP310 processor |
| 59 | * - SRAM 192 kB |
| 60 | * - SDRAM 32 MB at 0x10000000 |
| 61 | * - Boot flash 32 MB at 0x00000000 |
| 62 | * - 3 serial ports |
| 63 | * - 1 SecureDigital |
| 64 | * - 1 LCD display |
| 65 | * - 1 RTC |
| 66 | */ |
| 67 | |
| 68 | static uint64_t static_read(void *opaque, hwaddr offset, |
| 69 | unsigned size) |
| 70 | { |
| 71 | uint32_t *val = opaque; |
| 72 | uint32_t mask = (4 / size) - 1; |
| 73 | |
| 74 | return *val >> ((offset & mask) << 3); |
| 75 | } |
| 76 | |
| 77 | static void static_write(void *opaque, hwaddr offset, |
| 78 | uint64_t value, unsigned size) |
| 79 | { |
| 80 | } |
| 81 | |
| 82 | static const MemoryRegionOps static_ops = { |
| 83 | .read = static_read, |
| 84 | .write = static_write, |
| 85 | .endianness = DEVICE_NATIVE_ENDIAN, |
| 86 | }; |
| 87 | |
| 88 | #define SDRAM_SIZE (32 * MiB) |
| 89 | #define SECTOR_SIZE (128 * KiB) |
| 90 | #define FLASH0_SIZE (16 * MiB) |
| 91 | #define FLASH1_SIZE (8 * MiB) |
| 92 | #define FLASH2_SIZE (32 * MiB) |
| 93 | |
| 94 | typedef struct Sx1MachineState { |
| 95 | MachineState parent; |
| 96 | |
| 97 | struct arm_boot_info bootinfo; |
| 98 | } Sx1MachineState; |
| 99 | |
| 100 | static void sx1_init(MachineState *machine, const int version) |
| 101 | { |
| 102 | /* Both sx1 and sx1-v1 embed the same state as their first member */ |
| 103 | Sx1MachineState *sms = (Sx1MachineState *)machine; |
| 104 | struct omap_mpu_state_s *mpu; |
| 105 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 106 | MemoryRegion *address_space = get_system_memory(); |
| 107 | MemoryRegion *flash = g_new(MemoryRegion, 1); |
| 108 | MemoryRegion *cs = g_new(MemoryRegion, 4); |
| 109 | static uint32_t cs0val = 0x00213090; |
| 110 | static uint32_t cs1val = 0x00215070; |
| 111 | static uint32_t cs2val = 0x00001139; |
| 112 | static uint32_t cs3val = 0x00001139; |
| 113 | DriveInfo *dinfo; |
| 114 | int fl_idx; |
| 115 | uint32_t flash_size = FLASH0_SIZE; |
| 116 | |
| 117 | if (machine->ram_size != mc->default_ram_size) { |
| 118 | char *sz = size_to_str(mc->default_ram_size); |
| 119 | error_report("Invalid RAM size, should be %s", sz); |
| 120 | g_free(sz); |
| 121 | exit(EXIT_FAILURE); |
| 122 | } |
| 123 | |
| 124 | if (version == 2) { |
| 125 | flash_size = FLASH2_SIZE; |
| 126 | } |
| 127 | |
| 128 | memory_region_add_subregion(address_space, OMAP_EMIFF_BASE, machine->ram); |
| 129 | |
| 130 | mpu = omap310_mpu_init(machine->ram, machine->cpu_type); |
| 131 | |
| 132 | /* External Flash (EMIFS) */ |
| 133 | memory_region_init_rom(flash, NULL, "omap_sx1.flash0-0", flash_size, |
| 134 | &error_fatal); |
| 135 | memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); |
| 136 | |
| 137 | memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val, |
| 138 | "sx1.cs0", OMAP_CS0_SIZE - flash_size); |
| 139 | memory_region_add_subregion(address_space, |
| 140 | OMAP_CS0_BASE + flash_size, &cs[0]); |
| 141 | |
| 142 | |
| 143 | memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val, |
| 144 | "sx1.cs2", OMAP_CS2_SIZE); |
| 145 | memory_region_add_subregion(address_space, |
| 146 | OMAP_CS2_BASE, &cs[2]); |
| 147 | |
| 148 | memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val, |
| 149 | "sx1.cs3", OMAP_CS3_SIZE); |
| 150 | memory_region_add_subregion(address_space, |
| 151 | OMAP_CS3_BASE, &cs[3]); |
| 152 | |
| 153 | fl_idx = 0; |
| 154 | if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { |
| 155 | pflash_cfi01_register(OMAP_CS0_BASE, |
| 156 | "omap_sx1.flash0-1", flash_size, |
| 157 | blk_by_legacy_dinfo(dinfo), |
| 158 | SECTOR_SIZE, 4, 0, 0, 0, 0, 0); |
| 159 | fl_idx++; |
| 160 | } |
| 161 | |
| 162 | if ((version == 1) && |
| 163 | (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { |
| 164 | MemoryRegion *flash_1 = g_new(MemoryRegion, 1); |
| 165 | memory_region_init_rom(flash_1, NULL, "omap_sx1.flash1-0", |
| 166 | FLASH1_SIZE, &error_fatal); |
| 167 | memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1); |
| 168 | |
| 169 | memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val, |
| 170 | "sx1.cs1", OMAP_CS1_SIZE - FLASH1_SIZE); |
| 171 | memory_region_add_subregion(address_space, |
| 172 | OMAP_CS1_BASE + FLASH1_SIZE, &cs[1]); |
| 173 | |
| 174 | pflash_cfi01_register(OMAP_CS1_BASE, |
| 175 | "omap_sx1.flash1-1", FLASH1_SIZE, |
| 176 | blk_by_legacy_dinfo(dinfo), |
| 177 | SECTOR_SIZE, 4, 0, 0, 0, 0, 0); |
| 178 | fl_idx++; |
| 179 | } else { |
| 180 | memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val, |
| 181 | "sx1.cs1", OMAP_CS1_SIZE); |
| 182 | memory_region_add_subregion(address_space, |
| 183 | OMAP_CS1_BASE, &cs[1]); |
| 184 | } |
| 185 | |
| 186 | if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) { |
| 187 | error_report("Kernel or Flash image must be specified"); |
| 188 | exit(1); |
| 189 | } |
| 190 | |
| 191 | /* Load the kernel. */ |
| 192 | sms->bootinfo.loader_start = OMAP_EMIFF_BASE; |
| 193 | sms->bootinfo.ram_size = SDRAM_SIZE; |
| 194 | sms->bootinfo.board_id = 0x265; |
| 195 | arm_load_kernel(mpu->cpu, machine, &sms->bootinfo); |
| 196 | |
| 197 | /* TODO: fix next line */ |
| 198 | //~ qemu_console_resize(ds, 640, 480); |
| 199 | } |
| 200 | |
| 201 | static void sx1_init_v1(MachineState *machine) |
| 202 | { |
| 203 | sx1_init(machine, 1); |
| 204 | } |
| 205 | |
| 206 | static void sx1_init_v2(MachineState *machine) |
| 207 | { |
| 208 | sx1_init(machine, 2); |
| 209 | } |
| 210 | |
| 211 | static void sx1_machine_v2_class_init(ObjectClass *oc, const void *data) |
| 212 | { |
| 213 | MachineClass *mc = MACHINE_CLASS(oc); |
| 214 | |
| 215 | mc->desc = "Siemens SX1 (OMAP310) V2"; |
| 216 | mc->init = sx1_init_v2; |
| 217 | mc->ignore_memory_transaction_failures = true; |
| 218 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t"); |
| 219 | mc->default_ram_size = SDRAM_SIZE; |
| 220 | mc->default_ram_id = "omap1.dram"; |
| 221 | mc->auto_create_sdcard = true; |
| 222 | } |
| 223 | |
| 224 | static const TypeInfo sx1_machine_v2_type = { |
| 225 | .name = MACHINE_TYPE_NAME("sx1"), |
| 226 | .parent = TYPE_MACHINE, |
| 227 | .class_init = sx1_machine_v2_class_init, |
| 228 | .instance_size = sizeof(Sx1MachineState), |
| 229 | .interfaces = arm_machine_interfaces, |
| 230 | }; |
| 231 | |
| 232 | static void sx1_machine_v1_class_init(ObjectClass *oc, const void *data) |
| 233 | { |
| 234 | MachineClass *mc = MACHINE_CLASS(oc); |
| 235 | |
| 236 | mc->desc = "Siemens SX1 (OMAP310) V1"; |
| 237 | mc->init = sx1_init_v1; |
| 238 | mc->ignore_memory_transaction_failures = true; |
| 239 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("ti925t"); |
| 240 | mc->default_ram_size = SDRAM_SIZE; |
| 241 | mc->default_ram_id = "omap1.dram"; |
| 242 | mc->auto_create_sdcard = true; |
| 243 | } |
| 244 | |
| 245 | static const TypeInfo sx1_machine_v1_type = { |
| 246 | .name = MACHINE_TYPE_NAME("sx1-v1"), |
| 247 | .parent = TYPE_MACHINE, |
| 248 | .class_init = sx1_machine_v1_class_init, |
| 249 | .instance_size = sizeof(Sx1MachineState), |
| 250 | .interfaces = arm_machine_interfaces, |
| 251 | }; |
| 252 | |
| 253 | static void sx1_machine_init(void) |
| 254 | { |
| 255 | type_register_static(&sx1_machine_v1_type); |
| 256 | type_register_static(&sx1_machine_v2_type); |
| 257 | } |
| 258 | |
| 259 | type_init(sx1_machine_init) |