| 1 | /* |
| 2 | * QEMU 16550A UART emulation |
| 3 | * |
| 4 | * Copyright (c) 2003-2004 Fabrice Bellard |
| 5 | * Copyright (c) 2008 Citrix Systems, Inc. |
| 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | * of this software and associated documentation files (the "Software"), to deal |
| 9 | * in the Software without restriction, including without limitation the rights |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | * copies of the Software, and to permit persons to whom the Software is |
| 12 | * furnished to do so, subject to the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice shall be included in |
| 15 | * all copies or substantial portions of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | * THE SOFTWARE. |
| 24 | */ |
| 25 | |
| 26 | #include "qemu/osdep.h" |
| 27 | #include "qapi/error.h" |
| 28 | #include "qemu/module.h" |
| 29 | #include "system/system.h" |
| 30 | #include "hw/acpi/acpi_aml_interface.h" |
| 31 | #include "hw/char/serial.h" |
| 32 | #include "hw/char/serial-isa.h" |
| 33 | #include "hw/isa/isa.h" |
| 34 | #include "hw/core/qdev-properties.h" |
| 35 | #include "migration/vmstate.h" |
| 36 | #include "qom/object.h" |
| 37 | |
| 38 | OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL) |
| 39 | |
| 40 | struct ISASerialState { |
| 41 | ISADevice parent_obj; |
| 42 | |
| 43 | uint32_t index; |
| 44 | uint32_t iobase; |
| 45 | uint32_t isairq; |
| 46 | SerialState state; |
| 47 | }; |
| 48 | |
| 49 | static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = { |
| 50 | 0x3f8, 0x2f8, 0x3e8, 0x2e8 |
| 51 | }; |
| 52 | static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = { |
| 53 | 4, 3, 4, 3 |
| 54 | }; |
| 55 | |
| 56 | static void serial_isa_realizefn(DeviceState *dev, Error **errp) |
| 57 | { |
| 58 | static int index; |
| 59 | ISADevice *isadev = ISA_DEVICE(dev); |
| 60 | ISASerialState *isa = ISA_SERIAL(dev); |
| 61 | SerialState *s = &isa->state; |
| 62 | |
| 63 | if (isa->index == -1) { |
| 64 | isa->index = index; |
| 65 | } |
| 66 | if (isa->index >= MAX_ISA_SERIAL_PORTS) { |
| 67 | error_setg(errp, "Max. supported number of ISA serial ports is %d.", |
| 68 | MAX_ISA_SERIAL_PORTS); |
| 69 | return; |
| 70 | } |
| 71 | if (isa->iobase == -1) { |
| 72 | isa->iobase = isa_serial_io[isa->index]; |
| 73 | } |
| 74 | if (isa->isairq == -1) { |
| 75 | isa->isairq = isa_serial_irq[isa->index]; |
| 76 | } |
| 77 | index++; |
| 78 | |
| 79 | s->irq = isa_get_irq(isadev, isa->isairq); |
| 80 | qdev_realize(DEVICE(s), NULL, errp); |
| 81 | qdev_set_legacy_instance_id(dev, isa->iobase, 3); |
| 82 | |
| 83 | memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); |
| 84 | isa_register_ioport(isadev, &s->io, isa->iobase); |
| 85 | } |
| 86 | |
| 87 | static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope) |
| 88 | { |
| 89 | ISASerialState *isa = ISA_SERIAL(adev); |
| 90 | Aml *dev; |
| 91 | Aml *crs; |
| 92 | |
| 93 | crs = aml_resource_template(); |
| 94 | aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08)); |
| 95 | aml_append(crs, aml_irq(isa->isairq, AML_LEVEL, AML_ACTIVE_LOW, |
| 96 | AML_SHARED)); |
| 97 | |
| 98 | dev = aml_device("COM%d", isa->index + 1); |
| 99 | aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501"))); |
| 100 | aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1))); |
| 101 | aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); |
| 102 | aml_append(dev, aml_name_decl("_CRS", crs)); |
| 103 | |
| 104 | aml_append(scope, dev); |
| 105 | } |
| 106 | |
| 107 | static const VMStateDescription vmstate_isa_serial = { |
| 108 | .name = "serial", |
| 109 | .version_id = 3, |
| 110 | .minimum_version_id = 2, |
| 111 | .fields = (const VMStateField[]) { |
| 112 | VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState), |
| 113 | VMSTATE_END_OF_LIST() |
| 114 | } |
| 115 | }; |
| 116 | |
| 117 | static const Property serial_isa_properties[] = { |
| 118 | DEFINE_PROP_UINT32("index", ISASerialState, index, -1), |
| 119 | DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), |
| 120 | DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), |
| 121 | }; |
| 122 | |
| 123 | static void serial_isa_class_initfn(ObjectClass *klass, const void *data) |
| 124 | { |
| 125 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 126 | AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass); |
| 127 | |
| 128 | dc->realize = serial_isa_realizefn; |
| 129 | dc->vmsd = &vmstate_isa_serial; |
| 130 | adevc->build_dev_aml = serial_isa_build_aml; |
| 131 | device_class_set_props(dc, serial_isa_properties); |
| 132 | set_bit(DEVICE_CATEGORY_INPUT, dc->categories); |
| 133 | } |
| 134 | |
| 135 | static void serial_isa_initfn(Object *o) |
| 136 | { |
| 137 | ISASerialState *self = ISA_SERIAL(o); |
| 138 | |
| 139 | object_initialize_child(o, "serial", &self->state, TYPE_SERIAL); |
| 140 | |
| 141 | qdev_alias_all_properties(DEVICE(&self->state), o); |
| 142 | } |
| 143 | |
| 144 | static const TypeInfo serial_isa_info = { |
| 145 | .name = TYPE_ISA_SERIAL, |
| 146 | .parent = TYPE_ISA_DEVICE, |
| 147 | .instance_size = sizeof(ISASerialState), |
| 148 | .instance_init = serial_isa_initfn, |
| 149 | .class_init = serial_isa_class_initfn, |
| 150 | .interfaces = (const InterfaceInfo[]) { |
| 151 | { TYPE_ACPI_DEV_AML_IF }, |
| 152 | { }, |
| 153 | }, |
| 154 | }; |
| 155 | |
| 156 | static void serial_register_types(void) |
| 157 | { |
| 158 | type_register_static(&serial_isa_info); |
| 159 | } |
| 160 | |
| 161 | type_init(serial_register_types) |
| 162 | |
| 163 | static void serial_isa_init(ISABus *bus, int index, Chardev *chr) |
| 164 | { |
| 165 | DeviceState *dev; |
| 166 | ISADevice *isadev; |
| 167 | |
| 168 | isadev = isa_new(TYPE_ISA_SERIAL); |
| 169 | dev = DEVICE(isadev); |
| 170 | qdev_prop_set_uint32(dev, "index", index); |
| 171 | qdev_prop_set_chr(dev, "chardev", chr); |
| 172 | isa_realize_and_unref(isadev, bus, &error_fatal); |
| 173 | } |
| 174 | |
| 175 | void serial_hds_isa_init(ISABus *bus, int from, int to) |
| 176 | { |
| 177 | int i; |
| 178 | |
| 179 | assert(from >= 0); |
| 180 | assert(to <= MAX_ISA_SERIAL_PORTS); |
| 181 | |
| 182 | for (i = from; i < to; ++i) { |
| 183 | if (serial_hd(i)) { |
| 184 | serial_isa_init(bus, i, serial_hd(i)); |
| 185 | } |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | void isa_serial_set_iobase(ISADevice *serial, hwaddr iobase) |
| 190 | { |
| 191 | ISASerialState *s = ISA_SERIAL(serial); |
| 192 | |
| 193 | serial->ioport_id = iobase; |
| 194 | s->iobase = iobase; |
| 195 | memory_region_set_address(&s->state.io, s->iobase); |
| 196 | } |
| 197 | |
| 198 | void isa_serial_set_enabled(ISADevice *serial, bool enabled) |
| 199 | { |
| 200 | memory_region_set_enabled(&ISA_SERIAL(serial)->state.io, enabled); |
| 201 | } |