| 1 | /* |
| 2 | * QEMU Machine |
| 3 | * |
| 4 | * Copyright (C) 2014 Red Hat Inc |
| 5 | * |
| 6 | * Authors: |
| 7 | * Marcel Apfelbaum <marcel.a@redhat.com> |
| 8 | * |
| 9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 10 | * See the COPYING file in the top-level directory. |
| 11 | */ |
| 12 | |
| 13 | #include "qemu/osdep.h" |
| 14 | #include "qemu/units.h" |
| 15 | #include "qemu/accel.h" |
| 16 | #include "system/replay.h" |
| 17 | #include "hw/core/boards.h" |
| 18 | #include "hw/core/loader.h" |
| 19 | #include "qemu/error-report.h" |
| 20 | #include "qapi/error.h" |
| 21 | #include "qapi/qapi-visit-machine.h" |
| 22 | #include "qapi/qapi-commands-machine.h" |
| 23 | #include "qemu/madvise.h" |
| 24 | #include "qom/compat-properties.h" |
| 25 | #include "qom/object_interfaces.h" |
| 26 | #include "system/cpus.h" |
| 27 | #include "system/system.h" |
| 28 | #include "system/reset.h" |
| 29 | #include "system/runstate.h" |
| 30 | #include "system/xen.h" |
| 31 | #include "system/qtest.h" |
| 32 | #include "hw/pci/pci_bridge.h" |
| 33 | #include "hw/mem/nvdimm.h" |
| 34 | #include "migration/global_state.h" |
| 35 | #include "system/confidential-guest-support.h" |
| 36 | #include "hw/virtio/virtio-pci.h" |
| 37 | #include "hw/virtio/virtio-net.h" |
| 38 | #include "hw/virtio/virtio-iommu.h" |
| 39 | #include "hw/acpi/generic_event_device.h" |
| 40 | #include "qemu/audio.h" |
| 41 | #include "hw/arm/smmuv3.h" |
| 42 | |
| 43 | GlobalProperty hw_compat_11_1[] = { |
| 44 | { "sysbus-ehci-usb", "x-migrate-fetch-addr-64bit", "off" }, |
| 45 | { "pci-ehci-usb", "x-migrate-fetch-addr-64bit", "off" }, |
| 46 | }; |
| 47 | const size_t hw_compat_11_1_len = G_N_ELEMENTS(hw_compat_11_1); |
| 48 | |
| 49 | GlobalProperty hw_compat_11_0[] = { |
| 50 | { "virtio-mmio", VIRTIO_QUEUE_SIZE_OVERRIDE, "1024" }, |
| 51 | { "chardev-vc", "encoding", "cp437" }, |
| 52 | { "tpm-crb", "cap-chunk", "off" }, |
| 53 | { "tpm-crb", "x-allow-chunk-migration", "off" }, |
| 54 | { "tpm-tis-device", "ppi", "off" }, |
| 55 | { TYPE_ARM_SMMUV3, "ats", "off" }, |
| 56 | { TYPE_ARM_SMMUV3, "ril", "on" }, |
| 57 | { TYPE_ARM_SMMUV3, "ssidsize", "0" }, |
| 58 | { TYPE_ARM_SMMUV3, "oas", "44" }, |
| 59 | { "migration", "switchover-ack-legacy", "on" }, |
| 60 | }; |
| 61 | const size_t hw_compat_11_0_len = G_N_ELEMENTS(hw_compat_11_0); |
| 62 | |
| 63 | GlobalProperty hw_compat_10_2[] = { |
| 64 | { "scsi-block", "migrate-pr", "off" }, |
| 65 | { "isa-cirrus-vga", "global-vmstate", "true" }, |
| 66 | }; |
| 67 | const size_t hw_compat_10_2_len = G_N_ELEMENTS(hw_compat_10_2); |
| 68 | |
| 69 | GlobalProperty hw_compat_10_1[] = { |
| 70 | { TYPE_ACPI_GED, "x-has-hest-addr", "false" }, |
| 71 | { TYPE_VIRTIO_NET, "host_tunnel", "off" }, |
| 72 | { TYPE_VIRTIO_NET, "host_tunnel_csum", "off" }, |
| 73 | { TYPE_VIRTIO_NET, "guest_tunnel", "off" }, |
| 74 | { TYPE_VIRTIO_NET, "guest_tunnel_csum", "off" }, |
| 75 | }; |
| 76 | const size_t hw_compat_10_1_len = G_N_ELEMENTS(hw_compat_10_1); |
| 77 | |
| 78 | GlobalProperty hw_compat_10_0[] = { |
| 79 | { "scsi-hd", "dpofua", "off" }, |
| 80 | { "vfio-pci", "x-migration-load-config-after-iter", "off" }, |
| 81 | { "ramfb", "use-legacy-x86-rom", "true"}, |
| 82 | { "vfio-pci-nohotplug", "use-legacy-x86-rom", "true" }, |
| 83 | { "chardev-qemu-vdagent", "x-migration-blocked", "true" }, |
| 84 | }; |
| 85 | const size_t hw_compat_10_0_len = G_N_ELEMENTS(hw_compat_10_0); |
| 86 | |
| 87 | GlobalProperty hw_compat_9_2[] = { |
| 88 | { "arm-cpu", "backcompat-pauth-default-use-qarma5", "true"}, |
| 89 | { "virtio-balloon-pci", "vectors", "0" }, |
| 90 | { "virtio-balloon-pci-transitional", "vectors", "0" }, |
| 91 | { "virtio-balloon-pci-non-transitional", "vectors", "0" }, |
| 92 | { "virtio-mem-pci", "vectors", "0" }, |
| 93 | { "migration", "multifd-clean-tls-termination", "false" }, |
| 94 | { "migration", "send-switchover-start", "off"}, |
| 95 | { "vfio-pci", "x-migration-multifd-transfer", "off" }, |
| 96 | }; |
| 97 | const size_t hw_compat_9_2_len = G_N_ELEMENTS(hw_compat_9_2); |
| 98 | |
| 99 | GlobalProperty hw_compat_9_1[] = { |
| 100 | { TYPE_PCI_DEVICE, "x-pcie-ext-tag", "false" }, |
| 101 | }; |
| 102 | const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1); |
| 103 | |
| 104 | GlobalProperty hw_compat_9_0[] = { |
| 105 | { "arm-cpu", "backcompat-cntfrq", "true" }, |
| 106 | { "scsi-hd", "migrate-emulated-scsi-request", "false" }, |
| 107 | { "scsi-cd", "migrate-emulated-scsi-request", "false" }, |
| 108 | { "vfio-pci", "skip-vsc-check", "false" }, |
| 109 | { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, |
| 110 | { "sd-card", "spec_version", "2" }, |
| 111 | }; |
| 112 | const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); |
| 113 | |
| 114 | GlobalProperty hw_compat_8_2[] = { |
| 115 | { "migration", "zero-page-detection", "legacy"}, |
| 116 | { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, |
| 117 | { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, |
| 118 | { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, |
| 119 | }; |
| 120 | const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); |
| 121 | |
| 122 | GlobalProperty hw_compat_8_1[] = { |
| 123 | { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, |
| 124 | { "ramfb", "x-migrate", "off" }, |
| 125 | { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, |
| 126 | { "igb", "x-pcie-flr-init", "off" }, |
| 127 | { TYPE_VIRTIO_NET, "host_uso", "off"}, |
| 128 | { TYPE_VIRTIO_NET, "guest_uso4", "off"}, |
| 129 | { TYPE_VIRTIO_NET, "guest_uso6", "off"}, |
| 130 | }; |
| 131 | const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); |
| 132 | |
| 133 | GlobalProperty hw_compat_8_0[] = { |
| 134 | { "migration", "multifd-flush-after-each-section", "on"}, |
| 135 | { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, |
| 136 | }; |
| 137 | const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); |
| 138 | |
| 139 | GlobalProperty hw_compat_7_2[] = { |
| 140 | { "e1000e", "migrate-timadj", "off" }, |
| 141 | { "virtio-mem", "x-early-migration", "false" }, |
| 142 | { "migration", "x-preempt-pre-7-2", "true" }, |
| 143 | { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, |
| 144 | }; |
| 145 | const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); |
| 146 | |
| 147 | GlobalProperty hw_compat_7_1[] = { |
| 148 | { "virtio-device", "queue_reset", "false" }, |
| 149 | { "virtio-rng-pci", "vectors", "0" }, |
| 150 | { "virtio-rng-pci-transitional", "vectors", "0" }, |
| 151 | { "virtio-rng-pci-non-transitional", "vectors", "0" }, |
| 152 | }; |
| 153 | const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); |
| 154 | |
| 155 | GlobalProperty hw_compat_7_0[] = { |
| 156 | { "arm-gicv3-common", "force-8-bit-prio", "on" }, |
| 157 | { "nvme-ns", "eui64-default", "on"}, |
| 158 | }; |
| 159 | const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); |
| 160 | |
| 161 | GlobalProperty hw_compat_6_2[] = { |
| 162 | { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, |
| 163 | }; |
| 164 | const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); |
| 165 | |
| 166 | GlobalProperty hw_compat_6_1[] = { |
| 167 | { "vhost-user-vsock-device", "seqpacket", "off" }, |
| 168 | { "nvme-ns", "shared", "off" }, |
| 169 | }; |
| 170 | const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); |
| 171 | |
| 172 | GlobalProperty hw_compat_6_0[] = { |
| 173 | { "gpex-pcihost", "allow-unmapped-accesses", "false" }, |
| 174 | { "i8042", "extended-state", "false"}, |
| 175 | { "nvme-ns", "eui64-default", "off"}, |
| 176 | { "e1000", "init-vet", "off" }, |
| 177 | { "e1000e", "init-vet", "off" }, |
| 178 | { "vhost-vsock-device", "seqpacket", "off" }, |
| 179 | }; |
| 180 | const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); |
| 181 | |
| 182 | GlobalProperty hw_compat_5_2[] = { |
| 183 | { "ICH9-LPC", "smm-compat", "on"}, |
| 184 | { "PIIX4_PM", "smm-compat", "on"}, |
| 185 | { "virtio-blk-device", "report-discard-granularity", "off" }, |
| 186 | { "virtio-net-pci-base", "vectors", "3"}, |
| 187 | { "nvme", "msix-exclusive-bar", "on"}, |
| 188 | }; |
| 189 | const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); |
| 190 | |
| 191 | GlobalProperty hw_compat_5_1[] = { |
| 192 | { "vhost-scsi", "num_queues", "1"}, |
| 193 | { "vhost-user-blk", "num-queues", "1"}, |
| 194 | { "vhost-user-scsi", "num_queues", "1"}, |
| 195 | { "virtio-blk-device", "num-queues", "1"}, |
| 196 | { "virtio-scsi-device", "num_queues", "1"}, |
| 197 | { "nvme", "use-intel-id", "on"}, |
| 198 | { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ |
| 199 | { "pl011", "migrate-clk", "off" }, |
| 200 | { "virtio-pci", "x-ats-page-aligned", "off"}, |
| 201 | }; |
| 202 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
| 203 | |
| 204 | GlobalProperty hw_compat_5_0[] = { |
| 205 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
| 206 | { "virtio-balloon-device", "page-poison", "false" }, |
| 207 | { "vmport", "x-read-set-eax", "off" }, |
| 208 | { "vmport", "x-signal-unsupported-cmd", "off" }, |
| 209 | { "vmport", "x-report-vmx-type", "off" }, |
| 210 | { "vmport", "x-cmds-v2", "off" }, |
| 211 | { "virtio-device", "x-disable-legacy-check", "true" }, |
| 212 | }; |
| 213 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
| 214 | |
| 215 | GlobalProperty hw_compat_4_2[] = { |
| 216 | { "virtio-blk-device", "queue-size", "128"}, |
| 217 | { "virtio-scsi-device", "virtqueue_size", "128"}, |
| 218 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
| 219 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
| 220 | { "virtio-scsi-device", "seg_max_adjust", "off"}, |
| 221 | { "vhost-blk-device", "seg_max_adjust", "off"}, |
| 222 | { "usb-host", "suppress-remote-wake", "off" }, |
| 223 | { "usb-redir", "suppress-remote-wake", "off" }, |
| 224 | { "qxl", "revision", "4" }, |
| 225 | { "qxl-vga", "revision", "4" }, |
| 226 | { "fw_cfg", "acpi-mr-restore", "false" }, |
| 227 | { "virtio-device", "use-disabled-flag", "false" }, |
| 228 | }; |
| 229 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); |
| 230 | |
| 231 | GlobalProperty hw_compat_4_1[] = { |
| 232 | { "virtio-pci", "x-pcie-flr-init", "off" }, |
| 233 | }; |
| 234 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
| 235 | |
| 236 | MachineState *current_machine; |
| 237 | |
| 238 | static char *machine_get_kernel(Object *obj, Error **errp) |
| 239 | { |
| 240 | MachineState *ms = MACHINE(obj); |
| 241 | |
| 242 | return g_strdup(ms->kernel_filename); |
| 243 | } |
| 244 | |
| 245 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) |
| 246 | { |
| 247 | MachineState *ms = MACHINE(obj); |
| 248 | |
| 249 | g_free(ms->kernel_filename); |
| 250 | ms->kernel_filename = g_strdup(value); |
| 251 | } |
| 252 | |
| 253 | static char *machine_get_shim(Object *obj, Error **errp) |
| 254 | { |
| 255 | MachineState *ms = MACHINE(obj); |
| 256 | |
| 257 | return g_strdup(ms->shim_filename); |
| 258 | } |
| 259 | |
| 260 | static void machine_set_shim(Object *obj, const char *value, Error **errp) |
| 261 | { |
| 262 | MachineState *ms = MACHINE(obj); |
| 263 | |
| 264 | g_free(ms->shim_filename); |
| 265 | ms->shim_filename = g_strdup(value); |
| 266 | } |
| 267 | |
| 268 | static char *machine_get_initrd(Object *obj, Error **errp) |
| 269 | { |
| 270 | MachineState *ms = MACHINE(obj); |
| 271 | |
| 272 | return g_strdup(ms->initrd_filename); |
| 273 | } |
| 274 | |
| 275 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) |
| 276 | { |
| 277 | MachineState *ms = MACHINE(obj); |
| 278 | |
| 279 | g_free(ms->initrd_filename); |
| 280 | ms->initrd_filename = g_strdup(value); |
| 281 | } |
| 282 | |
| 283 | static char *machine_get_append(Object *obj, Error **errp) |
| 284 | { |
| 285 | MachineState *ms = MACHINE(obj); |
| 286 | |
| 287 | return g_strdup(ms->kernel_cmdline); |
| 288 | } |
| 289 | |
| 290 | static void machine_set_append(Object *obj, const char *value, Error **errp) |
| 291 | { |
| 292 | MachineState *ms = MACHINE(obj); |
| 293 | |
| 294 | g_free(ms->kernel_cmdline); |
| 295 | ms->kernel_cmdline = g_strdup(value); |
| 296 | } |
| 297 | |
| 298 | static char *machine_get_dtb(Object *obj, Error **errp) |
| 299 | { |
| 300 | MachineState *ms = MACHINE(obj); |
| 301 | |
| 302 | return g_strdup(ms->dtb); |
| 303 | } |
| 304 | |
| 305 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) |
| 306 | { |
| 307 | MachineState *ms = MACHINE(obj); |
| 308 | |
| 309 | g_free(ms->dtb); |
| 310 | ms->dtb = g_strdup(value); |
| 311 | } |
| 312 | |
| 313 | static char *machine_get_dumpdtb(Object *obj, Error **errp) |
| 314 | { |
| 315 | MachineState *ms = MACHINE(obj); |
| 316 | |
| 317 | return g_strdup(ms->dumpdtb); |
| 318 | } |
| 319 | |
| 320 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) |
| 321 | { |
| 322 | MachineState *ms = MACHINE(obj); |
| 323 | |
| 324 | g_free(ms->dumpdtb); |
| 325 | ms->dumpdtb = g_strdup(value); |
| 326 | } |
| 327 | |
| 328 | static void machine_get_phandle_start(Object *obj, Visitor *v, |
| 329 | const char *name, void *opaque, |
| 330 | Error **errp) |
| 331 | { |
| 332 | MachineState *ms = MACHINE(obj); |
| 333 | int64_t value = ms->phandle_start; |
| 334 | |
| 335 | visit_type_int(v, name, &value, errp); |
| 336 | } |
| 337 | |
| 338 | static void machine_set_phandle_start(Object *obj, Visitor *v, |
| 339 | const char *name, void *opaque, |
| 340 | Error **errp) |
| 341 | { |
| 342 | MachineState *ms = MACHINE(obj); |
| 343 | int64_t value; |
| 344 | |
| 345 | if (!visit_type_int(v, name, &value, errp)) { |
| 346 | return; |
| 347 | } |
| 348 | |
| 349 | ms->phandle_start = value; |
| 350 | } |
| 351 | |
| 352 | static char *machine_get_dt_compatible(Object *obj, Error **errp) |
| 353 | { |
| 354 | MachineState *ms = MACHINE(obj); |
| 355 | |
| 356 | return g_strdup(ms->dt_compatible); |
| 357 | } |
| 358 | |
| 359 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) |
| 360 | { |
| 361 | MachineState *ms = MACHINE(obj); |
| 362 | |
| 363 | g_free(ms->dt_compatible); |
| 364 | ms->dt_compatible = g_strdup(value); |
| 365 | } |
| 366 | |
| 367 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) |
| 368 | { |
| 369 | MachineState *ms = MACHINE(obj); |
| 370 | |
| 371 | return ms->dump_guest_core; |
| 372 | } |
| 373 | |
| 374 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) |
| 375 | { |
| 376 | MachineState *ms = MACHINE(obj); |
| 377 | |
| 378 | if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) { |
| 379 | error_setg(errp, "Dumping guest memory cannot be disabled on this host"); |
| 380 | return; |
| 381 | } |
| 382 | ms->dump_guest_core = value; |
| 383 | } |
| 384 | |
| 385 | static bool machine_get_new_accel_vmfd_on_reset(Object *obj, Error **errp) |
| 386 | { |
| 387 | MachineState *ms = MACHINE(obj); |
| 388 | |
| 389 | return ms->new_accel_vmfd_on_reset; |
| 390 | } |
| 391 | |
| 392 | static void machine_set_new_accel_vmfd_on_reset(Object *obj, |
| 393 | bool value, Error **errp) |
| 394 | { |
| 395 | MachineState *ms = MACHINE(obj); |
| 396 | |
| 397 | ms->new_accel_vmfd_on_reset = value; |
| 398 | } |
| 399 | |
| 400 | static bool machine_get_mem_merge(Object *obj, Error **errp) |
| 401 | { |
| 402 | MachineState *ms = MACHINE(obj); |
| 403 | |
| 404 | return ms->mem_merge; |
| 405 | } |
| 406 | |
| 407 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) |
| 408 | { |
| 409 | MachineState *ms = MACHINE(obj); |
| 410 | |
| 411 | if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) { |
| 412 | error_setg(errp, "Memory merging is not supported on this host"); |
| 413 | return; |
| 414 | } |
| 415 | ms->mem_merge = value; |
| 416 | } |
| 417 | |
| 418 | #ifdef CONFIG_POSIX |
| 419 | static bool machine_get_aux_ram_share(Object *obj, Error **errp) |
| 420 | { |
| 421 | MachineState *ms = MACHINE(obj); |
| 422 | |
| 423 | return ms->aux_ram_share; |
| 424 | } |
| 425 | |
| 426 | static void machine_set_aux_ram_share(Object *obj, bool value, Error **errp) |
| 427 | { |
| 428 | MachineState *ms = MACHINE(obj); |
| 429 | |
| 430 | ms->aux_ram_share = value; |
| 431 | } |
| 432 | #endif |
| 433 | |
| 434 | static bool machine_get_usb(Object *obj, Error **errp) |
| 435 | { |
| 436 | MachineState *ms = MACHINE(obj); |
| 437 | |
| 438 | return ms->usb; |
| 439 | } |
| 440 | |
| 441 | static void machine_set_usb(Object *obj, bool value, Error **errp) |
| 442 | { |
| 443 | MachineState *ms = MACHINE(obj); |
| 444 | |
| 445 | ms->usb = value; |
| 446 | ms->usb_disabled = !value; |
| 447 | } |
| 448 | |
| 449 | static bool machine_get_graphics(Object *obj, Error **errp) |
| 450 | { |
| 451 | MachineState *ms = MACHINE(obj); |
| 452 | |
| 453 | return ms->enable_graphics; |
| 454 | } |
| 455 | |
| 456 | static void machine_set_graphics(Object *obj, bool value, Error **errp) |
| 457 | { |
| 458 | MachineState *ms = MACHINE(obj); |
| 459 | |
| 460 | ms->enable_graphics = value; |
| 461 | } |
| 462 | |
| 463 | static char *machine_get_firmware(Object *obj, Error **errp) |
| 464 | { |
| 465 | MachineState *ms = MACHINE(obj); |
| 466 | |
| 467 | return g_strdup(ms->firmware); |
| 468 | } |
| 469 | |
| 470 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) |
| 471 | { |
| 472 | MachineState *ms = MACHINE(obj); |
| 473 | |
| 474 | g_free(ms->firmware); |
| 475 | ms->firmware = g_strdup(value); |
| 476 | } |
| 477 | |
| 478 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
| 479 | { |
| 480 | MachineState *ms = MACHINE(obj); |
| 481 | |
| 482 | ms->suppress_vmdesc = value; |
| 483 | } |
| 484 | |
| 485 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) |
| 486 | { |
| 487 | MachineState *ms = MACHINE(obj); |
| 488 | |
| 489 | return ms->suppress_vmdesc; |
| 490 | } |
| 491 | |
| 492 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
| 493 | { |
| 494 | MachineState *ms = MACHINE(obj); |
| 495 | |
| 496 | if (ms->cgs) { |
| 497 | return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); |
| 498 | } |
| 499 | |
| 500 | return NULL; |
| 501 | } |
| 502 | |
| 503 | static void machine_set_memory_encryption(Object *obj, const char *value, |
| 504 | Error **errp) |
| 505 | { |
| 506 | Object *cgs = |
| 507 | object_resolve_path_component(object_get_objects_root(), value); |
| 508 | |
| 509 | warn_report("memory-encryption is deprecated, use confidential-guest-support instead"); |
| 510 | |
| 511 | if (!cgs) { |
| 512 | error_setg(errp, "No such memory encryption object '%s'", value); |
| 513 | return; |
| 514 | } |
| 515 | |
| 516 | object_property_set_link(obj, "confidential-guest-support", cgs, errp); |
| 517 | } |
| 518 | |
| 519 | static void machine_check_confidential_guest_support(const Object *obj, |
| 520 | const char *name, |
| 521 | Object *new_target, |
| 522 | Error **errp) |
| 523 | { |
| 524 | /* |
| 525 | * So far the only constraint is that the target has the |
| 526 | * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked |
| 527 | * by the QOM core |
| 528 | */ |
| 529 | } |
| 530 | |
| 531 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
| 532 | { |
| 533 | MachineState *ms = MACHINE(obj); |
| 534 | |
| 535 | return ms->nvdimms_state->is_enabled; |
| 536 | } |
| 537 | |
| 538 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) |
| 539 | { |
| 540 | MachineState *ms = MACHINE(obj); |
| 541 | |
| 542 | ms->nvdimms_state->is_enabled = value; |
| 543 | } |
| 544 | |
| 545 | static bool machine_get_spcr(Object *obj, Error **errp) |
| 546 | { |
| 547 | MachineState *ms = MACHINE(obj); |
| 548 | |
| 549 | return ms->acpi_spcr_enabled; |
| 550 | } |
| 551 | |
| 552 | static void machine_set_spcr(Object *obj, bool value, Error **errp) |
| 553 | { |
| 554 | MachineState *ms = MACHINE(obj); |
| 555 | |
| 556 | ms->acpi_spcr_enabled = value; |
| 557 | } |
| 558 | |
| 559 | static bool machine_get_hmat(Object *obj, Error **errp) |
| 560 | { |
| 561 | MachineState *ms = MACHINE(obj); |
| 562 | |
| 563 | return ms->numa_state->hmat_enabled; |
| 564 | } |
| 565 | |
| 566 | static void machine_set_hmat(Object *obj, bool value, Error **errp) |
| 567 | { |
| 568 | MachineState *ms = MACHINE(obj); |
| 569 | |
| 570 | ms->numa_state->hmat_enabled = value; |
| 571 | } |
| 572 | |
| 573 | static void machine_get_mem(Object *obj, Visitor *v, const char *name, |
| 574 | void *opaque, Error **errp) |
| 575 | { |
| 576 | MachineState *ms = MACHINE(obj); |
| 577 | MemorySizeConfiguration mem = { |
| 578 | .has_size = true, |
| 579 | .size = ms->ram_size, |
| 580 | .has_max_size = !!ms->ram_slots, |
| 581 | .max_size = ms->maxram_size, |
| 582 | .has_slots = !!ms->ram_slots, |
| 583 | .slots = ms->ram_slots, |
| 584 | }; |
| 585 | MemorySizeConfiguration *p_mem = &mem; |
| 586 | |
| 587 | visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); |
| 588 | } |
| 589 | |
| 590 | static void machine_set_mem(Object *obj, Visitor *v, const char *name, |
| 591 | void *opaque, Error **errp) |
| 592 | { |
| 593 | ERRP_GUARD(); |
| 594 | MachineState *ms = MACHINE(obj); |
| 595 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
| 596 | MemorySizeConfiguration *mem; |
| 597 | |
| 598 | if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { |
| 599 | return; |
| 600 | } |
| 601 | |
| 602 | if (!mem->has_size) { |
| 603 | mem->has_size = true; |
| 604 | mem->size = mc->default_ram_size; |
| 605 | } |
| 606 | mem->size = QEMU_ALIGN_UP(mem->size, 8192); |
| 607 | if ((ram_addr_t)mem->size != mem->size) { |
| 608 | error_setg(errp, "ram size %llu exceeds permitted maximum %llu", |
| 609 | (unsigned long long)mem->size, |
| 610 | (unsigned long long)RAM_ADDR_MAX); |
| 611 | goto out_free; |
| 612 | } |
| 613 | |
| 614 | if (mem->has_max_size) { |
| 615 | if ((ram_addr_t)mem->max_size != mem->max_size) { |
| 616 | error_setg(errp, "ram size %llu exceeds permitted maximum %llu", |
| 617 | (unsigned long long)mem->max_size, |
| 618 | (unsigned long long)RAM_ADDR_MAX); |
| 619 | goto out_free; |
| 620 | } |
| 621 | if (mem->max_size < mem->size) { |
| 622 | error_setg(errp, "invalid value of maxmem: " |
| 623 | "maximum memory size (0x%" PRIx64 ") must be at least " |
| 624 | "the initial memory size (0x%" PRIx64 ")", |
| 625 | mem->max_size, mem->size); |
| 626 | goto out_free; |
| 627 | } |
| 628 | if (mem->has_slots && mem->slots && mem->max_size == mem->size) { |
| 629 | error_setg(errp, "invalid value of maxmem: " |
| 630 | "memory slots were specified but maximum memory size " |
| 631 | "(0x%" PRIx64 ") is equal to the initial memory size " |
| 632 | "(0x%" PRIx64 ")", mem->max_size, mem->size); |
| 633 | goto out_free; |
| 634 | } |
| 635 | ms->maxram_size = mem->max_size; |
| 636 | } else { |
| 637 | if (mem->has_slots) { |
| 638 | error_setg(errp, "slots specified but no max-size"); |
| 639 | goto out_free; |
| 640 | } |
| 641 | ms->maxram_size = mem->size; |
| 642 | } |
| 643 | ms->ram_size = mem->size; |
| 644 | ms->ram_slots = mem->has_slots ? mem->slots : 0; |
| 645 | out_free: |
| 646 | qapi_free_MemorySizeConfiguration(mem); |
| 647 | } |
| 648 | |
| 649 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
| 650 | { |
| 651 | MachineState *ms = MACHINE(obj); |
| 652 | |
| 653 | return g_strdup(ms->nvdimms_state->persistence_string); |
| 654 | } |
| 655 | |
| 656 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, |
| 657 | Error **errp) |
| 658 | { |
| 659 | MachineState *ms = MACHINE(obj); |
| 660 | NVDIMMState *nvdimms_state = ms->nvdimms_state; |
| 661 | |
| 662 | if (strcmp(value, "cpu") == 0) { |
| 663 | nvdimms_state->persistence = 3; |
| 664 | } else if (strcmp(value, "mem-ctrl") == 0) { |
| 665 | nvdimms_state->persistence = 2; |
| 666 | } else { |
| 667 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", |
| 668 | value); |
| 669 | return; |
| 670 | } |
| 671 | |
| 672 | g_free(nvdimms_state->persistence_string); |
| 673 | nvdimms_state->persistence_string = g_strdup(value); |
| 674 | } |
| 675 | |
| 676 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
| 677 | { |
| 678 | QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); |
| 679 | } |
| 680 | |
| 681 | bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) |
| 682 | { |
| 683 | Object *obj = OBJECT(dev); |
| 684 | |
| 685 | if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { |
| 686 | return false; |
| 687 | } |
| 688 | |
| 689 | return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); |
| 690 | } |
| 691 | |
| 692 | bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) |
| 693 | { |
| 694 | bool allowed = false; |
| 695 | strList *wl; |
| 696 | ObjectClass *klass = object_class_by_name(type); |
| 697 | |
| 698 | for (wl = mc->allowed_dynamic_sysbus_devices; |
| 699 | !allowed && wl; |
| 700 | wl = wl->next) { |
| 701 | allowed |= !!object_class_dynamic_cast(klass, wl->value); |
| 702 | } |
| 703 | |
| 704 | return allowed; |
| 705 | } |
| 706 | |
| 707 | static char *machine_get_audiodev(Object *obj, Error **errp) |
| 708 | { |
| 709 | MachineState *ms = MACHINE(obj); |
| 710 | |
| 711 | return g_strdup(ms->audiodev); |
| 712 | } |
| 713 | |
| 714 | static void machine_set_audiodev(Object *obj, const char *value, |
| 715 | Error **errp) |
| 716 | { |
| 717 | MachineState *ms = MACHINE(obj); |
| 718 | |
| 719 | if (!audio_be_by_name(value, errp)) { |
| 720 | return; |
| 721 | } |
| 722 | |
| 723 | g_free(ms->audiodev); |
| 724 | ms->audiodev = g_strdup(value); |
| 725 | } |
| 726 | |
| 727 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
| 728 | { |
| 729 | int i; |
| 730 | HotpluggableCPUList *head = NULL; |
| 731 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 732 | |
| 733 | /* force board to initialize possible_cpus if it hasn't been done yet */ |
| 734 | mc->possible_cpu_arch_ids(machine); |
| 735 | |
| 736 | for (i = 0; i < machine->possible_cpus->len; i++) { |
| 737 | CPUState *cpu; |
| 738 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); |
| 739 | |
| 740 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
| 741 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
| 742 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, |
| 743 | sizeof(*cpu_item->props)); |
| 744 | |
| 745 | cpu = machine->possible_cpus->cpus[i].cpu; |
| 746 | if (cpu) { |
| 747 | cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); |
| 748 | } |
| 749 | QAPI_LIST_PREPEND(head, cpu_item); |
| 750 | } |
| 751 | return head; |
| 752 | } |
| 753 | |
| 754 | /** |
| 755 | * machine_set_cpu_numa_node: |
| 756 | * @machine: machine object to modify |
| 757 | * @props: specifies which cpu objects to assign to |
| 758 | * numa node specified by @props.node_id |
| 759 | * @errp: if an error occurs, a pointer to an area to store the error |
| 760 | * |
| 761 | * Associate NUMA node specified by @props.node_id with cpu slots that |
| 762 | * match socket/core/thread-ids specified by @props. It's recommended to use |
| 763 | * query-hotpluggable-cpus.props values to specify affected cpu slots, |
| 764 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. |
| 765 | * |
| 766 | * However for CLI convenience it's possible to pass in subset of properties, |
| 767 | * which would affect all cpu slots that match it. |
| 768 | * Ex for pc machine: |
| 769 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ |
| 770 | * -numa cpu,node-id=0,socket_id=0 \ |
| 771 | * -numa cpu,node-id=1,socket_id=1 |
| 772 | * will assign all child cores of socket 0 to node 0 and |
| 773 | * of socket 1 to node 1. |
| 774 | * |
| 775 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, |
| 776 | * return error. |
| 777 | * Empty subset is disallowed and function will return with error in this case. |
| 778 | */ |
| 779 | void machine_set_cpu_numa_node(MachineState *machine, |
| 780 | const CpuInstanceProperties *props, Error **errp) |
| 781 | { |
| 782 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 783 | NodeInfo *numa_info = machine->numa_state->nodes; |
| 784 | bool match = false; |
| 785 | int i; |
| 786 | |
| 787 | if (!mc->possible_cpu_arch_ids) { |
| 788 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); |
| 789 | return; |
| 790 | } |
| 791 | |
| 792 | /* disabling node mapping is not supported, forbid it */ |
| 793 | assert(props->has_node_id); |
| 794 | |
| 795 | /* force board to initialize possible_cpus if it hasn't been done yet */ |
| 796 | mc->possible_cpu_arch_ids(machine); |
| 797 | |
| 798 | for (i = 0; i < machine->possible_cpus->len; i++) { |
| 799 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; |
| 800 | |
| 801 | /* reject unsupported by board properties */ |
| 802 | if (props->has_thread_id && !slot->props.has_thread_id) { |
| 803 | error_setg(errp, "thread-id is not supported"); |
| 804 | return; |
| 805 | } |
| 806 | |
| 807 | if (props->has_core_id && !slot->props.has_core_id) { |
| 808 | error_setg(errp, "core-id is not supported"); |
| 809 | return; |
| 810 | } |
| 811 | |
| 812 | if (props->has_module_id && !slot->props.has_module_id) { |
| 813 | error_setg(errp, "module-id is not supported"); |
| 814 | return; |
| 815 | } |
| 816 | |
| 817 | if (props->has_cluster_id && !slot->props.has_cluster_id) { |
| 818 | error_setg(errp, "cluster-id is not supported"); |
| 819 | return; |
| 820 | } |
| 821 | |
| 822 | if (props->has_socket_id && !slot->props.has_socket_id) { |
| 823 | error_setg(errp, "socket-id is not supported"); |
| 824 | return; |
| 825 | } |
| 826 | |
| 827 | if (props->has_die_id && !slot->props.has_die_id) { |
| 828 | error_setg(errp, "die-id is not supported"); |
| 829 | return; |
| 830 | } |
| 831 | |
| 832 | /* skip slots with explicit mismatch */ |
| 833 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { |
| 834 | continue; |
| 835 | } |
| 836 | |
| 837 | if (props->has_core_id && props->core_id != slot->props.core_id) { |
| 838 | continue; |
| 839 | } |
| 840 | |
| 841 | if (props->has_module_id && |
| 842 | props->module_id != slot->props.module_id) { |
| 843 | continue; |
| 844 | } |
| 845 | |
| 846 | if (props->has_cluster_id && |
| 847 | props->cluster_id != slot->props.cluster_id) { |
| 848 | continue; |
| 849 | } |
| 850 | |
| 851 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
| 852 | continue; |
| 853 | } |
| 854 | |
| 855 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
| 856 | continue; |
| 857 | } |
| 858 | |
| 859 | /* reject assignment if slot is already assigned, for compatibility |
| 860 | * of legacy cpu_index mapping with SPAPR core based mapping do not |
| 861 | * error out if cpu thread and matched core have the same node-id */ |
| 862 | if (slot->props.has_node_id && |
| 863 | slot->props.node_id != props->node_id) { |
| 864 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, |
| 865 | slot->props.node_id); |
| 866 | return; |
| 867 | } |
| 868 | |
| 869 | /* assign slot to node as it's matched '-numa cpu' key */ |
| 870 | match = true; |
| 871 | slot->props.node_id = props->node_id; |
| 872 | slot->props.has_node_id = props->has_node_id; |
| 873 | |
| 874 | if (machine->numa_state->hmat_enabled) { |
| 875 | if ((numa_info[props->node_id].initiator < MAX_NODES) && |
| 876 | (props->node_id != numa_info[props->node_id].initiator)) { |
| 877 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 |
| 878 | " should be itself (got %" PRIu16 ")", |
| 879 | props->node_id, numa_info[props->node_id].initiator); |
| 880 | return; |
| 881 | } |
| 882 | numa_info[props->node_id].has_cpu = true; |
| 883 | numa_info[props->node_id].initiator = props->node_id; |
| 884 | } |
| 885 | } |
| 886 | |
| 887 | if (!match) { |
| 888 | error_setg(errp, "no match found"); |
| 889 | } |
| 890 | } |
| 891 | |
| 892 | static void machine_get_smp(Object *obj, Visitor *v, const char *name, |
| 893 | void *opaque, Error **errp) |
| 894 | { |
| 895 | MachineState *ms = MACHINE(obj); |
| 896 | SMPConfiguration *config = &(SMPConfiguration){ |
| 897 | .has_cpus = true, .cpus = ms->smp.cpus, |
| 898 | .has_drawers = true, .drawers = ms->smp.drawers, |
| 899 | .has_books = true, .books = ms->smp.books, |
| 900 | .has_sockets = true, .sockets = ms->smp.sockets, |
| 901 | .has_dies = true, .dies = ms->smp.dies, |
| 902 | .has_clusters = true, .clusters = ms->smp.clusters, |
| 903 | .has_modules = true, .modules = ms->smp.modules, |
| 904 | .has_cores = true, .cores = ms->smp.cores, |
| 905 | .has_threads = true, .threads = ms->smp.threads, |
| 906 | .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, |
| 907 | }; |
| 908 | |
| 909 | if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { |
| 910 | return; |
| 911 | } |
| 912 | } |
| 913 | |
| 914 | static void machine_set_smp(Object *obj, Visitor *v, const char *name, |
| 915 | void *opaque, Error **errp) |
| 916 | { |
| 917 | MachineState *ms = MACHINE(obj); |
| 918 | g_autoptr(SMPConfiguration) config = NULL; |
| 919 | |
| 920 | if (!visit_type_SMPConfiguration(v, name, &config, errp)) { |
| 921 | return; |
| 922 | } |
| 923 | |
| 924 | machine_parse_smp_config(ms, config, errp); |
| 925 | } |
| 926 | |
| 927 | static void machine_get_smp_cache(Object *obj, Visitor *v, const char *name, |
| 928 | void *opaque, Error **errp) |
| 929 | { |
| 930 | MachineState *ms = MACHINE(obj); |
| 931 | SmpCache *cache = &ms->smp_cache; |
| 932 | SmpCachePropertiesList *head = NULL; |
| 933 | SmpCachePropertiesList **tail = &head; |
| 934 | |
| 935 | for (int i = 0; i < CACHE_LEVEL_AND_TYPE__MAX; i++) { |
| 936 | SmpCacheProperties *node = g_new(SmpCacheProperties, 1); |
| 937 | |
| 938 | node->cache = cache->props[i].cache; |
| 939 | node->topology = cache->props[i].topology; |
| 940 | QAPI_LIST_APPEND(tail, node); |
| 941 | } |
| 942 | |
| 943 | visit_type_SmpCachePropertiesList(v, name, &head, errp); |
| 944 | qapi_free_SmpCachePropertiesList(head); |
| 945 | } |
| 946 | |
| 947 | static void machine_set_smp_cache(Object *obj, Visitor *v, const char *name, |
| 948 | void *opaque, Error **errp) |
| 949 | { |
| 950 | MachineState *ms = MACHINE(obj); |
| 951 | SmpCachePropertiesList *caches; |
| 952 | |
| 953 | if (!visit_type_SmpCachePropertiesList(v, name, &caches, errp)) { |
| 954 | return; |
| 955 | } |
| 956 | |
| 957 | machine_parse_smp_cache(ms, caches, errp); |
| 958 | qapi_free_SmpCachePropertiesList(caches); |
| 959 | } |
| 960 | |
| 961 | static void machine_get_boot(Object *obj, Visitor *v, const char *name, |
| 962 | void *opaque, Error **errp) |
| 963 | { |
| 964 | MachineState *ms = MACHINE(obj); |
| 965 | BootConfiguration *config = &ms->boot_config; |
| 966 | visit_type_BootConfiguration(v, name, &config, &error_abort); |
| 967 | } |
| 968 | |
| 969 | static void machine_free_boot_config(MachineState *ms) |
| 970 | { |
| 971 | g_free(ms->boot_config.order); |
| 972 | g_free(ms->boot_config.once); |
| 973 | g_free(ms->boot_config.splash); |
| 974 | } |
| 975 | |
| 976 | static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) |
| 977 | { |
| 978 | MachineClass *machine_class = MACHINE_GET_CLASS(ms); |
| 979 | |
| 980 | machine_free_boot_config(ms); |
| 981 | ms->boot_config = *config; |
| 982 | if (!config->order) { |
| 983 | ms->boot_config.order = g_strdup(machine_class->default_boot_order); |
| 984 | } |
| 985 | } |
| 986 | |
| 987 | static void machine_set_boot(Object *obj, Visitor *v, const char *name, |
| 988 | void *opaque, Error **errp) |
| 989 | { |
| 990 | ERRP_GUARD(); |
| 991 | MachineState *ms = MACHINE(obj); |
| 992 | BootConfiguration *config = NULL; |
| 993 | |
| 994 | if (!visit_type_BootConfiguration(v, name, &config, errp)) { |
| 995 | return; |
| 996 | } |
| 997 | if (config->order) { |
| 998 | validate_bootdevices(config->order, errp); |
| 999 | if (*errp) { |
| 1000 | goto out_free; |
| 1001 | } |
| 1002 | } |
| 1003 | if (config->once) { |
| 1004 | validate_bootdevices(config->once, errp); |
| 1005 | if (*errp) { |
| 1006 | goto out_free; |
| 1007 | } |
| 1008 | } |
| 1009 | |
| 1010 | machine_copy_boot_config(ms, config); |
| 1011 | /* Strings live in ms->boot_config. */ |
| 1012 | free(config); |
| 1013 | return; |
| 1014 | |
| 1015 | out_free: |
| 1016 | qapi_free_BootConfiguration(config); |
| 1017 | } |
| 1018 | |
| 1019 | void machine_add_audiodev_property(MachineClass *mc) |
| 1020 | { |
| 1021 | ObjectClass *oc = OBJECT_CLASS(mc); |
| 1022 | |
| 1023 | object_class_property_add_str(oc, "audiodev", |
| 1024 | machine_get_audiodev, |
| 1025 | machine_set_audiodev); |
| 1026 | object_class_property_set_description(oc, "audiodev", |
| 1027 | "Audiodev to use for default machine devices"); |
| 1028 | } |
| 1029 | |
| 1030 | static bool create_default_memdev(MachineState *ms, const char *path, |
| 1031 | Error **errp) |
| 1032 | { |
| 1033 | Object *obj; |
| 1034 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 1035 | bool r = false; |
| 1036 | |
| 1037 | obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); |
| 1038 | if (path) { |
| 1039 | if (!object_property_set_str(obj, "mem-path", path, errp)) { |
| 1040 | goto out; |
| 1041 | } |
| 1042 | } |
| 1043 | if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { |
| 1044 | goto out; |
| 1045 | } |
| 1046 | object_property_add_child(object_get_objects_root(), mc->default_ram_id, |
| 1047 | obj); |
| 1048 | /* Ensure backend's memory region name is equal to mc->default_ram_id */ |
| 1049 | if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", |
| 1050 | false, errp)) { |
| 1051 | goto out; |
| 1052 | } |
| 1053 | if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { |
| 1054 | goto out; |
| 1055 | } |
| 1056 | r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); |
| 1057 | |
| 1058 | out: |
| 1059 | object_unref(obj); |
| 1060 | return r; |
| 1061 | } |
| 1062 | |
| 1063 | static void machine_class_init(ObjectClass *oc, const void *data) |
| 1064 | { |
| 1065 | MachineClass *mc = MACHINE_CLASS(oc); |
| 1066 | |
| 1067 | /* Default 128 MB as guest ram size */ |
| 1068 | mc->default_ram_size = 128 * MiB; |
| 1069 | mc->rom_file_has_mr = true; |
| 1070 | /* |
| 1071 | * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size |
| 1072 | * use max possible value that could be encoded into |
| 1073 | * 'Extended Size' field (2047Tb). |
| 1074 | * |
| 1075 | * Unfortunately (current) Windows Server 2025 and earlier do not handle |
| 1076 | * 4Tb+ DIMM size. |
| 1077 | */ |
| 1078 | mc->smbios_memory_device_size = 2 * TiB; |
| 1079 | |
| 1080 | /* numa node memory size aligned on 8MB by default. |
| 1081 | * On Linux, each node's border has to be 8MB aligned |
| 1082 | */ |
| 1083 | mc->numa_mem_align_shift = 23; |
| 1084 | |
| 1085 | mc->create_default_memdev = create_default_memdev; |
| 1086 | |
| 1087 | object_class_property_add_str(oc, "kernel", |
| 1088 | machine_get_kernel, machine_set_kernel); |
| 1089 | object_class_property_set_description(oc, "kernel", |
| 1090 | "Linux kernel image file"); |
| 1091 | |
| 1092 | object_class_property_add_str(oc, "shim", |
| 1093 | machine_get_shim, machine_set_shim); |
| 1094 | object_class_property_set_description(oc, "shim", |
| 1095 | "shim.efi file"); |
| 1096 | |
| 1097 | object_class_property_add_str(oc, "initrd", |
| 1098 | machine_get_initrd, machine_set_initrd); |
| 1099 | object_class_property_set_description(oc, "initrd", |
| 1100 | "Linux initial ramdisk file"); |
| 1101 | |
| 1102 | object_class_property_add_str(oc, "append", |
| 1103 | machine_get_append, machine_set_append); |
| 1104 | object_class_property_set_description(oc, "append", |
| 1105 | "Linux kernel command line"); |
| 1106 | |
| 1107 | object_class_property_add_str(oc, "dtb", |
| 1108 | machine_get_dtb, machine_set_dtb); |
| 1109 | object_class_property_set_description(oc, "dtb", |
| 1110 | "Linux kernel device tree file"); |
| 1111 | |
| 1112 | object_class_property_add_str(oc, "dumpdtb", |
| 1113 | machine_get_dumpdtb, machine_set_dumpdtb); |
| 1114 | object_class_property_set_description(oc, "dumpdtb", |
| 1115 | "Dump current dtb to a file and quit"); |
| 1116 | |
| 1117 | object_class_property_add(oc, "boot", "BootConfiguration", |
| 1118 | machine_get_boot, machine_set_boot, |
| 1119 | NULL, NULL); |
| 1120 | object_class_property_set_description(oc, "boot", |
| 1121 | "Boot configuration"); |
| 1122 | |
| 1123 | object_class_property_add(oc, "smp", "SMPConfiguration", |
| 1124 | machine_get_smp, machine_set_smp, |
| 1125 | NULL, NULL); |
| 1126 | object_class_property_set_description(oc, "smp", |
| 1127 | "CPU topology"); |
| 1128 | |
| 1129 | object_class_property_add(oc, "smp-cache", "SmpCachePropertiesWrapper", |
| 1130 | machine_get_smp_cache, machine_set_smp_cache, NULL, NULL); |
| 1131 | object_class_property_set_description(oc, "smp-cache", |
| 1132 | "Cache properties list for SMP machine"); |
| 1133 | |
| 1134 | object_class_property_add(oc, "phandle-start", "int", |
| 1135 | machine_get_phandle_start, machine_set_phandle_start, |
| 1136 | NULL, NULL); |
| 1137 | object_class_property_set_description(oc, "phandle-start", |
| 1138 | "The first phandle ID we may generate dynamically"); |
| 1139 | |
| 1140 | object_class_property_add_str(oc, "dt-compatible", |
| 1141 | machine_get_dt_compatible, machine_set_dt_compatible); |
| 1142 | object_class_property_set_description(oc, "dt-compatible", |
| 1143 | "Overrides the \"compatible\" property of the dt root node"); |
| 1144 | |
| 1145 | object_class_property_add_bool(oc, "dump-guest-core", |
| 1146 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
| 1147 | object_class_property_set_description(oc, "dump-guest-core", |
| 1148 | "Include guest memory in a core dump"); |
| 1149 | |
| 1150 | object_class_property_add_bool(oc, "x-change-vmfd-on-reset", |
| 1151 | machine_get_new_accel_vmfd_on_reset, |
| 1152 | machine_set_new_accel_vmfd_on_reset); |
| 1153 | object_class_property_set_description(oc, "x-change-vmfd-on-reset", |
| 1154 | "Set on/off to enable/disable generating new accelerator guest handle " |
| 1155 | "on guest reset. Default: off (used only for testing/debugging)."); |
| 1156 | |
| 1157 | object_class_property_add_bool(oc, "mem-merge", |
| 1158 | machine_get_mem_merge, machine_set_mem_merge); |
| 1159 | object_class_property_set_description(oc, "mem-merge", |
| 1160 | "Enable/disable memory merge support"); |
| 1161 | |
| 1162 | #ifdef CONFIG_POSIX |
| 1163 | object_class_property_add_bool(oc, "aux-ram-share", |
| 1164 | machine_get_aux_ram_share, |
| 1165 | machine_set_aux_ram_share); |
| 1166 | object_class_property_set_description(oc, "aux-ram-share", |
| 1167 | "Use anonymous shared memory for auxiliary guest RAMs"); |
| 1168 | #endif |
| 1169 | |
| 1170 | object_class_property_add_bool(oc, "usb", |
| 1171 | machine_get_usb, machine_set_usb); |
| 1172 | object_class_property_set_description(oc, "usb", |
| 1173 | "Set on/off to enable/disable usb"); |
| 1174 | |
| 1175 | object_class_property_add_bool(oc, "graphics", |
| 1176 | machine_get_graphics, machine_set_graphics); |
| 1177 | object_class_property_set_description(oc, "graphics", |
| 1178 | "Set on/off to enable/disable graphics emulation"); |
| 1179 | |
| 1180 | object_class_property_add_str(oc, "firmware", |
| 1181 | machine_get_firmware, machine_set_firmware); |
| 1182 | object_class_property_set_description(oc, "firmware", |
| 1183 | "Firmware image"); |
| 1184 | |
| 1185 | object_class_property_add_bool(oc, "suppress-vmdesc", |
| 1186 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
| 1187 | object_class_property_set_description(oc, "suppress-vmdesc", |
| 1188 | "Set on to disable self-describing migration"); |
| 1189 | |
| 1190 | object_class_property_add_link(oc, "confidential-guest-support", |
| 1191 | TYPE_CONFIDENTIAL_GUEST_SUPPORT, |
| 1192 | offsetof(MachineState, cgs), |
| 1193 | machine_check_confidential_guest_support, |
| 1194 | OBJ_PROP_LINK_STRONG); |
| 1195 | object_class_property_set_description(oc, "confidential-guest-support", |
| 1196 | "Set confidential guest scheme to support"); |
| 1197 | |
| 1198 | /* For compatibility */ |
| 1199 | object_class_property_add_str(oc, "memory-encryption", |
| 1200 | machine_get_memory_encryption, machine_set_memory_encryption); |
| 1201 | object_class_property_set_description(oc, "memory-encryption", |
| 1202 | "Set memory encryption object to use"); |
| 1203 | |
| 1204 | object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, |
| 1205 | offsetof(MachineState, memdev), object_property_allow_set_link, |
| 1206 | OBJ_PROP_LINK_STRONG); |
| 1207 | object_class_property_set_description(oc, "memory-backend", |
| 1208 | "Set RAM backend" |
| 1209 | "Valid value is ID of hostmem based backend"); |
| 1210 | |
| 1211 | object_class_property_add(oc, "memory", "MemorySizeConfiguration", |
| 1212 | machine_get_mem, machine_set_mem, |
| 1213 | NULL, NULL); |
| 1214 | object_class_property_set_description(oc, "memory", |
| 1215 | "Memory size configuration"); |
| 1216 | } |
| 1217 | |
| 1218 | static void machine_class_base_init(ObjectClass *oc, const void *data) |
| 1219 | { |
| 1220 | MachineClass *mc = MACHINE_CLASS(oc); |
| 1221 | mc->max_cpus = mc->max_cpus ?: 1; |
| 1222 | mc->min_cpus = mc->min_cpus ?: 1; |
| 1223 | mc->default_cpus = mc->default_cpus ?: 1; |
| 1224 | |
| 1225 | if (!object_class_is_abstract(oc)) { |
| 1226 | const char *cname = object_class_get_name(oc); |
| 1227 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); |
| 1228 | mc->name = g_strndup(cname, |
| 1229 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); |
| 1230 | mc->compat_props = g_ptr_array_new(); |
| 1231 | } |
| 1232 | } |
| 1233 | |
| 1234 | static void machine_initfn(Object *obj) |
| 1235 | { |
| 1236 | MachineState *ms = MACHINE(obj); |
| 1237 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
| 1238 | |
| 1239 | ms->dump_guest_core = true; |
| 1240 | ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID); |
| 1241 | ms->enable_graphics = true; |
| 1242 | ms->kernel_cmdline = g_strdup(""); |
| 1243 | ms->ram_size = mc->default_ram_size; |
| 1244 | ms->maxram_size = mc->default_ram_size; |
| 1245 | |
| 1246 | if (mc->nvdimm_supported) { |
| 1247 | ms->nvdimms_state = g_new0(NVDIMMState, 1); |
| 1248 | object_property_add_bool(obj, "nvdimm", |
| 1249 | machine_get_nvdimm, machine_set_nvdimm); |
| 1250 | object_property_set_description(obj, "nvdimm", |
| 1251 | "Set on/off to enable/disable " |
| 1252 | "NVDIMM instantiation"); |
| 1253 | |
| 1254 | object_property_add_str(obj, "nvdimm-persistence", |
| 1255 | machine_get_nvdimm_persistence, |
| 1256 | machine_set_nvdimm_persistence); |
| 1257 | object_property_set_description(obj, "nvdimm-persistence", |
| 1258 | "Set NVDIMM persistence" |
| 1259 | "Valid values are cpu, mem-ctrl"); |
| 1260 | } |
| 1261 | |
| 1262 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
| 1263 | ms->numa_state = g_new0(NumaState, 1); |
| 1264 | object_property_add_bool(obj, "hmat", |
| 1265 | machine_get_hmat, machine_set_hmat); |
| 1266 | object_property_set_description(obj, "hmat", |
| 1267 | "Set on/off to enable/disable " |
| 1268 | "ACPI Heterogeneous Memory Attribute " |
| 1269 | "Table (HMAT)"); |
| 1270 | } |
| 1271 | |
| 1272 | /* SPCR */ |
| 1273 | ms->acpi_spcr_enabled = true; |
| 1274 | object_property_add_bool(obj, "spcr", machine_get_spcr, machine_set_spcr); |
| 1275 | object_property_set_description(obj, "spcr", |
| 1276 | "Set on/off to enable/disable " |
| 1277 | "ACPI Serial Port Console Redirection " |
| 1278 | "Table (spcr)"); |
| 1279 | |
| 1280 | /* default to mc->default_cpus */ |
| 1281 | ms->smp.cpus = mc->default_cpus; |
| 1282 | ms->smp.max_cpus = mc->default_cpus; |
| 1283 | ms->smp.drawers = 1; |
| 1284 | ms->smp.books = 1; |
| 1285 | ms->smp.sockets = 1; |
| 1286 | ms->smp.dies = 1; |
| 1287 | ms->smp.clusters = 1; |
| 1288 | ms->smp.modules = 1; |
| 1289 | ms->smp.cores = 1; |
| 1290 | ms->smp.threads = 1; |
| 1291 | |
| 1292 | for (int i = 0; i < CACHE_LEVEL_AND_TYPE__MAX; i++) { |
| 1293 | ms->smp_cache.props[i].cache = (CacheLevelAndType)i; |
| 1294 | ms->smp_cache.props[i].topology = CPU_TOPOLOGY_LEVEL_DEFAULT; |
| 1295 | } |
| 1296 | |
| 1297 | machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); |
| 1298 | } |
| 1299 | |
| 1300 | static void machine_finalize(Object *obj) |
| 1301 | { |
| 1302 | MachineState *ms = MACHINE(obj); |
| 1303 | |
| 1304 | machine_free_boot_config(ms); |
| 1305 | g_free(ms->shim_filename); |
| 1306 | g_free(ms->kernel_filename); |
| 1307 | g_free(ms->initrd_filename); |
| 1308 | g_free(ms->kernel_cmdline); |
| 1309 | g_free(ms->dtb); |
| 1310 | g_free(ms->dumpdtb); |
| 1311 | g_free(ms->dt_compatible); |
| 1312 | g_free(ms->firmware); |
| 1313 | g_free(ms->device_memory); |
| 1314 | g_free(ms->nvdimms_state); |
| 1315 | g_free(ms->numa_state); |
| 1316 | g_free(ms->audiodev); |
| 1317 | g_free(ms->fdt); |
| 1318 | } |
| 1319 | |
| 1320 | bool machine_usb(MachineState *machine) |
| 1321 | { |
| 1322 | return machine->usb; |
| 1323 | } |
| 1324 | |
| 1325 | int machine_phandle_start(MachineState *machine) |
| 1326 | { |
| 1327 | return machine->phandle_start; |
| 1328 | } |
| 1329 | |
| 1330 | bool machine_dump_guest_core(MachineState *machine) |
| 1331 | { |
| 1332 | return machine->dump_guest_core; |
| 1333 | } |
| 1334 | |
| 1335 | bool machine_mem_merge(MachineState *machine) |
| 1336 | { |
| 1337 | return machine->mem_merge; |
| 1338 | } |
| 1339 | |
| 1340 | bool machine_require_guest_memfd(MachineState *machine) |
| 1341 | { |
| 1342 | return machine->cgs && machine->cgs->require_guest_memfd; |
| 1343 | } |
| 1344 | |
| 1345 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
| 1346 | { |
| 1347 | GString *s = g_string_new(NULL); |
| 1348 | if (cpu->props.has_socket_id) { |
| 1349 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); |
| 1350 | } |
| 1351 | if (cpu->props.has_die_id) { |
| 1352 | if (s->len) { |
| 1353 | g_string_append_printf(s, ", "); |
| 1354 | } |
| 1355 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); |
| 1356 | } |
| 1357 | if (cpu->props.has_cluster_id) { |
| 1358 | if (s->len) { |
| 1359 | g_string_append_printf(s, ", "); |
| 1360 | } |
| 1361 | g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); |
| 1362 | } |
| 1363 | if (cpu->props.has_module_id) { |
| 1364 | if (s->len) { |
| 1365 | g_string_append_printf(s, ", "); |
| 1366 | } |
| 1367 | g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); |
| 1368 | } |
| 1369 | if (cpu->props.has_core_id) { |
| 1370 | if (s->len) { |
| 1371 | g_string_append_printf(s, ", "); |
| 1372 | } |
| 1373 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); |
| 1374 | } |
| 1375 | if (cpu->props.has_thread_id) { |
| 1376 | if (s->len) { |
| 1377 | g_string_append_printf(s, ", "); |
| 1378 | } |
| 1379 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); |
| 1380 | } |
| 1381 | return g_string_free(s, false); |
| 1382 | } |
| 1383 | |
| 1384 | static void numa_validate_initiator(NumaState *numa_state) |
| 1385 | { |
| 1386 | int i; |
| 1387 | NodeInfo *numa_info = numa_state->nodes; |
| 1388 | |
| 1389 | for (i = 0; i < numa_state->num_nodes; i++) { |
| 1390 | if (numa_info[i].initiator == MAX_NODES) { |
| 1391 | continue; |
| 1392 | } |
| 1393 | |
| 1394 | if (!numa_info[numa_info[i].initiator].present) { |
| 1395 | error_report("NUMA node %" PRIu16 " is missing, use " |
| 1396 | "'-numa node' option to declare it first", |
| 1397 | numa_info[i].initiator); |
| 1398 | exit(1); |
| 1399 | } |
| 1400 | |
| 1401 | if (!numa_info[numa_info[i].initiator].has_cpu) { |
| 1402 | error_report("The initiator of NUMA node %d is invalid", i); |
| 1403 | exit(1); |
| 1404 | } |
| 1405 | } |
| 1406 | } |
| 1407 | |
| 1408 | static void machine_numa_finish_cpu_init(MachineState *machine) |
| 1409 | { |
| 1410 | int i; |
| 1411 | bool default_mapping; |
| 1412 | GString *s = g_string_new(NULL); |
| 1413 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 1414 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); |
| 1415 | |
| 1416 | assert(machine->numa_state->num_nodes); |
| 1417 | for (i = 0; i < possible_cpus->len; i++) { |
| 1418 | if (possible_cpus->cpus[i].props.has_node_id) { |
| 1419 | break; |
| 1420 | } |
| 1421 | } |
| 1422 | default_mapping = (i == possible_cpus->len); |
| 1423 | |
| 1424 | for (i = 0; i < possible_cpus->len; i++) { |
| 1425 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; |
| 1426 | |
| 1427 | if (!cpu_slot->props.has_node_id) { |
| 1428 | /* fetch default mapping from board and enable it */ |
| 1429 | CpuInstanceProperties props = cpu_slot->props; |
| 1430 | |
| 1431 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
| 1432 | if (!default_mapping) { |
| 1433 | /* record slots with not set mapping, |
| 1434 | * TODO: make it hard error in future */ |
| 1435 | char *cpu_str = cpu_slot_to_string(cpu_slot); |
| 1436 | g_string_append_printf(s, "%sCPU %d [%s]", |
| 1437 | s->len ? ", " : "", i, cpu_str); |
| 1438 | g_free(cpu_str); |
| 1439 | |
| 1440 | /* non mapped cpus used to fallback to node 0 */ |
| 1441 | props.node_id = 0; |
| 1442 | } |
| 1443 | |
| 1444 | props.has_node_id = true; |
| 1445 | machine_set_cpu_numa_node(machine, &props, &error_fatal); |
| 1446 | } |
| 1447 | } |
| 1448 | |
| 1449 | if (machine->numa_state->hmat_enabled) { |
| 1450 | numa_validate_initiator(machine->numa_state); |
| 1451 | } |
| 1452 | |
| 1453 | if (s->len && !qtest_enabled()) { |
| 1454 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
| 1455 | s->str); |
| 1456 | warn_report("All CPU(s) up to maxcpus should be described " |
| 1457 | "in NUMA config, ability to start up with partial NUMA " |
| 1458 | "mappings is obsoleted and will be removed in future"); |
| 1459 | } |
| 1460 | g_string_free(s, true); |
| 1461 | } |
| 1462 | |
| 1463 | static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) |
| 1464 | { |
| 1465 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 1466 | NumaState *state = ms->numa_state; |
| 1467 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); |
| 1468 | const CPUArchId *cpus = possible_cpus->cpus; |
| 1469 | int i, j; |
| 1470 | |
| 1471 | if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { |
| 1472 | return; |
| 1473 | } |
| 1474 | |
| 1475 | /* |
| 1476 | * The Linux scheduling domain can't be parsed when the multiple CPUs |
| 1477 | * in one cluster have been associated with different NUMA nodes. However, |
| 1478 | * it's fine to associate one NUMA node with CPUs in different clusters. |
| 1479 | */ |
| 1480 | for (i = 0; i < possible_cpus->len; i++) { |
| 1481 | for (j = i + 1; j < possible_cpus->len; j++) { |
| 1482 | if (cpus[i].props.has_socket_id && |
| 1483 | cpus[i].props.has_cluster_id && |
| 1484 | cpus[i].props.has_node_id && |
| 1485 | cpus[j].props.has_socket_id && |
| 1486 | cpus[j].props.has_cluster_id && |
| 1487 | cpus[j].props.has_node_id && |
| 1488 | cpus[i].props.socket_id == cpus[j].props.socket_id && |
| 1489 | cpus[i].props.cluster_id == cpus[j].props.cluster_id && |
| 1490 | cpus[i].props.node_id != cpus[j].props.node_id) { |
| 1491 | warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 |
| 1492 | " have been associated with node-%" PRId64 " and node-%" PRId64 |
| 1493 | " respectively. It can cause OSes like Linux to" |
| 1494 | " misbehave", i, j, cpus[i].props.socket_id, |
| 1495 | cpus[i].props.cluster_id, cpus[i].props.node_id, |
| 1496 | cpus[j].props.node_id); |
| 1497 | } |
| 1498 | } |
| 1499 | } |
| 1500 | } |
| 1501 | |
| 1502 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
| 1503 | HostMemoryBackend *backend) |
| 1504 | { |
| 1505 | MemoryRegion *ret = host_memory_backend_get_memory(backend); |
| 1506 | |
| 1507 | if (host_memory_backend_is_mapped(backend)) { |
| 1508 | error_report("memory backend %s can't be used multiple times.", |
| 1509 | object_get_canonical_path_component(OBJECT(backend))); |
| 1510 | exit(EXIT_FAILURE); |
| 1511 | } |
| 1512 | host_memory_backend_set_mapped(backend, true); |
| 1513 | vmstate_register_ram_global(ret); |
| 1514 | return ret; |
| 1515 | } |
| 1516 | |
| 1517 | const char *machine_class_default_cpu_type(MachineClass *mc) |
| 1518 | { |
| 1519 | if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { |
| 1520 | /* Only a single CPU type allowed: use it as default. */ |
| 1521 | return mc->valid_cpu_types[0]; |
| 1522 | } |
| 1523 | return mc->default_cpu_type; |
| 1524 | } |
| 1525 | |
| 1526 | const char *machine_default_cpu_type(const MachineState *ms) |
| 1527 | { |
| 1528 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 1529 | |
| 1530 | if (mc->get_default_cpu_type) { |
| 1531 | return mc->get_default_cpu_type(ms); |
| 1532 | } |
| 1533 | return machine_class_default_cpu_type(mc); |
| 1534 | } |
| 1535 | |
| 1536 | static bool is_cpu_type_supported(const MachineState *machine, Error **errp) |
| 1537 | { |
| 1538 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 1539 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
| 1540 | CPUClass *cc; |
| 1541 | int i; |
| 1542 | |
| 1543 | /* |
| 1544 | * Check if the user specified CPU type is supported when the valid |
| 1545 | * CPU types have been determined. Note that the user specified CPU |
| 1546 | * type is provided through '-cpu' option. |
| 1547 | */ |
| 1548 | if (mc->valid_cpu_types) { |
| 1549 | assert(mc->valid_cpu_types[0] != NULL); |
| 1550 | assert(!mc->get_valid_cpu_types); |
| 1551 | |
| 1552 | for (i = 0; mc->valid_cpu_types[i]; i++) { |
| 1553 | if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { |
| 1554 | break; |
| 1555 | } |
| 1556 | } |
| 1557 | |
| 1558 | /* The user specified CPU type isn't valid */ |
| 1559 | if (!mc->valid_cpu_types[i]) { |
| 1560 | g_autofree char *requested = cpu_model_from_type(machine->cpu_type); |
| 1561 | error_setg(errp, "Invalid CPU model: %s", requested); |
| 1562 | if (!mc->valid_cpu_types[1]) { |
| 1563 | g_autofree char *model = cpu_model_from_type( |
| 1564 | mc->valid_cpu_types[0]); |
| 1565 | error_append_hint(errp, "The only valid type is: %s\n", model); |
| 1566 | } else { |
| 1567 | error_append_hint(errp, "The valid models are: "); |
| 1568 | for (i = 0; mc->valid_cpu_types[i]; i++) { |
| 1569 | g_autofree char *model = cpu_model_from_type( |
| 1570 | mc->valid_cpu_types[i]); |
| 1571 | error_append_hint(errp, "%s%s", |
| 1572 | model, |
| 1573 | mc->valid_cpu_types[i + 1] ? ", " : ""); |
| 1574 | } |
| 1575 | error_append_hint(errp, "\n"); |
| 1576 | } |
| 1577 | |
| 1578 | return false; |
| 1579 | } |
| 1580 | } else if (mc->get_valid_cpu_types) { |
| 1581 | GPtrArray *vct = mc->get_valid_cpu_types(machine); |
| 1582 | bool valid = false; |
| 1583 | |
| 1584 | for (i = 0; i < vct->len; i++) { |
| 1585 | if (object_class_dynamic_cast(oc, vct->pdata[i])) { |
| 1586 | valid = true; |
| 1587 | break; |
| 1588 | } |
| 1589 | } |
| 1590 | |
| 1591 | if (!valid) { |
| 1592 | g_autofree char *requested = cpu_model_from_type(machine->cpu_type); |
| 1593 | |
| 1594 | error_setg(errp, "Invalid CPU model: %s", requested); |
| 1595 | error_append_hint(errp, "The valid models are: "); |
| 1596 | for (i = 0; i < vct->len; i++) { |
| 1597 | g_autofree char *model = cpu_model_from_type(vct->pdata[i]); |
| 1598 | error_append_hint(errp, "%s%s", |
| 1599 | model, i + 1 == vct->len ? "\n" : ", "); |
| 1600 | } |
| 1601 | } |
| 1602 | g_ptr_array_free(vct, true); |
| 1603 | if (!valid) { |
| 1604 | return false; |
| 1605 | } |
| 1606 | } |
| 1607 | |
| 1608 | /* Check if CPU type is deprecated and warn if so */ |
| 1609 | cc = CPU_CLASS(oc); |
| 1610 | assert(cc != NULL); |
| 1611 | if (cc->deprecation_note) { |
| 1612 | warn_report("CPU model %s is deprecated -- %s", |
| 1613 | machine->cpu_type, cc->deprecation_note); |
| 1614 | } |
| 1615 | |
| 1616 | return true; |
| 1617 | } |
| 1618 | |
| 1619 | void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) |
| 1620 | { |
| 1621 | ERRP_GUARD(); |
| 1622 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); |
| 1623 | |
| 1624 | /* This checkpoint is required by replay to separate prior clock |
| 1625 | reading from the other reads, because timer polling functions query |
| 1626 | clock values from the log. */ |
| 1627 | replay_checkpoint(CHECKPOINT_INIT); |
| 1628 | |
| 1629 | if (!xen_enabled()) { |
| 1630 | /* On 32-bit hosts, QEMU is limited by virtual address space */ |
| 1631 | if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { |
| 1632 | error_setg(errp, "at most 2047 MB RAM can be simulated"); |
| 1633 | return; |
| 1634 | } |
| 1635 | } |
| 1636 | |
| 1637 | if (machine->memdev) { |
| 1638 | ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), |
| 1639 | "size", &error_abort); |
| 1640 | if (backend_size != machine->ram_size) { |
| 1641 | error_setg(errp, "Machine memory size does not match the size of the memory backend"); |
| 1642 | return; |
| 1643 | } |
| 1644 | } else if (machine_class->default_ram_id && machine->ram_size && |
| 1645 | numa_uses_legacy_mem()) { |
| 1646 | if (object_property_find(object_get_objects_root(), |
| 1647 | machine_class->default_ram_id)) { |
| 1648 | error_setg(errp, "object's id '%s' is reserved for the default" |
| 1649 | " RAM backend, it can't be used for any other purposes", |
| 1650 | machine_class->default_ram_id); |
| 1651 | error_append_hint(errp, |
| 1652 | "Change the object's 'id' to something else or disable" |
| 1653 | " automatic creation of the default RAM backend by setting" |
| 1654 | " 'memory-backend=%s' with '-machine'.\n", |
| 1655 | machine_class->default_ram_id); |
| 1656 | return; |
| 1657 | } |
| 1658 | |
| 1659 | if (!machine_class->create_default_memdev(current_machine, mem_path, |
| 1660 | errp)) { |
| 1661 | return; |
| 1662 | } |
| 1663 | } |
| 1664 | |
| 1665 | if (machine->numa_state) { |
| 1666 | numa_complete_configuration(machine); |
| 1667 | if (machine->numa_state->num_nodes) { |
| 1668 | machine_numa_finish_cpu_init(machine); |
| 1669 | if (machine_class->cpu_cluster_has_numa_boundary) { |
| 1670 | validate_cpu_cluster_to_numa_boundary(machine); |
| 1671 | } |
| 1672 | } |
| 1673 | } |
| 1674 | |
| 1675 | if (!machine->ram && machine->memdev) { |
| 1676 | machine->ram = machine_consume_memdev(machine, machine->memdev); |
| 1677 | } |
| 1678 | |
| 1679 | /* Check if the CPU type is supported */ |
| 1680 | if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { |
| 1681 | return; |
| 1682 | } |
| 1683 | |
| 1684 | if (machine->cgs) { |
| 1685 | /* |
| 1686 | * With confidential guests, the host can't see the real |
| 1687 | * contents of RAM, so there's no point in it trying to merge |
| 1688 | * areas. |
| 1689 | */ |
| 1690 | machine_set_mem_merge(OBJECT(machine), false, &error_abort); |
| 1691 | |
| 1692 | /* |
| 1693 | * Virtio devices can't count on directly accessing guest |
| 1694 | * memory, so they need iommu_platform=on to use normal DMA |
| 1695 | * mechanisms. That requires also disabling legacy virtio |
| 1696 | * support for those virtio pci devices which allow it. |
| 1697 | */ |
| 1698 | object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", |
| 1699 | "on", true); |
| 1700 | object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", |
| 1701 | "on", false); |
| 1702 | } |
| 1703 | |
| 1704 | accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); |
| 1705 | machine_class->init(machine); |
| 1706 | phase_advance(PHASE_MACHINE_INITIALIZED); |
| 1707 | } |
| 1708 | |
| 1709 | static NotifierList machine_init_done_notifiers = |
| 1710 | NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); |
| 1711 | |
| 1712 | void qemu_add_machine_init_done_notifier(Notifier *notify) |
| 1713 | { |
| 1714 | notifier_list_add(&machine_init_done_notifiers, notify); |
| 1715 | if (phase_check(PHASE_MACHINE_READY)) { |
| 1716 | notify->notify(notify, NULL); |
| 1717 | } |
| 1718 | } |
| 1719 | |
| 1720 | void qemu_remove_machine_init_done_notifier(Notifier *notify) |
| 1721 | { |
| 1722 | notifier_remove(notify); |
| 1723 | } |
| 1724 | |
| 1725 | static void handle_machine_dumpdtb(MachineState *ms) |
| 1726 | { |
| 1727 | if (!ms->dumpdtb) { |
| 1728 | return; |
| 1729 | } |
| 1730 | #ifdef CONFIG_FDT |
| 1731 | qmp_dumpdtb(ms->dumpdtb, &error_fatal); |
| 1732 | exit(0); |
| 1733 | #else |
| 1734 | error_report("This machine doesn't have an FDT"); |
| 1735 | error_printf("(this machine type definitely doesn't use FDT, and " |
| 1736 | "this QEMU doesn't have FDT support compiled in)\n"); |
| 1737 | exit(1); |
| 1738 | #endif |
| 1739 | } |
| 1740 | |
| 1741 | void qdev_machine_creation_done(void) |
| 1742 | { |
| 1743 | cpu_synchronize_all_post_init(); |
| 1744 | |
| 1745 | if (current_machine->boot_config.once) { |
| 1746 | qemu_boot_set(current_machine->boot_config.once, &error_fatal); |
| 1747 | qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); |
| 1748 | } |
| 1749 | |
| 1750 | /* |
| 1751 | * ok, initial machine setup is done, starting from now we can |
| 1752 | * only create hotpluggable devices |
| 1753 | */ |
| 1754 | phase_advance(PHASE_MACHINE_READY); |
| 1755 | qdev_assert_realized_properly(); |
| 1756 | |
| 1757 | /* TODO: once all bus devices are qdevified, this should be done |
| 1758 | * when bus is created by qdev.c */ |
| 1759 | /* |
| 1760 | * This is where we arrange for the sysbus to be reset when the |
| 1761 | * whole simulation is reset. In turn, resetting the sysbus will cause |
| 1762 | * all devices hanging off it (and all their child buses, recursively) |
| 1763 | * to be reset. Note that this will *not* reset any Device objects |
| 1764 | * which are not attached to some part of the qbus tree! |
| 1765 | */ |
| 1766 | qemu_register_resettable(OBJECT(sysbus_get_default())); |
| 1767 | |
| 1768 | notifier_list_notify(&machine_init_done_notifiers, NULL); |
| 1769 | |
| 1770 | /* |
| 1771 | * If the user used -machine dumpdtb=file.dtb to request that we |
| 1772 | * dump the DTB to a file, do it now, and exit. |
| 1773 | */ |
| 1774 | handle_machine_dumpdtb(current_machine); |
| 1775 | |
| 1776 | if (rom_check_and_register_reset() != 0) { |
| 1777 | exit(1); |
| 1778 | } |
| 1779 | |
| 1780 | replay_start(); |
| 1781 | |
| 1782 | /* This checkpoint is required by replay to separate prior clock |
| 1783 | reading from the other reads, because timer polling functions query |
| 1784 | clock values from the log. */ |
| 1785 | replay_checkpoint(CHECKPOINT_RESET); |
| 1786 | qemu_system_reset(SHUTDOWN_CAUSE_NONE); |
| 1787 | register_global_state(); |
| 1788 | } |
| 1789 | |
| 1790 | static const TypeInfo machine_info = { |
| 1791 | .name = TYPE_MACHINE, |
| 1792 | .parent = TYPE_OBJECT, |
| 1793 | .abstract = true, |
| 1794 | .class_size = sizeof(MachineClass), |
| 1795 | .class_init = machine_class_init, |
| 1796 | .class_base_init = machine_class_base_init, |
| 1797 | .instance_size = sizeof(MachineState), |
| 1798 | .instance_init = machine_initfn, |
| 1799 | .instance_finalize = machine_finalize, |
| 1800 | }; |
| 1801 | |
| 1802 | static void machine_register_types(void) |
| 1803 | { |
| 1804 | type_register_static(&machine_info); |
| 1805 | } |
| 1806 | |
| 1807 | type_init(machine_register_types) |