| 1 | /* |
| 2 | * NUMA parameter parsing routines |
| 3 | * |
| 4 | * Copyright (c) 2014 Fujitsu Ltd. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "qemu/osdep.h" |
| 26 | #include "qemu/units.h" |
| 27 | #include "system/hostmem.h" |
| 28 | #include "system/numa.h" |
| 29 | #include "exec/cpu-common.h" |
| 30 | #include "system/ramlist.h" |
| 31 | #include "system/ramblock.h" |
| 32 | #include "qemu/error-report.h" |
| 33 | #include "qapi/error.h" |
| 34 | #include "qapi/opts-visitor.h" |
| 35 | #include "qapi/qapi-visit-machine.h" |
| 36 | #include "system/qtest.h" |
| 37 | #include "hw/core/cpu.h" |
| 38 | #include "hw/mem/pc-dimm.h" |
| 39 | #include "hw/core/boards.h" |
| 40 | #include "hw/mem/memory-device.h" |
| 41 | #include "qemu/option.h" |
| 42 | #include "qemu/config-file.h" |
| 43 | #include "qemu/cutils.h" |
| 44 | |
| 45 | QemuOptsList qemu_numa_opts = { |
| 46 | .name = "numa", |
| 47 | .implied_opt_name = "type", |
| 48 | .head = QTAILQ_HEAD_INITIALIZER(qemu_numa_opts.head), |
| 49 | .desc = { { 0 } } /* validated with OptsVisitor */ |
| 50 | }; |
| 51 | |
| 52 | static int have_memdevs; |
| 53 | bool numa_uses_legacy_mem(void) |
| 54 | { |
| 55 | return !have_memdevs; |
| 56 | } |
| 57 | |
| 58 | static int have_mem; |
| 59 | static int max_numa_nodeid; /* Highest specified NUMA node ID, plus one. |
| 60 | * For all nodes, nodeid < max_numa_nodeid |
| 61 | */ |
| 62 | |
| 63 | static void parse_numa_node(MachineState *ms, NumaNodeOptions *node, |
| 64 | Error **errp) |
| 65 | { |
| 66 | Error *err = NULL; |
| 67 | uint16_t nodenr; |
| 68 | uint16List *cpus = NULL; |
| 69 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 70 | unsigned int max_cpus = ms->smp.max_cpus; |
| 71 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 72 | |
| 73 | if (node->has_nodeid) { |
| 74 | nodenr = node->nodeid; |
| 75 | } else { |
| 76 | nodenr = ms->numa_state->num_nodes; |
| 77 | } |
| 78 | |
| 79 | if (nodenr >= MAX_NODES) { |
| 80 | error_setg(errp, "Max number of NUMA nodes reached: %" |
| 81 | PRIu16 "", nodenr); |
| 82 | return; |
| 83 | } |
| 84 | |
| 85 | if (numa_info[nodenr].present) { |
| 86 | error_setg(errp, "Duplicate NUMA nodeid: %" PRIu16, nodenr); |
| 87 | return; |
| 88 | } |
| 89 | |
| 90 | /* |
| 91 | * If not set the initiator, set it to MAX_NODES. And if |
| 92 | * HMAT is enabled and this node has no cpus, QEMU will raise error. |
| 93 | */ |
| 94 | numa_info[nodenr].initiator = MAX_NODES; |
| 95 | if (node->has_initiator) { |
| 96 | if (!ms->numa_state->hmat_enabled) { |
| 97 | error_setg(errp, "ACPI Heterogeneous Memory Attribute Table " |
| 98 | "(HMAT) is disabled, enable it with -machine hmat=on " |
| 99 | "before using any of hmat specific options"); |
| 100 | return; |
| 101 | } |
| 102 | |
| 103 | if (node->initiator >= MAX_NODES) { |
| 104 | error_report("The initiator id %" PRIu16 " expects an integer " |
| 105 | "between 0 and %d", node->initiator, |
| 106 | MAX_NODES - 1); |
| 107 | return; |
| 108 | } |
| 109 | |
| 110 | numa_info[nodenr].initiator = node->initiator; |
| 111 | } |
| 112 | |
| 113 | for (cpus = node->cpus; cpus; cpus = cpus->next) { |
| 114 | CpuInstanceProperties props; |
| 115 | if (cpus->value >= max_cpus) { |
| 116 | error_setg(errp, |
| 117 | "CPU index (%" PRIu16 ")" |
| 118 | " should be smaller than maxcpus (%d)", |
| 119 | cpus->value, max_cpus); |
| 120 | return; |
| 121 | } |
| 122 | props = mc->cpu_index_to_instance_props(ms, cpus->value); |
| 123 | props.node_id = nodenr; |
| 124 | props.has_node_id = true; |
| 125 | machine_set_cpu_numa_node(ms, &props, &err); |
| 126 | if (err) { |
| 127 | error_propagate(errp, err); |
| 128 | return; |
| 129 | } |
| 130 | } |
| 131 | |
| 132 | have_memdevs = have_memdevs || node->memdev; |
| 133 | have_mem = have_mem || node->has_mem; |
| 134 | if ((node->has_mem && have_memdevs) || (node->memdev && have_mem)) { |
| 135 | error_setg(errp, "numa configuration should use either mem= or memdev=," |
| 136 | "mixing both is not allowed"); |
| 137 | return; |
| 138 | } |
| 139 | |
| 140 | if (node->has_mem) { |
| 141 | if (!mc->numa_mem_supported) { |
| 142 | error_setg(errp, "Parameter -numa node,mem is not supported by this" |
| 143 | " machine type"); |
| 144 | error_append_hint(errp, "Use -numa node,memdev instead\n"); |
| 145 | return; |
| 146 | } |
| 147 | |
| 148 | numa_info[nodenr].node_mem = node->mem; |
| 149 | if (!qtest_enabled()) { |
| 150 | warn_report("Parameter -numa node,mem is deprecated," |
| 151 | " use -numa node,memdev instead"); |
| 152 | } |
| 153 | } |
| 154 | if (node->memdev) { |
| 155 | Object *o; |
| 156 | o = object_resolve_path_type(node->memdev, TYPE_MEMORY_BACKEND, NULL); |
| 157 | if (!o) { |
| 158 | error_setg(errp, "memdev=%s is ambiguous", node->memdev); |
| 159 | return; |
| 160 | } |
| 161 | |
| 162 | object_ref(o); |
| 163 | numa_info[nodenr].node_mem = object_property_get_uint(o, "size", NULL); |
| 164 | numa_info[nodenr].node_memdev = MEMORY_BACKEND(o); |
| 165 | } |
| 166 | |
| 167 | numa_info[nodenr].present = true; |
| 168 | max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1); |
| 169 | ms->numa_state->num_nodes++; |
| 170 | } |
| 171 | |
| 172 | static |
| 173 | void parse_numa_distance(MachineState *ms, NumaDistOptions *dist, Error **errp) |
| 174 | { |
| 175 | uint16_t src = dist->src; |
| 176 | uint16_t dst = dist->dst; |
| 177 | uint8_t val = dist->val; |
| 178 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 179 | |
| 180 | if (src >= MAX_NODES || dst >= MAX_NODES) { |
| 181 | error_setg(errp, "Parameter '%s' expects an integer between 0 and %d", |
| 182 | src >= MAX_NODES ? "src" : "dst", MAX_NODES - 1); |
| 183 | return; |
| 184 | } |
| 185 | |
| 186 | if (!numa_info[src].present || !numa_info[dst].present) { |
| 187 | error_setg(errp, "Source/Destination NUMA node is missing. " |
| 188 | "Please use '-numa node' option to declare it first."); |
| 189 | return; |
| 190 | } |
| 191 | |
| 192 | if (val < NUMA_DISTANCE_MIN) { |
| 193 | error_setg(errp, "NUMA distance (%" PRIu8 ") is invalid, " |
| 194 | "it shouldn't be less than %d.", |
| 195 | val, NUMA_DISTANCE_MIN); |
| 196 | return; |
| 197 | } |
| 198 | |
| 199 | if (src == dst && val != NUMA_DISTANCE_MIN) { |
| 200 | error_setg(errp, "Local distance of node %d should be %d.", |
| 201 | src, NUMA_DISTANCE_MIN); |
| 202 | return; |
| 203 | } |
| 204 | |
| 205 | numa_info[src].distance[dst] = val; |
| 206 | ms->numa_state->have_numa_distance = true; |
| 207 | } |
| 208 | |
| 209 | void parse_numa_hmat_lb(NumaState *numa_state, NumaHmatLBOptions *node, |
| 210 | Error **errp) |
| 211 | { |
| 212 | int i, first_bit, last_bit; |
| 213 | uint64_t max_entry, temp_base, bitmap_copy; |
| 214 | NodeInfo *numa_info = numa_state->nodes; |
| 215 | HMAT_LB_Info *hmat_lb = |
| 216 | numa_state->hmat_lb[node->hierarchy][node->data_type]; |
| 217 | HMAT_LB_Data lb_data = {}; |
| 218 | HMAT_LB_Data *lb_temp; |
| 219 | |
| 220 | /* Error checking */ |
| 221 | if (node->initiator > numa_state->num_nodes) { |
| 222 | error_setg(errp, "Invalid initiator=%d, it should be less than %d", |
| 223 | node->initiator, numa_state->num_nodes); |
| 224 | return; |
| 225 | } |
| 226 | if (node->target > numa_state->num_nodes) { |
| 227 | error_setg(errp, "Invalid target=%d, it should be less than %d", |
| 228 | node->target, numa_state->num_nodes); |
| 229 | return; |
| 230 | } |
| 231 | if (!numa_info[node->initiator].has_cpu && |
| 232 | !numa_info[node->initiator].has_gi) { |
| 233 | error_setg(errp, "Invalid initiator=%d, it isn't an " |
| 234 | "initiator proximity domain", node->initiator); |
| 235 | return; |
| 236 | } |
| 237 | if (!numa_info[node->target].present) { |
| 238 | error_setg(errp, "The target=%d should point to an existing node", |
| 239 | node->target); |
| 240 | return; |
| 241 | } |
| 242 | |
| 243 | if (!hmat_lb) { |
| 244 | hmat_lb = g_malloc0(sizeof(*hmat_lb)); |
| 245 | numa_state->hmat_lb[node->hierarchy][node->data_type] = hmat_lb; |
| 246 | hmat_lb->list = g_array_new(false, true, sizeof(HMAT_LB_Data)); |
| 247 | } |
| 248 | hmat_lb->hierarchy = node->hierarchy; |
| 249 | hmat_lb->data_type = node->data_type; |
| 250 | lb_data.initiator = node->initiator; |
| 251 | lb_data.target = node->target; |
| 252 | |
| 253 | if (node->data_type <= HMAT_LB_DATA_TYPE_WRITE_LATENCY) { |
| 254 | /* Input latency data */ |
| 255 | |
| 256 | if (!node->has_latency) { |
| 257 | error_setg(errp, "Missing 'latency' option"); |
| 258 | return; |
| 259 | } |
| 260 | if (node->has_bandwidth) { |
| 261 | error_setg(errp, "Invalid option 'bandwidth' since " |
| 262 | "the data type is latency"); |
| 263 | return; |
| 264 | } |
| 265 | |
| 266 | /* Detect duplicate configuration */ |
| 267 | for (i = 0; i < hmat_lb->list->len; i++) { |
| 268 | lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i); |
| 269 | |
| 270 | if (node->initiator == lb_temp->initiator && |
| 271 | node->target == lb_temp->target) { |
| 272 | error_setg(errp, "Duplicate configuration of the latency for " |
| 273 | "initiator=%d and target=%d", node->initiator, |
| 274 | node->target); |
| 275 | return; |
| 276 | } |
| 277 | } |
| 278 | |
| 279 | hmat_lb->base = hmat_lb->base ? hmat_lb->base : UINT64_MAX; |
| 280 | |
| 281 | if (node->latency) { |
| 282 | /* Calculate the temporary base and compressed latency */ |
| 283 | max_entry = node->latency; |
| 284 | temp_base = 1; |
| 285 | while (QEMU_IS_ALIGNED(max_entry, 10)) { |
| 286 | max_entry /= 10; |
| 287 | temp_base *= 10; |
| 288 | } |
| 289 | |
| 290 | /* Calculate the max compressed latency */ |
| 291 | temp_base = MIN(hmat_lb->base, temp_base); |
| 292 | max_entry = node->latency / hmat_lb->base; |
| 293 | max_entry = MAX(hmat_lb->range_bitmap, max_entry); |
| 294 | |
| 295 | /* |
| 296 | * For latency hmat_lb->range_bitmap record the max compressed |
| 297 | * latency which should be less than 0xFFFF (UINT16_MAX) |
| 298 | */ |
| 299 | if (max_entry >= UINT16_MAX) { |
| 300 | error_setg(errp, "Latency %" PRIu64 " between initiator=%d and " |
| 301 | "target=%d should not differ from previously entered " |
| 302 | "min or max values on more than %d", node->latency, |
| 303 | node->initiator, node->target, UINT16_MAX - 1); |
| 304 | return; |
| 305 | } else { |
| 306 | hmat_lb->base = temp_base; |
| 307 | hmat_lb->range_bitmap = max_entry; |
| 308 | } |
| 309 | |
| 310 | /* |
| 311 | * Set lb_info_provided bit 0 as 1, |
| 312 | * latency information is provided |
| 313 | */ |
| 314 | numa_info[node->target].lb_info_provided |= BIT(0); |
| 315 | } |
| 316 | lb_data.data = node->latency; |
| 317 | } else if (node->data_type >= HMAT_LB_DATA_TYPE_ACCESS_BANDWIDTH) { |
| 318 | /* Input bandwidth data */ |
| 319 | if (!node->has_bandwidth) { |
| 320 | error_setg(errp, "Missing 'bandwidth' option"); |
| 321 | return; |
| 322 | } |
| 323 | if (node->has_latency) { |
| 324 | error_setg(errp, "Invalid option 'latency' since " |
| 325 | "the data type is bandwidth"); |
| 326 | return; |
| 327 | } |
| 328 | if (!QEMU_IS_ALIGNED(node->bandwidth, MiB)) { |
| 329 | error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d and " |
| 330 | "target=%d should be 1MB aligned", node->bandwidth, |
| 331 | node->initiator, node->target); |
| 332 | return; |
| 333 | } |
| 334 | |
| 335 | /* Detect duplicate configuration */ |
| 336 | for (i = 0; i < hmat_lb->list->len; i++) { |
| 337 | lb_temp = &g_array_index(hmat_lb->list, HMAT_LB_Data, i); |
| 338 | |
| 339 | if (node->initiator == lb_temp->initiator && |
| 340 | node->target == lb_temp->target) { |
| 341 | error_setg(errp, "Duplicate configuration of the bandwidth for " |
| 342 | "initiator=%d and target=%d", node->initiator, |
| 343 | node->target); |
| 344 | return; |
| 345 | } |
| 346 | } |
| 347 | |
| 348 | hmat_lb->base = hmat_lb->base ? hmat_lb->base : 1; |
| 349 | |
| 350 | if (node->bandwidth) { |
| 351 | /* Keep bitmap unchanged when bandwidth out of range */ |
| 352 | bitmap_copy = hmat_lb->range_bitmap; |
| 353 | bitmap_copy |= node->bandwidth; |
| 354 | first_bit = ctz64(bitmap_copy); |
| 355 | temp_base = UINT64_C(1) << first_bit; |
| 356 | max_entry = node->bandwidth / temp_base; |
| 357 | last_bit = 64 - clz64(bitmap_copy); |
| 358 | |
| 359 | /* |
| 360 | * For bandwidth, first_bit record the base unit of bandwidth bits, |
| 361 | * last_bit record the last bit of the max bandwidth. The max |
| 362 | * compressed bandwidth should be less than 0xFFFF (UINT16_MAX) |
| 363 | */ |
| 364 | if ((last_bit - first_bit) > UINT16_BITS || |
| 365 | max_entry >= UINT16_MAX) { |
| 366 | error_setg(errp, "Bandwidth %" PRIu64 " between initiator=%d " |
| 367 | "and target=%d should not differ from previously " |
| 368 | "entered values on more than %d", node->bandwidth, |
| 369 | node->initiator, node->target, UINT16_MAX - 1); |
| 370 | return; |
| 371 | } else { |
| 372 | hmat_lb->base = temp_base; |
| 373 | hmat_lb->range_bitmap = bitmap_copy; |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * Set lb_info_provided bit 1 as 1, |
| 378 | * bandwidth information is provided |
| 379 | */ |
| 380 | numa_info[node->target].lb_info_provided |= BIT(1); |
| 381 | } |
| 382 | lb_data.data = node->bandwidth; |
| 383 | } else { |
| 384 | g_assert_not_reached(); |
| 385 | } |
| 386 | |
| 387 | g_array_append_val(hmat_lb->list, lb_data); |
| 388 | } |
| 389 | |
| 390 | void parse_numa_hmat_cache(MachineState *ms, NumaHmatCacheOptions *node, |
| 391 | Error **errp) |
| 392 | { |
| 393 | int nb_numa_nodes = ms->numa_state->num_nodes; |
| 394 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 395 | NumaHmatCacheOptions *hmat_cache = NULL; |
| 396 | |
| 397 | if (node->node_id >= nb_numa_nodes) { |
| 398 | error_setg(errp, "Invalid node-id=%" PRIu32 ", it should be less " |
| 399 | "than %d", node->node_id, nb_numa_nodes); |
| 400 | return; |
| 401 | } |
| 402 | |
| 403 | if (numa_info[node->node_id].lb_info_provided != (BIT(0) | BIT(1))) { |
| 404 | error_setg(errp, "The latency and bandwidth information of " |
| 405 | "node-id=%" PRIu32 " should be provided before memory side " |
| 406 | "cache attributes", node->node_id); |
| 407 | return; |
| 408 | } |
| 409 | |
| 410 | if (node->level < 1 || node->level >= HMAT_LB_LEVELS) { |
| 411 | error_setg(errp, "Invalid level=%" PRIu8 ", it should be larger than 0 " |
| 412 | "and less than or equal to %d", node->level, |
| 413 | HMAT_LB_LEVELS - 1); |
| 414 | return; |
| 415 | } |
| 416 | |
| 417 | assert(node->associativity < HMAT_CACHE_ASSOCIATIVITY__MAX); |
| 418 | assert(node->policy < HMAT_CACHE_WRITE_POLICY__MAX); |
| 419 | if (ms->numa_state->hmat_cache[node->node_id][node->level]) { |
| 420 | error_setg(errp, "Duplicate configuration of the side cache for " |
| 421 | "node-id=%" PRIu32 " and level=%" PRIu8, |
| 422 | node->node_id, node->level); |
| 423 | return; |
| 424 | } |
| 425 | |
| 426 | if ((node->level > 1) && |
| 427 | ms->numa_state->hmat_cache[node->node_id][node->level - 1] == NULL) { |
| 428 | error_setg(errp, "Cache level=%u shall be defined first", |
| 429 | node->level - 1); |
| 430 | return; |
| 431 | } |
| 432 | |
| 433 | if ((node->level > 1) && |
| 434 | (node->size <= |
| 435 | ms->numa_state->hmat_cache[node->node_id][node->level - 1]->size)) { |
| 436 | error_setg(errp, "Invalid size=%" PRIu64 ", the size of level=%" PRIu8 |
| 437 | " should be larger than the size(%" PRIu64 ") of " |
| 438 | "level=%u", node->size, node->level, |
| 439 | ms->numa_state->hmat_cache[node->node_id] |
| 440 | [node->level - 1]->size, |
| 441 | node->level - 1); |
| 442 | return; |
| 443 | } |
| 444 | |
| 445 | if ((node->level < HMAT_LB_LEVELS - 1) && |
| 446 | ms->numa_state->hmat_cache[node->node_id][node->level + 1] && |
| 447 | (node->size >= |
| 448 | ms->numa_state->hmat_cache[node->node_id][node->level + 1]->size)) { |
| 449 | error_setg(errp, "Invalid size=%" PRIu64 ", the size of level=%" PRIu8 |
| 450 | " should be less than the size(%" PRIu64 ") of " |
| 451 | "level=%u", node->size, node->level, |
| 452 | ms->numa_state->hmat_cache[node->node_id] |
| 453 | [node->level + 1]->size, |
| 454 | node->level + 1); |
| 455 | return; |
| 456 | } |
| 457 | |
| 458 | hmat_cache = g_malloc0(sizeof(*hmat_cache)); |
| 459 | memcpy(hmat_cache, node, sizeof(*hmat_cache)); |
| 460 | ms->numa_state->hmat_cache[node->node_id][node->level] = hmat_cache; |
| 461 | } |
| 462 | |
| 463 | void set_numa_options(MachineState *ms, NumaOptions *object, Error **errp) |
| 464 | { |
| 465 | if (!ms->numa_state) { |
| 466 | error_setg(errp, "NUMA is not supported by this machine-type"); |
| 467 | return; |
| 468 | } |
| 469 | |
| 470 | switch (object->type) { |
| 471 | case NUMA_OPTIONS_TYPE_NODE: |
| 472 | parse_numa_node(ms, &object->u.node, errp); |
| 473 | break; |
| 474 | case NUMA_OPTIONS_TYPE_DIST: |
| 475 | parse_numa_distance(ms, &object->u.dist, errp); |
| 476 | break; |
| 477 | case NUMA_OPTIONS_TYPE_CPU: |
| 478 | if (!object->u.cpu.has_node_id) { |
| 479 | error_setg(errp, "Missing mandatory node-id property"); |
| 480 | return; |
| 481 | } |
| 482 | if (!ms->numa_state->nodes[object->u.cpu.node_id].present) { |
| 483 | error_setg(errp, "Invalid node-id=%" PRId64 ", NUMA node must be " |
| 484 | "defined with -numa node,nodeid=ID before it's used with " |
| 485 | "-numa cpu,node-id=ID", object->u.cpu.node_id); |
| 486 | return; |
| 487 | } |
| 488 | |
| 489 | machine_set_cpu_numa_node(ms, |
| 490 | qapi_NumaCpuOptions_base(&object->u.cpu), |
| 491 | errp); |
| 492 | break; |
| 493 | case NUMA_OPTIONS_TYPE_HMAT_LB: |
| 494 | if (!ms->numa_state->hmat_enabled) { |
| 495 | error_setg(errp, "ACPI Heterogeneous Memory Attribute Table " |
| 496 | "(HMAT) is disabled, enable it with -machine hmat=on " |
| 497 | "before using any of hmat specific options"); |
| 498 | return; |
| 499 | } |
| 500 | |
| 501 | parse_numa_hmat_lb(ms->numa_state, &object->u.hmat_lb, errp); |
| 502 | break; |
| 503 | case NUMA_OPTIONS_TYPE_HMAT_CACHE: |
| 504 | if (!ms->numa_state->hmat_enabled) { |
| 505 | error_setg(errp, "ACPI Heterogeneous Memory Attribute Table " |
| 506 | "(HMAT) is disabled, enable it with -machine hmat=on " |
| 507 | "before using any of hmat specific options"); |
| 508 | return; |
| 509 | } |
| 510 | |
| 511 | parse_numa_hmat_cache(ms, &object->u.hmat_cache, errp); |
| 512 | break; |
| 513 | default: |
| 514 | abort(); |
| 515 | } |
| 516 | } |
| 517 | |
| 518 | static int parse_numa(void *opaque, QemuOpts *opts, Error **errp) |
| 519 | { |
| 520 | NumaOptions *object = NULL; |
| 521 | MachineState *ms = MACHINE(opaque); |
| 522 | Error *err = NULL; |
| 523 | Visitor *v = opts_visitor_new(opts); |
| 524 | |
| 525 | visit_type_NumaOptions(v, NULL, &object, errp); |
| 526 | visit_free(v); |
| 527 | if (!object) { |
| 528 | return -1; |
| 529 | } |
| 530 | |
| 531 | /* Fix up legacy suffix-less format */ |
| 532 | if ((object->type == NUMA_OPTIONS_TYPE_NODE) && object->u.node.has_mem) { |
| 533 | const char *mem_str = qemu_opt_get(opts, "mem"); |
| 534 | int ret = qemu_strtosz_MiB(mem_str, NULL, &object->u.node.mem); |
| 535 | |
| 536 | if (ret < 0) { |
| 537 | error_setg_errno(&err, -ret, "could not parse memory size '%s'", |
| 538 | mem_str); |
| 539 | } |
| 540 | } |
| 541 | |
| 542 | if (!err) { |
| 543 | set_numa_options(ms, object, &err); |
| 544 | } |
| 545 | |
| 546 | qapi_free_NumaOptions(object); |
| 547 | if (err) { |
| 548 | error_propagate(errp, err); |
| 549 | return -1; |
| 550 | } |
| 551 | |
| 552 | return 0; |
| 553 | } |
| 554 | |
| 555 | /* If all node pair distances are symmetric, then only distances |
| 556 | * in one direction are enough. If there is even one asymmetric |
| 557 | * pair, though, then all distances must be provided. The |
| 558 | * distance from a node to itself is always NUMA_DISTANCE_MIN, |
| 559 | * so providing it is never necessary. |
| 560 | */ |
| 561 | static void validate_numa_distance(MachineState *ms) |
| 562 | { |
| 563 | int src, dst; |
| 564 | bool is_asymmetrical = false; |
| 565 | int nb_numa_nodes = ms->numa_state->num_nodes; |
| 566 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 567 | |
| 568 | for (src = 0; src < nb_numa_nodes; src++) { |
| 569 | for (dst = src; dst < nb_numa_nodes; dst++) { |
| 570 | if (numa_info[src].distance[dst] == 0 && |
| 571 | numa_info[dst].distance[src] == 0) { |
| 572 | if (src != dst) { |
| 573 | error_report("The distance between node %d and %d is " |
| 574 | "missing, at least one distance value " |
| 575 | "between each nodes should be provided.", |
| 576 | src, dst); |
| 577 | exit(EXIT_FAILURE); |
| 578 | } |
| 579 | } |
| 580 | |
| 581 | if (numa_info[src].distance[dst] != 0 && |
| 582 | numa_info[dst].distance[src] != 0 && |
| 583 | numa_info[src].distance[dst] != |
| 584 | numa_info[dst].distance[src]) { |
| 585 | is_asymmetrical = true; |
| 586 | } |
| 587 | } |
| 588 | } |
| 589 | |
| 590 | if (is_asymmetrical) { |
| 591 | for (src = 0; src < nb_numa_nodes; src++) { |
| 592 | for (dst = 0; dst < nb_numa_nodes; dst++) { |
| 593 | if (src != dst && numa_info[src].distance[dst] == 0) { |
| 594 | error_report("At least one asymmetrical pair of " |
| 595 | "distances is given, please provide distances " |
| 596 | "for both directions of all node pairs."); |
| 597 | exit(EXIT_FAILURE); |
| 598 | } |
| 599 | } |
| 600 | } |
| 601 | } |
| 602 | } |
| 603 | |
| 604 | static void complete_init_numa_distance(MachineState *ms) |
| 605 | { |
| 606 | int src, dst; |
| 607 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 608 | |
| 609 | /* Fixup NUMA distance by symmetric policy because if it is an |
| 610 | * asymmetric distance table, it should be a complete table and |
| 611 | * there would not be any missing distance except local node, which |
| 612 | * is verified by validate_numa_distance above. |
| 613 | */ |
| 614 | for (src = 0; src < ms->numa_state->num_nodes; src++) { |
| 615 | for (dst = 0; dst < ms->numa_state->num_nodes; dst++) { |
| 616 | if (numa_info[src].distance[dst] == 0) { |
| 617 | if (src == dst) { |
| 618 | numa_info[src].distance[dst] = NUMA_DISTANCE_MIN; |
| 619 | } else { |
| 620 | numa_info[src].distance[dst] = numa_info[dst].distance[src]; |
| 621 | } |
| 622 | } |
| 623 | } |
| 624 | } |
| 625 | } |
| 626 | |
| 627 | static void numa_init_memdev_container(MachineState *ms, MemoryRegion *ram) |
| 628 | { |
| 629 | int i; |
| 630 | uint64_t addr = 0; |
| 631 | |
| 632 | for (i = 0; i < ms->numa_state->num_nodes; i++) { |
| 633 | uint64_t size = ms->numa_state->nodes[i].node_mem; |
| 634 | HostMemoryBackend *backend = ms->numa_state->nodes[i].node_memdev; |
| 635 | if (!backend) { |
| 636 | continue; |
| 637 | } |
| 638 | MemoryRegion *seg = machine_consume_memdev(ms, backend); |
| 639 | memory_region_add_subregion(ram, addr, seg); |
| 640 | addr += size; |
| 641 | } |
| 642 | } |
| 643 | |
| 644 | void numa_complete_configuration(MachineState *ms) |
| 645 | { |
| 646 | int i; |
| 647 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 648 | NodeInfo *numa_info = ms->numa_state->nodes; |
| 649 | |
| 650 | /* |
| 651 | * If memory hotplug is enabled (slot > 0) or memory devices are enabled |
| 652 | * (ms->maxram_size > ms->ram_size) but without '-numa' options explicitly on |
| 653 | * CLI, guests will break. |
| 654 | * |
| 655 | * Windows: won't enable memory hotplug without SRAT table at all |
| 656 | * |
| 657 | * Linux: if QEMU is started with initial memory all below 4Gb |
| 658 | * and no SRAT table present, guest kernel will use nommu DMA ops, |
| 659 | * which breaks 32bit hw drivers when memory is hotplugged and |
| 660 | * guest tries to use it with that drivers. |
| 661 | * |
| 662 | * Enable NUMA implicitly by adding a new NUMA node automatically. |
| 663 | * |
| 664 | * Or if MachineClass::auto_enable_numa is true and no NUMA nodes, |
| 665 | * assume there is just one node with whole RAM. |
| 666 | */ |
| 667 | if (ms->numa_state->num_nodes == 0 && |
| 668 | ((ms->ram_slots && mc->auto_enable_numa_with_memhp) || |
| 669 | (ms->maxram_size > ms->ram_size && mc->auto_enable_numa_with_memdev) || |
| 670 | mc->auto_enable_numa)) { |
| 671 | NumaNodeOptions node = { }; |
| 672 | parse_numa_node(ms, &node, &error_abort); |
| 673 | numa_info[0].node_mem = ms->ram_size; |
| 674 | } |
| 675 | |
| 676 | assert(max_numa_nodeid <= MAX_NODES); |
| 677 | |
| 678 | /* No support for sparse NUMA node IDs yet: */ |
| 679 | for (i = max_numa_nodeid - 1; i >= 0; i--) { |
| 680 | /* Report large node IDs first, to make mistakes easier to spot */ |
| 681 | if (!numa_info[i].present) { |
| 682 | error_report("numa: Node ID missing: %d", i); |
| 683 | exit(1); |
| 684 | } |
| 685 | } |
| 686 | |
| 687 | /* This must be always true if all nodes are present: */ |
| 688 | assert(ms->numa_state->num_nodes == max_numa_nodeid); |
| 689 | |
| 690 | if (ms->numa_state->num_nodes > 0) { |
| 691 | uint64_t numa_total; |
| 692 | |
| 693 | numa_total = 0; |
| 694 | for (i = 0; i < ms->numa_state->num_nodes; i++) { |
| 695 | numa_total += numa_info[i].node_mem; |
| 696 | } |
| 697 | if (numa_total != ms->ram_size) { |
| 698 | error_report("total memory for NUMA nodes (0x%" PRIx64 ")" |
| 699 | " should equal RAM size (0x" RAM_ADDR_FMT ")", |
| 700 | numa_total, ms->ram_size); |
| 701 | exit(1); |
| 702 | } |
| 703 | |
| 704 | if (!numa_uses_legacy_mem() && mc->default_ram_id) { |
| 705 | if (ms->memdev) { |
| 706 | error_report("'-machine memory-backend' and '-numa memdev'" |
| 707 | " properties are mutually exclusive"); |
| 708 | exit(1); |
| 709 | } |
| 710 | ms->ram = g_new(MemoryRegion, 1); |
| 711 | memory_region_init(ms->ram, OBJECT(ms), mc->default_ram_id, |
| 712 | ms->ram_size); |
| 713 | numa_init_memdev_container(ms, ms->ram); |
| 714 | } |
| 715 | /* QEMU needs at least all unique node pair distances to build |
| 716 | * the whole NUMA distance table. QEMU treats the distance table |
| 717 | * as symmetric by default, i.e. distance A->B == distance B->A. |
| 718 | * Thus, QEMU is able to complete the distance table |
| 719 | * initialization even though only distance A->B is provided and |
| 720 | * distance B->A is not. QEMU knows the distance of a node to |
| 721 | * itself is always 10, so A->A distances may be omitted. When |
| 722 | * the distances of two nodes of a pair differ, i.e. distance |
| 723 | * A->B != distance B->A, then that means the distance table is |
| 724 | * asymmetric. In this case, the distances for both directions |
| 725 | * of all node pairs are required. |
| 726 | */ |
| 727 | if (ms->numa_state->have_numa_distance) { |
| 728 | /* Validate enough NUMA distance information was provided. */ |
| 729 | validate_numa_distance(ms); |
| 730 | |
| 731 | /* Validation succeeded, now fill in any missing distances. */ |
| 732 | complete_init_numa_distance(ms); |
| 733 | } |
| 734 | } |
| 735 | } |
| 736 | |
| 737 | void parse_numa_opts(MachineState *ms) |
| 738 | { |
| 739 | qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, &error_fatal); |
| 740 | } |
| 741 | |
| 742 | void numa_cpu_pre_plug(const CPUArchId *slot, DeviceState *dev, Error **errp) |
| 743 | { |
| 744 | int node_id = object_property_get_int(OBJECT(dev), "node-id", &error_abort); |
| 745 | |
| 746 | if (node_id == CPU_UNSET_NUMA_NODE_ID) { |
| 747 | /* due to bug in libvirt, it doesn't pass node-id from props on |
| 748 | * device_add as expected, so we have to fix it up here */ |
| 749 | if (slot->props.has_node_id) { |
| 750 | object_property_set_int(OBJECT(dev), "node-id", |
| 751 | slot->props.node_id, errp); |
| 752 | } |
| 753 | } else if (node_id != slot->props.node_id) { |
| 754 | error_setg(errp, "invalid node-id, must be %"PRId64, |
| 755 | slot->props.node_id); |
| 756 | } |
| 757 | } |
| 758 | |
| 759 | static void numa_stat_memory_devices(NumaNodeMem node_mem[]) |
| 760 | { |
| 761 | MemoryDeviceInfoList *info_list = qmp_memory_device_list(); |
| 762 | MemoryDeviceInfoList *info; |
| 763 | PCDIMMDeviceInfo *pcdimm_info; |
| 764 | VirtioPMEMDeviceInfo *vpi; |
| 765 | VirtioMEMDeviceInfo *vmi; |
| 766 | SgxEPCDeviceInfo *se; |
| 767 | |
| 768 | for (info = info_list; info; info = info->next) { |
| 769 | MemoryDeviceInfo *value = info->value; |
| 770 | |
| 771 | if (value) { |
| 772 | switch (value->type) { |
| 773 | case MEMORY_DEVICE_INFO_KIND_DIMM: |
| 774 | case MEMORY_DEVICE_INFO_KIND_NVDIMM: |
| 775 | pcdimm_info = value->type == MEMORY_DEVICE_INFO_KIND_DIMM ? |
| 776 | value->u.dimm.data : value->u.nvdimm.data; |
| 777 | node_mem[pcdimm_info->node].node_mem += pcdimm_info->size; |
| 778 | node_mem[pcdimm_info->node].node_plugged_mem += |
| 779 | pcdimm_info->size; |
| 780 | break; |
| 781 | case MEMORY_DEVICE_INFO_KIND_VIRTIO_PMEM: |
| 782 | vpi = value->u.virtio_pmem.data; |
| 783 | /* TODO: once we support numa, assign to right node */ |
| 784 | node_mem[0].node_mem += vpi->size; |
| 785 | node_mem[0].node_plugged_mem += vpi->size; |
| 786 | break; |
| 787 | case MEMORY_DEVICE_INFO_KIND_VIRTIO_MEM: |
| 788 | vmi = value->u.virtio_mem.data; |
| 789 | node_mem[vmi->node].node_mem += vmi->size; |
| 790 | node_mem[vmi->node].node_plugged_mem += vmi->size; |
| 791 | break; |
| 792 | case MEMORY_DEVICE_INFO_KIND_SGX_EPC: |
| 793 | se = value->u.sgx_epc.data; |
| 794 | node_mem[se->node].node_mem += se->size; |
| 795 | node_mem[se->node].node_plugged_mem = 0; |
| 796 | break; |
| 797 | default: |
| 798 | g_assert_not_reached(); |
| 799 | } |
| 800 | } |
| 801 | } |
| 802 | qapi_free_MemoryDeviceInfoList(info_list); |
| 803 | } |
| 804 | |
| 805 | void query_numa_node_mem(NumaNodeMem node_mem[], MachineState *ms) |
| 806 | { |
| 807 | int i; |
| 808 | |
| 809 | if (ms->numa_state == NULL || ms->numa_state->num_nodes <= 0) { |
| 810 | return; |
| 811 | } |
| 812 | |
| 813 | numa_stat_memory_devices(node_mem); |
| 814 | for (i = 0; i < ms->numa_state->num_nodes; i++) { |
| 815 | node_mem[i].node_mem += ms->numa_state->nodes[i].node_mem; |
| 816 | } |
| 817 | } |
| 818 | |
| 819 | static int ram_block_notify_add_single(RAMBlock *rb, void *opaque) |
| 820 | { |
| 821 | const ram_addr_t max_size = qemu_ram_get_max_length(rb); |
| 822 | const ram_addr_t size = qemu_ram_get_used_length(rb); |
| 823 | void *host = qemu_ram_get_host_addr(rb); |
| 824 | RAMBlockNotifier *notifier = opaque; |
| 825 | |
| 826 | if (host) { |
| 827 | notifier->ram_block_added(notifier, host, size, max_size); |
| 828 | } |
| 829 | return 0; |
| 830 | } |
| 831 | |
| 832 | static int ram_block_notify_remove_single(RAMBlock *rb, void *opaque) |
| 833 | { |
| 834 | const ram_addr_t max_size = qemu_ram_get_max_length(rb); |
| 835 | const ram_addr_t size = qemu_ram_get_used_length(rb); |
| 836 | void *host = qemu_ram_get_host_addr(rb); |
| 837 | RAMBlockNotifier *notifier = opaque; |
| 838 | |
| 839 | if (host) { |
| 840 | notifier->ram_block_removed(notifier, host, size, max_size); |
| 841 | } |
| 842 | return 0; |
| 843 | } |
| 844 | |
| 845 | void ram_block_notifier_add(RAMBlockNotifier *n) |
| 846 | { |
| 847 | QLIST_INSERT_HEAD(&ram_list.ramblock_notifiers, n, next); |
| 848 | |
| 849 | /* Notify about all existing ram blocks. */ |
| 850 | if (n->ram_block_added) { |
| 851 | qemu_ram_foreach_block(ram_block_notify_add_single, n); |
| 852 | } |
| 853 | } |
| 854 | |
| 855 | void ram_block_notifier_remove(RAMBlockNotifier *n) |
| 856 | { |
| 857 | QLIST_REMOVE(n, next); |
| 858 | |
| 859 | if (n->ram_block_removed) { |
| 860 | qemu_ram_foreach_block(ram_block_notify_remove_single, n); |
| 861 | } |
| 862 | } |
| 863 | |
| 864 | void ram_block_notify_add(void *host, size_t size, size_t max_size) |
| 865 | { |
| 866 | RAMBlockNotifier *notifier; |
| 867 | RAMBlockNotifier *next; |
| 868 | |
| 869 | QLIST_FOREACH_SAFE(notifier, &ram_list.ramblock_notifiers, next, next) { |
| 870 | if (notifier->ram_block_added) { |
| 871 | notifier->ram_block_added(notifier, host, size, max_size); |
| 872 | } |
| 873 | } |
| 874 | } |
| 875 | |
| 876 | void ram_block_notify_remove(void *host, size_t size, size_t max_size) |
| 877 | { |
| 878 | RAMBlockNotifier *notifier; |
| 879 | RAMBlockNotifier *next; |
| 880 | |
| 881 | QLIST_FOREACH_SAFE(notifier, &ram_list.ramblock_notifiers, next, next) { |
| 882 | if (notifier->ram_block_removed) { |
| 883 | notifier->ram_block_removed(notifier, host, size, max_size); |
| 884 | } |
| 885 | } |
| 886 | } |
| 887 | |
| 888 | void ram_block_notify_resize(void *host, size_t old_size, size_t new_size) |
| 889 | { |
| 890 | RAMBlockNotifier *notifier; |
| 891 | RAMBlockNotifier *next; |
| 892 | |
| 893 | QLIST_FOREACH_SAFE(notifier, &ram_list.ramblock_notifiers, next, next) { |
| 894 | if (notifier->ram_block_resized) { |
| 895 | notifier->ram_block_resized(notifier, host, old_size, new_size); |
| 896 | } |
| 897 | } |
| 898 | } |